STP42N65M5

STB42N65M5, STF42N65M5, STI42N65M5 STP42N65M5, STW42N65M5 Datasheet N-channel 650 V, 70 mΩ typ., 33 A, MDmesh M5 Power MOSFETs in D²PAK, TO-220FP, I²PAK, TO-220 and TO-247 packages Features TAB Order codes 3 1 1 2 D PAK 2 3 TO-220FP TAB 12 3 TAB 1 2 3 TO-220 1 2 3 TO-247 D(2, TAB) RDS(on) max. ID Package STB42N65M5 D²PAK STF42N65M5 TO-220FP STI42N65M5 I2PAK VDS @ TJmax 710 V 79 mΩ 33 A I²PAK STP42N65M5 TO-220 STW42N65M5 TO-247 • Extremely low RDS(on) • • • Low gate charge and input capacitance Excellent switching performance 100% avalanche tested Applications • Switching applications Description G(1) S(3) AM01475v1_noZen These devices are N-channel Power MOSFETs based on the MDmesh M5 innovative vertical process technology combined with the well-known PowerMESH horizontal layout. The resulting products offer extremely low on-resistance, making them particularly suitable for applications requiring high power and superior efficiency. Product status STB42N65M5 STF42N65M5 STI42N65M5 STP42N65M5 STW42N65M5 DS6033 - Rev 4 - May 2019 For further information contact your local STMicroelectronics sales office. www.st.com STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 Electrical ratings 1 Electrical ratings Table 1. Absolute maximum ratings Value Symbol VGS ID Parameter D²PAK, I²PAK, TO-220, TO-247 Gate-source voltage TO-220FP ±25 Drain current (continuous) at TC = 25 °C V 33(1) 33 Unit A Drain current (continuous) at TC = 100 °C 20.8 IDM(2) Drain current (pulsed) 132 132 A PTOT Total power dissipation at TC = 25 °C 190 40 W dv/dt(3) VISO Tj Tstg Peak diode recovery voltage slope 20.8 (1) 15 Insulation withstand voltage (RMS) from all three leads to external heat sink (t = 1 s; TC = 25 °C) V/ns 2500 Operating junction temperature range V -55 to 150 Storage temperature range A °C 1. Limited by maximum junction temperature. 2. Pulse width limited by safe operating area. 3. ISD ≤ 33 A, di/dt ≤ 400 A/μs, VDD = 400 V, VDS(peak) < V(BR)DSS. Table 2. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case Rthj-amb Thermal resistance junction-ambient Rthj-pcb (1) Thermal resistance junction-pcb Value D²PAK I²PAK TO-220 TO-247 0.66 62.5 50 30 TO-220FP Unit 3.1 °C/W 62.5 °C/W °C/W 1. When mounted on an 1 inch² FR-4, 2 Oz copper board. Table 3. Avalanche characteristics Symbol IAR EAS DS6033 - Rev 4 Parameter Avalanche current, repetitive or non-repetitive (pulse width limited by Tjmax) Single pulse avalanche energy (starting Tj = 25 °C, ID = IAR, VDD = 50 V) Value Unit 11 A 950 mJ page 2/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 Electrical characteristics 2 Electrical characteristics (TCASE = 25 °C unless otherwise specified) Table 4. On/off states Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown voltage ID = 1 mA, VGS = 0 V Min. Typ. 650 Zero gate voltage drain current 1 µA 100 µA 100 nA 4 5 V 70 79 mΩ Typ. Max. Unit - pF VGS = 0 V, VDS = 650 V, TC = 125 °C (1) IGSS Gate body leakage current VGS = ±25 V, VDS= 0 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source on- resistance VGS = 10 V, ID = 16.5 A 3 Unit V VGS = 0 V, VDS = 650 V IDSS Max. 1. Defined by design, not subject to production test. Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Co(tr) (1) Equivalent capacitance time related Co(er) (2) Equivalent capacitance Test conditions VDS = 100 V, f = 1 MHz, VGS = 0 V Min. 4650 - 110 3.2 - 100 - 285 - 1.1 - 98 - VDS = 0 to 520 V, VGS = 0 V pF energy related Rg Gate input resistance f = 1 MHz, ID = 0 A Qg Total gate charge VDD = 520 V, ID = 33 A, Qgs Gate-source charge Qgd Gate-drain charge VGS = 0 to 10 V (see Figure 20. Test circuit for gate charge behavior) - - 28 39 - Ω nC 1. Co(tr) is a constant capacitance value that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS. 2. Co(er) is a constant capacitance value that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS. Table 6. Switching times Symbol Test conditions Min. Typ. td(v) Voltage delay time VDD = 400 V, ID = 20 A, 52 tr(v) Voltage rise time RG = 4.7 Ω, VGS = 10 V 8.4 tf(i) Current fall time (see Figure 21. Test circuit for inductive load switching and diode recovery times and Figure 24. Switching time waveform) tc(off) DS6033 - Rev 4 Parameter Crossing time - 8.7 Max. Unit - ns 14 page 3/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 Electrical characteristics Table 7. Source-drain diode Symbol ISD Parameter Test conditions Max. Unit 33 - Source-drain current (pulsed) VSD(2) Forward on voltage ISD = 33 A, VGS = 0 V trr Reverse recovery time ISD = 33 A, di/dt = 100 A/µs Qrr Reverse recovery charge VDD = 100 V Reverse recovery current (see Figure 21. Test circuit for inductive load switching and diode recovery times) trr Reverse recovery time ISD = 33 A, di/dt = 100 A/µs Qrr Reverse recovery charge VDD = 100 V, Tj = 150 °C Reverse recovery current (see Figure 21. Test circuit for inductive load switching and diode recovery times) IRRM Typ. Source-drain current ISDM(1) IRRM Min. 132 - - - 1.5 A V 400 ns 7 μC 35 A 532 ns 10 μC 38 A 1. Pulse width limited by safe operating area. 2. Pulsed: pulse duration = 300 μs, duty cycle 1.5%. DS6033 - Rev 4 page 4/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 Electrical characteristics (curves) 2.1 Electrical characteristics (curves) Figure 1. Safe operating area for D²PAK, I²PAK, TO-220 Figure 2. Thermal impedance for D²PAK, I²PAK, TO-220 AM01565v1 ID (A) S( o n) O p Li era m tio ite n d by in th m is ax ar RD ea is 100 10 10µs 100µs 1ms 10ms 1 0.1 0.1 10 1 100 VDS(V) Figure 3. Safe operating area for TO-247 Figure 4. Thermal impedance for TO-247 AM03246v1 ID (A) on ) 10µs S( O p Li era m tio ite n d by in th m is ax ar RD ea is 100 10 100µs 1ms 10ms 1 0.1 0.1 10 1 100 VDS(V) Figure 5. Safe operating area for TO-220FP AM01566v1 ID (A) Figure 6. Thermal impedance for TO-220FP GC20521 K δ=0.5 0.2 100 is rea 10 1 n) s a DS(o hi nt xR n i ma o i t y era d b Op mite Li 10-1 0.1 10µs 0.05 0.02 0.01 100µs 1ms 10ms 10-2 Zth= K*R thJ-c δ =t p/Ƭ Single pulse 0.1 0.01 0.1 DS6033 - Rev 4 1 10 100 VDS(V) 10-3 10-4 tp 10-3 10-2 10-1 Ƭ 10-0 tp(s) page 5/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 Electrical characteristics (curves) Figure 7. Output characteristics ID (A) Figure 8. Transfer characteristics ID (A) AM01589V1 VGS = 9, 10 V 100 VGS =8 V 80 60 60 VGS =7 V 20 VDS = 15 V 100 80 40 AM01590V1 40 20 0 0 2 4 6 8 10 12 14 VGS =6 V VDS (V) Figure 9. Gate charge vs gate-source voltage 0 4 RDS(on) (mΩ) 12 76 10 74 400 8 72 300 6 70 200 4 68 100 2 66 AM01569V1 VGS VDD = 520 V ID = 33 A 600 VDS 500 0 0 20 40 60 80 100 120 0 Qg (nC) 7 8 9 VGS (V) AM01568V1 VGS = 10 V 64 0 5 10 15 20 25 30 ID (A) Figure 12. Output capacitance stored energy Figure 11. Capacitance variations AM01570v1 C (pF) 6 Figure 10. Static drain-source on-resistance (V) VDS (V) 5 10000 AM03231v1 Eoss (µJ) 16 Ciss 1000 14 12 10 100 Coss 8 6 10 4 Crss 1 DS6033 - Rev 4 1 10 100 VDS(V) 2 0 0 100 200 300 400 500 600 VDS(V) page 6/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 Electrical characteristics (curves) Figure 13. Normalized gate threshold voltage vs temperature VGS(th) (norm.) Figure 14. Normalized on-resistance vs temperature RDS(on) (norm.) AM01571V1 ID = 250 μA 1.1 AM01573V1 VGS = 10 V 2.5 2.0 1.0 1.5 0.9 1.0 0.8 0.5 0.7 0.6 -75 -25 25 75 0.0 -75 TJ (°C) 125 Figure 15. Source-drain diode forward characteristics AM01574v1 VSD (V) 1.0 -25 75 V(BR)DSS (norm.) TJ=-25°C 125 TJ (°C) Figure 16. Normalized V(BR)DSS vs temperature AM01572V1 1.12 ID = 1 mA 0.9 1.08 0.8 1.04 0.7 0.6 TJ=25°C 0.5 1.00 TJ=150°C 0.96 0.4 0.92 0.3 0.2 25 0 5 10 15 20 25 30 0.88 -75 ISD(A) -25 25 75 125 TJ (°C) Figure 17. Switching energy vs gate resistance E (µJ) 600 500 AM01575v1 ID=20A VDD=400V L=50µH Eon 400 300 Eoff 200 100 0 Note: DS6033 - Rev 4 0 5 10 15 20 25 30 35 40 45 RG(W) Eon including reverse recovery of a SiC diode. page 7/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 Test circuits 3 Test circuits Figure 19. Test circuit for resistive load switching times Figure 20. Test circuit for gate charge behavior VDD 12 V 2200 + μF 3.3 μF VDD VD VGS 1 kΩ 100 nF RL IG= CONST VGS RG 47 kΩ + pulse width D.U.T. 2.7 kΩ 2200 μF pulse width D.U.T. 100 Ω VG 47 kΩ 1 kΩ AM01469v1 AM01468v1 Figure 21. Test circuit for inductive load switching and diode recovery times D G A D.U.T. S 25 Ω A B L A B 3.3 µF D G + VD 100 µH fast diode B Figure 22. Unclamped inductive load test circuit RG 1000 + µF 2200 + µF VDD 3.3 µF VDD ID D.U.T. S D.U.T. Vi _ pulse width AM01471v1 AM01470v1 Figure 23. Unclamped inductive waveform V(BR)DSS Figure 24. Switching time waveform Concept waveform for Inductive Load Turn-off Id VD 90%Vds 90%Id Tdelay -off IDM Vgs 90%Vgs on ID Vgs(I(t )) VDD VDD 10%Vds 10%Id Vds Trise AM01472v1 DS6033 - Rev 4 Tfall Tcross --over AM05540v2 page 8/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. DS6033 - Rev 4 page 9/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 D²PAK (TO-263) type A2 package information 4.1 D²PAK (TO-263) type A2 package information Figure 25. D²PAK (TO-263) type A2 package outline 0079457_A2_26 DS6033 - Rev 4 page 10/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 D²PAK (TO-263) type A2 package information Table 8. D²PAK (TO-263) type A2 package mechanical data Dim. mm Min. Typ. Max. A 4.40 4.60 A1 0.03 0.23 b 0.70 0.93 b2 1.14 1.70 c 0.45 0.60 c2 1.23 1.36 D 8.95 9.35 D1 7.50 7.75 8.00 D2 1.10 1.30 1.50 E 10.00 E1 8.70 8.90 9.10 E2 7.30 7.50 7.70 e 10.40 2.54 e1 4.88 5.28 H 15.00 15.85 J1 2.49 2.69 L 2.29 2.79 L1 1.27 1.40 L2 1.30 1.75 R V2 0.40 0° 8° Figure 26. D²PAK (TO-263) recommended footprint (dimensions are in mm) Footprint DS6033 - Rev 4 page 11/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 D²PAK packing information 4.2 D²PAK packing information Figure 27. D²PAK tape outline DS6033 - Rev 4 page 12/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 D²PAK packing information Figure 28. D²PAK reel outline T 40mm min. access hole at slot location B D C N A G measured at hub Tape slot in core for tape start 2.5mm min.width Full radius AM06038v1 Table 9. D²PAK tape and reel mechanical data Tape Dim. DS6033 - Rev 4 Reel mm mm Dim. Min. Max. Min. A0 10.5 10.7 A B0 15.7 15.9 B 1.5 D 1.5 1.6 C 12.8 D1 1.59 1.61 D 20.2 E 1.65 1.85 G 24.4 F 11.4 11.6 N 100 K0 4.8 5.0 T Max. 330 13.2 26.4 30.4 P0 3.9 4.1 P1 11.9 12.1 Base quantity 1000 P2 1.9 2.1 Bulk quantity 1000 R 50 T 0.25 0.35 W 23.7 24.3 page 13/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 TO-220FP package information 4.3 TO-220FP package information Figure 29. TO-220FP package outline 7012510_Rev_12_B DS6033 - Rev 4 page 14/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 TO-220FP package information Table 10. TO-220FP package mechanical data Dim. mm Min. Max. A 4.4 4.6 B 2.5 2.7 D 2.5 2.75 E 0.45 0.7 F 0.75 1 F1 1.15 1.70 F2 1.15 1.70 G 4.95 5.2 G1 2.4 2.7 H 10 10.4 L2 DS6033 - Rev 4 Typ. 16 L3 28.6 30.6 L4 9.8 10.6 L5 2.9 3.6 L6 15.9 16.4 L7 9 9.3 Dia 3 3.2 page 15/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 I²PAK package information 4.4 I²PAK package information Figure 30. I²PAK package outline 0004982_Rev_H DS6033 - Rev 4 page 16/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 I²PAK package information Table 11. I²PAK package mechanical data Dim. DS6033 - Rev 4 mm Min. Typ. Max. A 4.40 - 4.60 A1 2.40 - 2.72 b 0.61 - 0.88 b1 1.14 - 1.70 c 0.49 - 0.70 c2 1.23 - 1.32 D 8.95 - 9.35 e 2.40 - 2.70 e1 4.95 - 5.15 E 10 - 10.40 L 13 - 14 L1 3.50 - 3.93 L2 1.27 - 1.40 page 17/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 TO-220 type A package information 4.5 TO-220 type A package information Figure 31. TO-220 type A package outline 0015988_typeA_Rev_22 DS6033 - Rev 4 page 18/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 TO-220 type A package information Table 12. TO-220 type A package mechanical data Dim. mm Min. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.55 c 0.48 0.70 D 15.25 15.75 D1 DS6033 - Rev 4 Typ. 1.27 E 10.00 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13.00 14.00 L1 3.50 3.93 L20 16.40 L30 28.90 øP 3.75 3.85 Q 2.65 2.95 page 19/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 TO-247 package information 4.6 TO-247 package information Figure 32. TO-247 package outline 0075325_9 DS6033 - Rev 4 page 20/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 TO-247 package information Table 13. TO-247 package mechanical data Dim. mm Min. Max. A 4.85 5.15 A1 2.20 2.60 b 1.0 1.40 b1 2.0 2.40 b2 3.0 3.40 c 0.40 0.80 D 19.85 20.15 E 15.45 15.75 e 5.30 L 14.20 14.80 L1 3.70 4.30 L2 DS6033 - Rev 4 Typ. 5.45 5.60 18.50 ØP 3.55 3.65 ØR 4.50 5.50 S 5.30 5.50 5.70 page 21/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 Ordering information 5 Ordering information Table 14. Order codes Order code Package Packing STB42N65M5 D²PAK Tape and reel STF42N65M5 TO-220FP STI42N65M5 DS6033 - Rev 4 Marking 42N65M5 I²PAK STP42N65M5 TO-220 STW42N65M5 TO-247 Tube page 22/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 Revision history Table 15. Document revision history Date Version Changes 16-Jan-2009 1 First release. 15-May-2009 2 Updated figures 9, 10, 11 and 17 12-Jun-2009 3 Figure 15 has been updated Modified features and description on cover page. 02-May-2019 4 Updated Section 4 Package information. Minor text changes. DS6033 - Rev 4 page 23/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 Contents Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 4 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 5 4.1 D²PAK (TO-263) type A2 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 4.2 D²PAK packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.3 TO-220FP package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 4.4 I²PAK package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.5 TO-220 type A package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.6 TO-247 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 DS6033 - Rev 4 page 24/25 STB42N65M5, STF42N65M5, STI42N65M5, STP42N65M5, STW42N65M5 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2019 STMicroelectronics – All rights reserved DS6033 - Rev 4 page 25/25