TDA7296S

TDA7296S ® 70V - 60W DMOS AUDIO AMPLIFIER WITH MUTE/ST-BY VERY HIGH OPERATING VOLTAGE RANGE (±35V) DMOS POWER STAGE HIGH OUTPUT POWER (THD = 10%, UP TO 60W) MUTING/STAND-BY FUNCTIONS NO SWITCH ON/OFF NOISE VERY LOW DISTORTION VERY LOW NOISE SHORT CIRCUIT PROTECTION THERMAL SHUTDOWN CLIP DETECTOR MODULARITY (MORE DEVICES CAN BE EASILY CONNECTED IN PARALLEL TO DRIVE VERY LOW IMPEDANCES) MULTIPOWER BCD TECHNOLOGY Multiwatt15 ORDERING NUMBER: TDA7296S c u d class TV). Thanks to the wide voltage range and to the high out current capability it is able to supply the highest power into both 4Ω and 8Ω loads. The built in muting function with turn on delay simplifies the remote operation avoiding switching on-off noises. Parallel mode is made possible by connecting more device through of pin11. High output power can be delivered to very low impedance loads, so optimizing the thermal dissipation of the system. DESCRIPTION The TDA7296S is a monolithic integrated circuit in Multiwatt15 package, intended for use as audio class AB amplifier in Hi-Fi field applications (Home Stereo, self powered loudspeakers, Top- e t le o r P o s b O - Figure 1: Typical Application and Test Circuit ) s ( ct +Vs C7 100nF u d o ) s t( C6 1000µF R3 22K r P e C2 22µF t e l o bs O VMUTE R2 680Ω C1 470nF IN- 2 IN+ 3 BUFFER DRIVER +Vs +PWVs 11 7 13 - MUTE STBY BOOT LOADER C5 22µF 6 10 5 THERMAL SHUTDOWN MUTE VSTBY 12 4 (**) R5 10K OUT + R1 22K SGND 14 9 S/C PROTECTION (*) BOOTSTRAP CLIP DET VCLIP STBY R4 22K C3 10µF C4 10µF 1 8 15 STBY-GND -Vs -PWVs C9 100nF C8 1000µF D97AU805A (*) see Application note (**) for SLAVE function January 2003 -Vs 1/11 TDA7296S PIN CONNECTION (Top view) 15 -VS (POWER) 14 OUT 13 +VS (POWER) 12 BOOTSTRAP LOADER 11 BUFFER DRIVER 10 MUTE 9 STAND-BY 8 -VS (SIGNAL) 7 +VS (SIGNAL) 6 BOOTSTRAP 5 CLIP AND SHORT CIRCUIT DETECTOR 4 SIGNAL GROUND 3 NON INVERTING INPUT 2 INVERTING INPUT 1 STAND-BY GND TAB CONNECTED TO PIN 8 D97AU806 c u d QUICK REFERENCE DATA Symbol Parameter Test Conditions GLOOP P e let Closed Loop Gain 26 VS = ±30V; RL = 8Ω; THD = 10% Output Power Ptot SVR Max. Unit æ 35 V 45 dB 60 W VS = ±25V; RL = 4Ω; THD = 10% 60 W o s b O - 75 dB Supply Voltage Rejection ABSOLUTE MAXIMUM RATINGS Symbol Typ. ro ±12 Supply Voltage Operating VS Parameter ) s ( ct VS V1 Supply Voltage (No Signal) VSTAND-BY GND Voltage Referred to -VS (pin 8) V2 Input Voltage (inverting) Referred to -VS Value Unit ±35 60 V V 60 V Maximum Differential Inputs ±30 V V3 Input Voltage (non inverting) Referred to -VS 60 V V4 Signal GND Voltage Referred to -VS 60 V V5 Clip Detector Voltage Referred to -VS 60 V Bootstrap Voltage Referred to -VS 60 V Stand-by Voltage Referred to -VS Mute Voltage Referred to -VS 60 60 V V Buffer Voltage Referred to -VS 60 V Bootstrap Loader Voltage Referred to -VS 60 V V2 - V3 V9 V10 bs V11 o r P e du t e l o V6 V12 O Min. ) s t( Output Peak Current 10 A Ptot Power Dissipation Tcase = 70°C 50 W Top Operating Ambient Temperature Range 0 to 70 °C 150 °C IO Tstg, Tj Storage and Junction Temperature THERMAL DATA Symbol Rth j-case 2/11 Description Thermal Resistance Junction-case Typ Max Unit 1 1.5 °C/W TDA7296S ELECTRICAL CHARACTERISTICS (Refer to the Test Circuit VS = ±24V, RL = 8Ω, GV = 30dB; Rg = 50 Ω; Tamb = 25°C, f = 1 kHz; unless otherwise specified). Symbol Parameter Test Condition Min. VS Operating Supply Range ±10 Iq Quiescent Current 20 Ib Typ. 30 Max. Unit ±35 V 65 mA Input Bias Current 500 nA VOS Input Offset Voltage ±10 mV IOS PO Input Offset Current ±100 nA RMS Continuous Output Power d d = 0.5%: VS = ± 24V, RL = 8Ω VS = ± 21V, RL = 6Ω VS = ± 18V, RL = 4Ω 27 27 27 Music Power (RMS) (*) ∆t = 1s d = 10%; RL = 8Ω ; VS = ±30V RL = 6Ω ; VS = ±24V RL = 4Ω; VS = ±23V Total Harmonic Distortion (**) PO = 5W; f = 1kHz PO = 0.1 to 20W; f = 20Hz to 20kHz Slew Rate GV Open Loop Voltage Gain GV eN Closed Loop Voltage Gain fL, fH Frequency Response (-3dB) PO = 1W SVR Supply Voltage Rejection Thermal Shutdown TS STAND-BY FUNCTION (Ref: -VS or GND) VST on Stand-by on Threshold VST off Stand-by off Threshold ATTst-by Stand-by Attenuation c u d b O - f = 100Hz; Vripple = 0.5Vrms (t s) 60 o r P e V/µs 80 dB ro 30 1 2 45 dB 5 µV µV 20Hz to 20kHz kΩ 75 dB 150 °C 1.5 3.5 70 % % 10 100 Quiescent Current @ Stand-by Iq st-by c u d % % ) s t( 0.1 P e let so Input Resistance Ri W W W 0.01 26 A = curve f = 20Hz to 20kHz 60 60 60 0.1 7 Total Input Noise W W W 0.005 VS = ±18V, RL = 4Ω: PO = 5W; f = 1kHz PO = 0.1 to 20W; f = 20Hz to 20kHz SR 30 30 30 V V 90 1 dB 3 mA 1.5 V MUTE FUNCTION (Ref: -VS or GND) VMon Mute on Threshold VMoff ATTmute Mute off Threshold Mute Attenuation t e l o 3.5 60 80 V dB Note (**): MUSIC POWER is the maximal power which the amplifier is capable of producing across the rated load resistance (regardless of non linearity) 1 sec after the application of a sinusoidal input signal of frequency 1KHz. s b O Note (**): Tested with optimized Application Board (see fig. 2) 3/11 TDA7296S Figure 2: Typical Application P.C. Board and Component Layout (scale 1:1) c u d e t le ) s ( ct u d o r P e t e l o s b O 4/11 o s b O - o r P ) s t( TDA7296S APPLICATION SUGGESTIONS (see Test and Application Circuits of the Fig. 1) The recommended values of the external components are those shown on the application circuit of Figure 1. Different values can be used; the following table can help the designer. LARGER THAN SUGGESTED SMALLER THAN SUGGESTED INCREASE INPUT IMPEDANCE DECREASE INPUT IMPEDANCE COMPONENTS SUGGESTED VALUE PURPOSE R1 (*) 22k INPUT RESISTANCE R2 680Ω R3 (*) 22k R4 22k ST-BY TIME CONSTANT LARGER ST-BY ON/OFF TIME SMALLER ST-BY ON/OFF TIME; POP NOISE R5 10k MUTE TIME CONSTANT LARGER MUTE ON/OFF TIME SMALLER MUTE ON/OFF TIME C1 0.47µF INPUT DC DECOUPLING C2 22µF FEEDBACK DC DECOUPLING C3 10µF MUTE TIME CONSTANT C4 10µF ST-BY TIME CONSTANT C5 22µFXN (***) BOOTSTRAPPING C6, C8 1000µF CLOSED LOOP GAIN DECREASE OF GAIN INCREASE OF GAIN SET TO 30dB (**) INCREASE OF GAIN DECREASE OF GAIN ) s ( ct u d o C7, C9 0.1µF r P e (*) R1 = R3 for pop optimization ) s t( HIGHER LOW FREQUENCY CUTOFF c u d LARGER MUTE ON/OFF TIME SMALLER MUTE ON/OFF TIME LARGER ST-BY ON/OFF TIME SMALLER ST-BY ON/OFF TIME; POP NOISE e t le o s b O - o r P HIGHER LOW FREQUENCY CUTOFF SIGNAL DEGRADATION AT LOW FREQUENCY SUPPLY VOLTAGE BYPASS SUPPLY VOLTAGE BYPASS DANGER OF OSCILLATION (**) Closed Loop Gain has to be ≥ 26dB t e l o (***) Multiply this value for the number of modular part connected s b O Slave function: pin 4 (Ref to pin 8 -VS) -VS +3V -VS +1V -VS MASTER UNDEFINED Note: If in the application, the speakers are connected via long wires, it is a good rule to add between the output and GND, a Boucherot Cell, in order to avoid dangerous spurious oscillations when the speakers terminal are shorted. The suggested Boucherot Resistor is 3.9Ω/2W and the capacitor is 1µF. SLAVE D98AU821 5/11 TDA7296S INTRODUCTION In consumer electronics, an increasing demand has arisen for very high power monolithic audio amplifiers able to match, with a low cost, the performance obtained from the best discrete designs. The task of realizing this linear integrated circuit in conventional bipolar technology is made extremely difficult by the occurence of 2nd breakdown phoenomenon. It limits the safe operating area (SOA) of the power devices, and, as a consequence, the maximum attainable output power, especially in presence of highly reactive loads. Moreover, full exploitation of the SOA translates into a substantial increase in circuit and layout complexity due to the need of sophisticated protection circuits. To overcome these substantial drawbacks, the use of power MOS devices, which are immune from secondary breakdown is highly desirable. 1) Output Stage The main design task in developping a power operational amplifier, independently of the technology used, is that of realization of the output stage. The solution shown as a principle shematic by Fig3 represents the DMOS unity - gain output buffer of the TDA7296S. This large-signal, high-power buffer must be capable of handling extremely high current and voltage levels while maintaining acceptably low harmonic distortion and good behaviour over frequency response; moreover, an accurate control of quiescent current is required. ) s ( ct A local linearizing feedback, provided by differential amplifier A, is used to fullfil the above requirements, allowing a simple and effective quiescent current setting. Proper biasing of the power output transistors alone is however not enough to guarantee the absence of crossover distortion. While a linearization of the DC transfer characteristic of the stage is obtained, the dynamic behaviour of the system must be taken into account. A significant aid in keeping the distortion contributed by the final stage as low as possible is provided by the compensation scheme, which exploits the direct connection of the Miller capacitor at the amplifier’s output to introduce a local AC feedback path enclosing the output stage itself. 2) Protections In designing a power IC, particular attention must be reserved to the circuits devoted to protection of the device from short circuit or overload conditions. Due to the absence of the 2nd breakdown phenomenon, the SOA of the power DMOS transistors is delimited only by a maximum dissipation curve dependent on the duration of the applied stimulus. In order to fully exploit the capabilities of the power transistors, the protection scheme implemented in this device combines a conventional SOA protection circuit with a novel local temperature sensing technique which " dynamically" controls the maximum dissipation. In addition to the overload protection described r P e t e l o s b O 6/11 e t le o s b O - Figure 3: Principle Schematic of a DMOS unity-gain buffer. u d o c u d o r P ) s t( TDA7296S Figure 4: Turn ON/OFF Suggested Sequence +Vs (V) +40 -40 -Vs VIN (mV) VST-BY PIN #9 (V) 5V VMUTE PIN #10 (V) 5V c u d IQ (mA) VOUT (V) e t le OFF ST-BY o s b O - PLAY MUTE above, the device features a thermal shutdown circuit which initially puts the device into a muting state (@ Tj = 150 oC) and then into stand-by (@ Tj = 160 oC). Full protection against electrostatic discharges on every pin is included. ) s ( ct u d o Figure 5: Single Signal ST-BY/MUTE Control Circuit r P e t e l o MUTE/ ST-BY s b O MUTE STBY 30K 1N4148 MUTE o r P OFF D98AU817 avoid any kind of uncontrolled audible transient at the output. The sequence that we recommend during the ON/OFF transients is shown by Figure 4. The application of figure 5 shows the possibility of using only one command for both st-by and mute functions. On both the pins, the maximum applicable range corresponds to the operating supply voltage. APPLICATION INFORMATION 20K 10K ST-BY ) s t( 10µF 10µF D93AU014 3) Other Features The device is provided with both stand-by and mute functions, independently driven by two CMOS logic compatible input pins. The circuits dedicated to the switching on and off of the amplifier have been carefully optimized to BRIDGE APPLICATION Another application suggestion is the BRIDGE configuration, where two TDA7296S are used. In this application, the value of the load must not be lower than 8 Ohm for dissipation and current capability reasons. A suitable field of application includes HI-FI/TV subwoofers realizations. The main advantages offered by this solution are: - High power performances with limited supply voltage level. - Considerably high output power even with high load values (i.e. 16 Ohm). With Rl= 8 Ohm, Vs = ±23V the maximum output power obtainable is 120W (Music Power) 7/11 TDA7296S The slave SGND pin must be tied to the negative supply. The slave ST-BY pin must be connected to ST-BY pin. The bootstrap lines must be connected together and the bootstrap capacitor must be increased: for N devices the boostrap capacitor must be 22µF times N. The slave Mute and IN-pins must be grounded. APPLICATION NOTE: (ref. fig. 7) Modular Application (more Devices in Parallel) The use of the modular application lets very high power be delivered to very low impedance loads. The modular application implies one device to act as a master and the others as slaves. The slave power stages are driven by the master device and work in parallel all together, while the input and the gain stages of the slave device are disabled, the figure below shows the connections required to configure two devices to work together. THE BOOTSTRAP CAPACITOR For compatibility purpose with the previous devices of the family, the boostrap capacitor can be connected both between the bootstrap pin (6) and the output pin (14) or between the boostrap pin (6) and the bootstrap loader pin (12). The master chip connections are the same as the normal single ones. The outputs can be connected together without the need of any ballast resistance. Figure 6: Modular Application Circuit +Vs C7 100nF R3 22K MASTER R2 680Ω C1 470nF IN- 2 IN+ 3 R5 10K SGND 4 MUTE 10 STBY 9 + ) s ( ct R4 22K C4 10µF o r P e C3 10µF t e l o bs O 13 e t le - MUTE VSTBY +PWVs 11 7 R1 22K VMUTE BUFFER DRIVER +Vs C2 22µF STBY o s b O THERMAL SHUTDOWN S/C PROTECTION 8 15 STBY-GND -Vs -PWVs C9 100nF IN+ 3 4 MUTE 10 9 STBY 5 C10 100nF R7 2Ω C5 47µF BOOTSTRAP CLIP DET C6 1000µF BUFFER DRIVER 7 +PWVs 13 11 - 14 OUT 12 BOOT LOADER + 6 MUTE THERMAL SHUTDOWN STBY S/C PROTECTION 1 8 15 STBY-GND -Vs -PWVs C9 100nF C8 1000µF -Vs 8/11 12 BOOT LOADER +Vs SLAVE SGND OUT -Vs +Vs 2 14 C8 1000µF C7 100nF IN- o r P 6 1 du c u d C6 1000µF 5 BOOTSTRAP D97AU808C ) s t( TDA7296S Figure 7a: Modular Application P.C. Board and Component Layout (scale 1:1) (Component SIDE) c u d e t le ) s t( o r P o s b O - Figure 7b: Modular Application P.C. Board and Component Layout (scale 1:1) (Solder SIDE) ) s ( ct u d o r P e t e l o s b O 9/11 TDA7296S mm DIM. MIN. TYP. inch MAX. MIN. TYP. MAX. A 5 0.197 B 2.65 0.104 C 1.6 D 0.063 1 0.039 E 0.49 0.55 0.019 0.022 F 0.66 0.75 0.026 0.030 G 1.02 1.27 1.52 0.040 0.050 0.060 G1 17.53 17.78 18.03 0.690 0.700 0.710 H1 19.6 0.862 0.874 0.886 0.870 0.886 0.772 H2 20.2 L 0.795 21.9 22.2 22.5 L1 21.7 22.1 22.5 0.854 L2 17.65 18.1 0.695 L3 17.25 17.5 17.75 0.679 0.689 0.699 L4 10.3 10.7 10.9 0.406 0.421 0.429 L7 2.65 2.9 0.104 M 4.25 4.55 4.85 0.167 0.179 0.191 M1 4.63 5.08 5.53 0.182 0.200 0.218 S 1.9 2.6 0.075 0.102 S1 1.9 2.6 0.075 0.102 Dia1 3.65 3.85 0.144 0.152 0.713 u d o r P e t e l o 10/11 c u d 0.114 ) s ( ct s b O OUTLINE AND MECHANICAL DATA o r P Multiwatt15 V o s b O - e t le ) s t( TDA7296S c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. 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