TSH103IDT

TSH103 Low cost triple video buffer/filter for standard video Features ■ Triple channels ■ Internal 6 MHz reconstruction filter (4th order) ■ 6 dB gain buffer for 75 Ω lines ■ 5 V single supply ■ Bottom of video signal close to 0 V ■ Data min. and max. physically tested and guaranteed during production SO-8 plastic package Pin connections Applications ■ Standard definition TVs ■ Set-top boxes ■ DVD players/recorders Description The TSH103 is a low-cost video buffer. It is dedicated to drive video signals from any video DAC output on 75 Ω video lines in standard definition. With a real benefit in terms of integration and cost saving, this product is particularly efficient for the replacement of current discrete solutions using transistors, coil and capacitors for buffering and filtering. IN1 1 + 6MHz LPF 6dB 8 OUT1 IN2 2 + 6MHz LPF 6dB 7 OUT2 IN3 3 + 6MHz LPF 6dB 6 OUT3 +Vcc 4 DC shifter 5 GND This triple channel is designed to drive either CVBS/Y-C or RGB or YPbPr or YUV formats. Each channel features an internal 6 MHz reconstruction filter and a 6 dB buffer (attenuation of 27 MHz sampling and good output impedance matching with the video line). The TSH103 requires a single 5 V power supply. It is available in an SO-8 plastic package. August 2009 Doc ID 13895 Rev 2 1/12 www.st.com 12 Absolute maximum ratings 1 TSH103 Absolute maximum ratings Table 1. Absolute maximum ratings Symbol Parameter VCC Supply voltage (1) Vin Maximum input voltage swing Value Unit 6 V 0 to 1.5 V Toper Operating free air temperature range -40 to +85 °C Tstg Storage temperature -65 to +150 °C Maximum junction temperature 150 °C Rthjc SO-8 thermal resistance junction to case 28 °C/W Rthja SO-8 thermal resistance junction to ambient area 157 °C/W ESD HBM: human body model (2) CDM: charged device model (3) MM: machine model (4) 3.5 1.5 200 kV kV V Tj Output short-circuit (5) 1. All voltage values are with respect to network terminal. 2. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for all couples of pin combinations with other pins floating. 3. Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to the ground. 4. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 Ω), done for all couples of pin combinations with other pins floating. 5. An output current limitation protects the circuit from transient currents. Short-circuits can cause excessive heating. Destructive dissipation can result from short-circuits on amplifiers. 2 Operating conditions Table 2. Symbol VCC Operating conditions Parameter Power supply voltage Value Unit 4.5 to 5.5 (1) V 1. This range is guaranteed by design (the product is tested in full production at a 5 V single power supply). 2/12 Doc ID 13895 Rev 2 TSH103 Electrical characteristics 3 Electrical characteristics Table 3. VCC = +5 V single supply, Tamb = 25° C (unless otherwise specified) Symbol Parameter Test conditions Min. Typ. Max. 100 310 430 Unit DC performance VDC Output DC shift Iib Input bias current ICC Supply current per channel G DC voltage gain RL = 150 Ω mV -40° C < Tamb < +85° C 312 Vin = 0 V 1.2 -40° C < Tamb < +85° C 1.4 Vin = 0.5 V DC 5.5 -40° C < Tamb < +85° C 5.6 RL = 150 Ω μA 7.1 mA 1.93 1.97 2 V/V -40° C < Tamb < +85° C 1.96 VOH High level output voltage RL = 150 Ω 3.9 VOL Low level output voltage RL = 150 Ω 41 IOUT Isink/Isource 56 V 46 mV mA Video performance -3 dB bandwidth Small signal, RL = 150 Ω -1 dB bandwidth Small signal, RL = 150 Ω Fatt Filter attenuation Small signal, F= 27 MHz 37 dB gd Group delay 0 to 5 MHz 10 ns dG Differential gain RL = 150 Ω 0.5 % dPh Differential phase RL = 150 Ω 0.5 ° Input voltage noise 100 kHz 76 nV/√Hz FCut 9.4 MHz 5.1 7.4 Noise en Doc ID 13895 Rev 2 3/12 Electrical characteristics Figure 1. TSH103 Frequency response Figure 2. Gain flatness 7.0 10 5 6.8 0 -5 6.6 -10 6.4 Gain (dB) Gain (dB) -15 -20 -25 -30 6.2 6.0 5.8 -35 5.6 -40 -45 -50 -55 5.4 Vcc = +4.5V, +5V, +5.5V Small signal Load = 150Ω -60 100k 5.2 1M 10M 5.0 100k 100M 27MHz Vcc = +4.5V, +5V, +5.5V Small signal Load = 150Ω 1M Frequency (Hz) Figure 3. 10M Frequency (Hz) Frequency response (large signal) Figure 4. Distortion -40 10 5 -45 0 -50 -5 Distortion (dB) -10 Gain (dB) -15 -20 -25 -30 -35 -40 -45 -50 -55 -60 -65 -70 -75 10M -90 0.0 100M Quiescent current vs. supply Figure 6. 6.0 260 5.5 240 5.0 220 4.5 200 1.0 1.5 2.0 2.5 3.0 3.5 4.0 Input noise vs. frequency No load Input to GND Vcc=+5V 180 en (nV/VHz) Icc (mA) 4.0 3.5 3.0 2.5 2.0 160 140 120 100 1.5 80 no input signal no load 1.0 0.5 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 60 5.5 40 1k 10k 100k Frequency (Hz) Vcc (V) 4/12 0.5 Output Amplitude (Vp-p) Frequency (Hz) 0.0 0.0 Vcc = +5V Vicm = +0.5V F = 1MHz Load = 150Ω -85 1M Figure 5. H3 -80 Vcc = +4.5V, +5V, +5.5V Vout = 2Vp-p Load = 150Ω -60 100k H2 -55 Doc ID 13895 Rev 2 1M TSH103 Power supply considerations Correct power supply bypassing is very important for optimizing performance in highfrequency ranges. The bypass capacitors should be placed as close as possible to the IC pins to improve high-frequency bypassing. A capacitor of 100 µF is necessary to minimize the power supply noise in low frequencies. For better quality bypassing, we recommend adding a CMS 100 nF capacitor, also placed as close as possible to the IC pins. Figure 7. Circuit for power supply bypassing +VCC CLF = 100 µF + CHF = 100 nF 4 IN1 IN2 IN3 OUT1 OUT2 OUT3 TSH103 5 AM04552 Figure 8. Noise supply rejection 0 -10 Noise supply rejection (dB) 4 Power supply considerations -20 -30 Vcc=+5Vdc+0.2Vac Load=150Ω CLF=100uF CHF=100nF -40 -50 -60 -70 -80 -90 -100 100k 1M 10M Frequency (Hz) Doc ID 13895 Rev 2 5/12 Using the TSH103 to drive video signals TSH103 5 Using the TSH103 to drive video signals Figure 9. Video line interface implementation schematics +5 V 2 Vpp 2.3 V 1 Vpp 1 Vpp Video DAC Y 1.15 V 1V 0.9 V 0.3 V GND GND 0.45 V 75 Ω 75 Ω cable DAC load resistor GND TV 75 Ω 1.4 Vpp 2.3 V 0.7 Vpp 0.7 Vpp 1.15 V 1V Video DAC Pb 0.9 V 0.3 V GND 75 Ω GND 75 Ω cable 0.45 V GND TSH103 DAC load resistor 75 Ω 1.4 Vpp 2.3 V 0.7 Vpp 0.7 Vpp 1.15 V 1V 0.9 V Video DAC Pr 0.3 V GND GND 75 Ω 75 Ω cable DAC load resistor 0.45 V GND 75 Ω AM04553 The bottom of the synchronization tip at the DAC output can be as low as 0 mV. In this case, the bottom is equal to 310 mV typical at the TSH103 output (see values of the output DC shift in Table 3). The Y signal can be properly driven by the TSH103 because its low output rail (VOL) is lower than 46 mV (Table 3). Figure 10. Details on Y or G or CVBS for synchronization tip Amplitude White (1 V) Y signal DAC Black (300 mV) GND Time Synchronization tip (close to zero volt) AM04554 6/12 Doc ID 13895 Rev 2 TSH103 Using the TSH103 to drive video signals The interface is illustrated in Figure 11. It is composed of: ● three 75-Ω resistors ● three matching resistors ● one 10 µF power supply decoupling capacitor ● one 10 nF power supply decoupling capacitor Figure 11. Implementation of the TSH103 (output DC and AC coupling) +5 V 75 Ω Cable TSH103 75 Ω Cable TSH173 SO-8 SO8 75 Ω Cable 220 µF 75 Ω + Cable TSH103 220 µF 75 Ω + Cable TSH173 SO-8 SO8 220 µF 75 Ω + Cable Y,G DAC R Pb,B,C DAC Pr,B, CVBS R DAC TV R +5 V Y,G DAC R Pb,B,C DAC R Pr,B, CVBS DAC TV R AM04555 1. Note that the TSH103 is input DC coupling only, and not AC coupling. Doc ID 13895 Rev 2 7/12 Package information 6 TSH103 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 8/12 Doc ID 13895 Rev 2 TSH103 6.1 Package information SO-8 package information Figure 12. SO-8 package mechanical drawing Table 4. SO-8 package mechanical data Dimensions Ref. Millimeters Min. Typ. A Inches Max. Min. Typ. 1.75 0.069 A1 0.10 A2 1.25 b 0.28 0.48 0.011 0.019 c 0.17 0.23 0.007 0.010 D 4.80 4.90 5.00 0.189 0.193 0.197 E 5.80 6.00 6.20 0.228 0.236 0.244 E1 3.80 3.90 4.00 0.150 0.154 0.157 e 0.25 Max. 0.004 0.010 0.049 1.27 0.050 h 0.25 0.50 0.010 0.020 L 0.40 1.27 0.016 0.050 L1 k ccc 1.04 0 0.040 8° 0.10 Doc ID 13895 Rev 2 1° 8° 0.004 9/12 Ordering information 7 Ordering information Table 5. 10/12 TSH103 Order codes Part number Temperature range Package Packing Marking TSH103ID -40° C to +85° C SO-8 Tube TSH103I TSH103IDT -40° C to +85° C SO-8 Tape & reel TSH103I Doc ID 13895 Rev 2 TSH103 8 Revision history Revision history Table 6. Document revision history Date Revision Changes 19-Sep-2007 1 Initial release. 20-Aug-2009 2 Document reformatted and graphics improved. Added ESD notes under Table 1: Absolute maximum ratings. Updated SO-8 package information in Chapter 6. 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The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2009 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Philippines - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 12/12 Doc ID 13895 Rev 2