VNB14NV04_10

VNB14NV04, VND14NV04 VND14NV04-1, VNS14NV04 "OMNIFET II" fully autoprotected Power MOSFET Features TYPE VNB14NV04 VND14NV04 VND14NV04-1 VNS14NV04 ■ ■ ■ ■ ■ ■ ■ ■ ■ RDS(on) Ilim Vclamp 3 3 2 TO-252 (DPAK) 35 mΩ 12 A 40 V 1 TO-251 (IPAK) 1 3 Linear current limitation Thermal shutdown Short circuit protection Integrated clamp Low current drawn from input pin Diagnostic feedback through input pin ESD protection Direct access to the gate of the Power MOSFET (analog driving) Compatible with standard Power MOSFET SO-8 D2PAK 1 Description The VNB14NV04, VND14NV04, VND14NV04-1 and VNS14NV04 are monolithic devices made using STMicroelectronics VIPower™ M0 technology, intended for replacement of standard power MOSFETS in DC to 50 KHz applications. Built-in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. Fault feedback can be detected by monitoring the voltage at the input pin. Table 1. Device summary Tube VNB14NV04 VND14NV04 VND14NV04-1 VNS14NV04 Tube (lead free) VNB14NV04-E VND14NV04-E VND14NV04-1-E Tape and reel VNB14NV0413TR VND14NV0413TR Tape and reel (lead free) VNB14NV04TR-E VND14NV04TR-E - Package D2PAK TO-252 (DPAK) TO-251 (IPAK) SO-8 April 2010 Doc ID 7393 Rev 8 1/31 www.st.com 1 Contents VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Contents 1 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Electrical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 2.2 2.3 Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 4 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Package thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.1 4.2 4.3 DPAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 D2PAK thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.1 5.2 5.3 5.4 5.5 ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 TO-251 (IPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 D2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 TO-252 (DPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 2/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 DPAK thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 D2PAK thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 TO-251 (IPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 D2PAK mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 TO-252 (DPAK) mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Doc ID 7393 Rev 8 3/31 List of figures VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. Figure 34. Figure 35. Figure 36. Figure 37. Figure 38. Figure 39. Figure 40. Figure 41. Figure 42. Figure 43. Figure 44. Figure 45. Figure 46. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain-source on resistance vs. input voltage (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain-source on resistance vs. input voltage (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . 12 Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain-source on resistance vs. id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-on current slope (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-on current slope (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Input voltage vs. input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-off drain source voltage slope (part 1/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-off drain source voltage slope (part 2/2). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching time resistive load (part 1/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching time resistive load (part 2/2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Normalized on resistance vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Normalized input threshold voltage vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Current limit vs. junction temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 DPAK maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . 16 DPAK demagnetization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 D2PAK maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . 17 D2PAK demagnetization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 DPAK PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 DPAK Rthj-amb vs PCB copper area in open box free air condition. . . . . . . . . . . . . . . . . . . 18 DPAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Thermal fitting model of an OMNIFET II in DPAK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 SO-8 PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 SO-8 Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . 20 D2PAK PC board(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 D2PAK Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . 21 D2PAK thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 22 Thermal fitting model of an OMNIFET II in D2PAK . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 TO-251 (IPAK) package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 D2PAK package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 TO-252 (DPAK) package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 SO-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Block diagram 1 Block diagram Figure 1. Block diagram Doc ID 7393 Rev 8 5/31 Electrical specification VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 2 Electrical specification Figure 2. Current and voltage conventions 2.1 Table 2. Symbol VDS VIN IIN RIN MIN ID IR VESD1 VESD2 Ptot EMAX Tj Tc Tstg Absolute maximum rating Absolute maximum rating Value Parameter SO-8 Drain-source voltage (VIN=0 V) Input voltage Input current Minimum input series impedance Drain current Reverse DC output current Electrostatic discharge (R=1.5 KΩ, C=100 pF) Electrostatic discharge on output pin only (R=330 Ω, C=150 pF) Total dissipation at Tc=25 °C Maximum switching energy (L=0.4 mH; RL=0 Ω; Vbat=13.5 V; Tjstart=150 °C; IL=18 A) Operating junction temperature Case operating temperature Storage temperature 4.6 74 93 Internally limited Internally limited -55 to 150 DPAK IPAK Internally clamped Internally clamped +/-20 10 Internally limited -15 4000 16500 74 74 93 D2PAK Unit V V mA Ω A A V V W mJ °C °C °C 6/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Electrical specification 2.2 Table 3. Symbol Rthj-case Rthj-lead Rthj-amb Thermal data Thermal data Value Parameter SO-8 Thermal resistance junction-case max Thermal resistance junction-lead max Thermal resistance junction-ambient max 27 90 (1) DPAK 1.7 IPAK 1.7 D2PAK 1.7 Unit °C/W °C/W 65 (1) 102 52 (1) °C/W 1. When mounted on a standard single-sided FR4 board with 0.5 cm2 of Cu (at least 35 µm thick) connected to all DRAIN pins. Horizontal mounting and no artificial air flow. 2.3 Table 4. Symbol Off Electrical characteristics -40 < Tj < 150 °C unless otherwise specified. Electrical characteristics Parameter Test Conditions Min Typ Max Unit VCLAMP Drain-source clamp voltage VCLTH VINTH IISS VINCL IDSS On RDS(on) Static drain-source on resistance Drain-source clamp threshold voltage Input threshold voltage Supply current from input pin Input-source clamp voltage Zero input voltage drain current (VIN=0 V) VIN=0 V; ID=7 A VIN=0 V; ID=2 mA VDS=VIN; ID=1 mA VDS=0 V; VIN=5 V IIN=1 mA IIN=-1 mA VDS=13 V; VIN=0 V; Tj=25 °C VDS=25 V; VIN=0 V 40 36 0.5 45 55 V V 2.5 100 150 8 -0.3 30 75 V µA V µA 6 -1.0 6.8 Vin = 5 V ID = 7 A Tj = 25 °C Vin = 5 V ID = 7 A 35 70 mΩ Dynamic (Tj=25°C, unless otherwise specified) gfs (1) Coss Switching td(on) tr td(off) tf Turn-on delay time Rise time Turn-off delay time Fall time VDD = 15 V ID = 7 A Vgen = 5 V Rgen = RIN MIN =10 Ω (see Figure 3) 80 350 450 150 250 1000 1350 500 ns ns ns ns Forward transconductance Output capacitance VDD = 13 V ID = 7 A VDS = 13 V f = 1 MHz VIN = 0 V 18 400 S pF Doc ID 7393 Rev 8 7/31 Electrical specification Table 4. Symbol td(on) tr td(off) tf VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Electrical characteristics (continued) Parameter Turn-on delay time Rise time Turn-off delay time Fall time VDD = 15 V ID = 7 A Vgen = 5 V Rgen = RIN MIN =10 Ω VDD = 12 V ID = 7 A Vin = 5 V; Igen = 2.13 mA (see Figure 7) VDD = 15 V Id = 7 A Vgen = 5 V Rgen = 2.2 KΩ (see Figure 3) Test Conditions Min Typ 1.5 9.7 Max 4.5 30.0 25.0 10.2 16 36.8 30.0 Unit µs µs µs µs A/µs nC (di/dt)on Turn-on current slope Qi Total input charge Source drain diode VSD(1) trr Qrr IRRM Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD = 7 A Vin = 0 V ISD = 7 A; di/dt = 40 A/µs VDD = 30 V L = 200 µH (see test circuit, Figure 4) 0.8 300 0.8 5 V ns µC A Protection Ilim tdlim Tjsh Tjrs Igf Drain current limit Step response current limit Over temperature shutdown Over temperature reset Fault sink current VIN = 5 V; VDS = 13 V; Tj = Tjsh starting Tj = 25 °C; VDD = 24 V VIN = 5 V; Rgen = RIN MIN = 10 Ω; L = 24 mH (see Figure 5 and Figure 6) VIN = 5 V; VDS = 13 V VIN = 5 V; VDS = 13 V 150 135 10 15 20 12 18 45 175 200 24 A µs °C °C mA Eas Single pulse avalanche energy 400 mJ 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % 8/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Protection features 3 Protection features During normal operation, the input pin is electrically connected to the gate of the internal power MOSFET through a low impedance path. The device then behaves like a standard power MOSFET and can be used as a switch from DC up to 50 KHz. The only difference from the user’s standpoint is that a small DC current IISS (typ. 100 µA) flows into the input pin in order to supply the internal circuitry. The device integrates: ● Overvoltage clamp protection: internally set at 45 V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. Linear current limiter circuit: limits the drain current ID to Ilim whatever the input pin voltages. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the over temperature threshold Tjsh. Over temperature and short circuit protection: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Over temperature cutout occurs in the range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature falls of about 15 °C below shutdown temperature. Status feedback: in the case of an over temperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the input pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the input pin driver is not able to supply the current Igf, the input pin will fall to 0 V. This will not however affect the device operation: no requirement is put on the current capability of the input pin driver except to be able to supply the normal operation drive current IISS. ● ● ● Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit. Doc ID 7393 Rev 8 9/31 Protection features Figure 3. VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Switching time test circuit for resistive load Figure 4. Test circuit for diode recovery times 10/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Protection features Figure 5. Unclamped inductive load test circuits Figure 6. Unclamped inductive waveforms Figure 7. Input charge test circuit Doc ID 7393 Rev 8 11/31 Protection features VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Figure 8. Source-drain diode forward characteristics Figure 9. Static drain source on resistance Figure 10. Derating curve Figure 11. Static drain-source on resistance vs. input voltage (part 1/2) Figure 12. Static drain-source on resistance vs. input voltage (part 2/2) Figure 13. Transconductance 12/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Protection features Figure 14. Static drain-source on resistance vs. id Figure 15. Transfer characteristics Figure 16. Turn-on current slope (part 1/2) Figure 17. Turn-on current slope (part 2/2) Figure 18. Input voltage vs. input charge Figure 19. Turn-off drain source voltage slope (part 1/2) Doc ID 7393 Rev 8 13/31 Protection features VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Figure 20. Turn-off drain source voltage slope Figure 21. Capacitance variations (part 2/2) Figure 22. Switching time resistive load (part 1/2) Figure 23. Switching time resistive load (part 2/2) Figure 24. Output characteristics Figure 25. Normalized on resistance vs. temperature 14/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Protection features Figure 26. Normalized input threshold voltage Figure 27. Current limit vs. junction vs. temperature temperatures Figure 28. Step response current limit Doc ID 7393 Rev 8 15/31 Protection features VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Figure 29. DPAK maximum turn-off current versus load inductance Legend: A= Single pulse at TJstart=150ºC B= Repetitive pulse at TJstart=100ºC C= Repetitive pulse at TJstart=125ºC Conditions: VCC=13.5 V Values are generated with RL=0Ω In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. Figure 30. DPAK demagnetization 16/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Protection features Figure 31. D2PAK maximum turn-off current versus load inductance Legend: A= Single pulse at TJstart=150ºC B= Repetitive pulse at TJstart=100ºC C= Repetitive pulse at TJstart=125ºC Conditions: VCC=13.5 V Values are generated with RL=0Ω In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves B and C. Figure 32. D2PAK demagnetization Doc ID 7393 Rev 8 17/31 Package thermal data VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 4 4.1 Package thermal data DPAK thermal data Figure 33. DPAK PC board(1) 1. Layout condition of Rth and Zth measurements (PCB FR4 area = 60 mm x 60 mm, PCB thickness=2 mm, Cu thickness=35 µm, Copper areas: from minimum pad lay-out to 8 cm2). Figure 34. DPAK Rthj-amb vs PCB copper area in open box free air condition 18/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Package thermal data Figure 35. DPAK thermal impedance junction ambient single pulse Figure 36. Thermal fitting model of an OMNIFET II in DPAK Pulse calculation formula Z TH δ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = t p ⁄ T Table 5. DPAK thermal parameter Footprint 0.1 0.35 1.20 2 15 61 0.0006 0.0021 0.05 24 6 Area/island(cm2) R1 (°C/W) R2 (°C/W) R3 ( °C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1 (W.s/°C) C2 (W.s/°C) C3 (W.s/°C) Doc ID 7393 Rev 8 19/31 Package thermal data Table 5. VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 DPAK thermal parameter (continued) Footprint 0.3 0.45 0.8 5 6 Area/island(cm2) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) 4.2 SO-8 thermal data Figure 37. SO-8 PC board(1) 1. Layout condition of Rth and Zth measurements (PCB FR4 area = 58 mm x 58 mm, PCB thickness=2 mm, Cu thickness=35 µm, Copper areas: 0.14 cm2, 0.6 cm2, 1.6 cm2). Figure 38. SO-8 Rthj-amb vs PCB copper area in open box free air condition 20/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Package thermal data 4.3 D2PAK thermal data Figure 39. D2PAK PC board(1) 1. Layout condition of Rth and Zth measurements (PCB FR4 area = 60 mm x 60 mm, PCB thickness=2 mm, Cu thickness=35 µm, Copper areas: from minimum pad lay-out to 8 cm2). Figure 40. D2PAK Rthj-amb vs PCB copper area in open box free air condition Doc ID 7393 Rev 8 21/31 Package thermal data VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Figure 41. D2PAK thermal impedance junction ambient single pulse Figure 42. Thermal fitting model of an OMNIFET II in D2PAK Pulse calculation formula Z TH δ = R TH ⋅ δ + Z THtp ( 1 – δ ) where δ = t p ⁄ T Table 6. D2PAK thermal parameter Footprint 0.1 0.35 0.3 4 9 37 0.0006 2.10E-03 22 6 Area/island(cm2) R1 (°C/W) R2 (°C/W) R3 ( °C/W) R4 (°C/W) R5 (°C/W) R6 (°C/W) C1 (W.s/°C) C2 (W.s/°C) 22/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Table 6. D2PAK thermal parameter (continued) Footprint 8.00E-02 0.45 2 3 Package thermal data Area/island(cm2) C3 (W.s/°C) C4 (W.s/°C) C5 (W.s/°C) C6 (W.s/°C) 6 5 Doc ID 7393 Rev 8 23/31 Package information VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 5 5.1 Package information ECOPACK® In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 5.2 TO-251 (IPAK) mechanical data Figure 43. TO-251 (IPAK) package dimension Table 7. TO-251 (IPAK) mechanical data Millimeters Dim. Min. A A1 A3 B B2 2.2 0.9 0.7 0.64 5.2 Typ. Max. 2.4 1.1 1.3 0.9 5.4 24/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Table 7. TO-251 (IPAK) mechanical data (continued) Millimeters Dim. Min. B3 B5 B6 C C2 D E G H L L1 L2 0.45 0.48 6 6.4 4.4 15.9 9 0.8 0.8 0.3 Typ. Package information Max. 0.85 0.95 0.6 0.6 6.2 6.6 4.6 16.3 9.4 1.2 1 5.3 D2PAK mechanical data Figure 44. D2PAK package dimension Doc ID 7393 Rev 8 25/31 Package information Table 8. VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 D2PAK mechanical data Millimeters Dim. Min. A A1 A2 B B2 C C2 D D1 E E1 G L L2 L3 M R V2 0° 4.88 15 1.27 1.4 2.4 0.4 8° 10 8.5 5.28 15.85 1.4 1.75 3.2 4.4 2.49 0.03 0.7 1.14 0.45 1.23 8.95 8 10.4 Typ. Max. 4.6 2.69 0.23 0.93 1.7 0.6 1.36 9.35 26/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Package information 5.4 TO-252 (DPAK) mechanical data Figure 45. TO-252 (DPAK) package dimension Table 9. TO-252 (DPAK) mechanical data Millimeters Dim. Min. A A1 A2 B B2 C C2 D D1 E E1 e G H L2 4.4 9.35 0.8 6.4 4.7 2.28 4.6 10.1 2.20 0.90 0.03 0.64 5.20 0.45 0.48 6 5.1 6.6 Typ. Max. 2.40 1.10 0.23 0.90 5.40 0.6 0.6 6.20 Doc ID 7393 Rev 8 27/31 Package information Table 9. VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 TO-252 (DPAK) mechanical data (continued) Millimeters Dim. Min. L4 R V2 Package weight 0° 0.6 0.2 8° Gr. 0.29 Typ. Max. 1 5.5 SO-8 mechanical data Figure 46. SO-8 package dimension Table 10. SO-8 mechanical data Millimeters Dim. Min. A a1 a2 b b1 1.75 0.25 1.65 0.85 0.25 0.35 0.19 Typ. Max. 2.40 0.1 28/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Table 10. SO-8 mechanical data (continued) Millimeters Dim. Min. C c1 D E e e3 F L M F 4 1.27 0.6 5 6.2 1.27 3.81 0.5 45 Typ. Package information Max. 0.25 4.8 5.8 3.8 0.4 8 Doc ID 7393 Rev 8 29/31 Revision history VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 6 Revision history Table 11. Date 21-Jun-2004 03-Apr-2009 Document revision history Revision 6 7 Initial release. Document reformatted. Added Table 1: Device summary on page 1. Updated Section 5: Package information on page 24 Added part number VNS14NV04. Added SO-8 package: – Updated Table 1: Device summary – Updated Table 2: Absolute maximum rating – Updated Table 3: Thermal data – Updated Chapter 4: Package thermal data – Updated Chapter 5: Package information Changes 06-Apr-2010 8 30/31 Doc ID 7393 Rev 8 VNB14NV04, VND14NV04, VND14NV04-1, VNS14NV04 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. 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