IRL640PBF

IRL640, SiHL640 www.vishay.com Vishay Siliconix Power MOSFET FEATURES PRODUCT SUMMARY VDS (V) • • • • • • • • 200 RDS(on) () VGS = 5.0 V 0.18 Qg max. (nC) 66 Qgs (nC) 9.0 Qgd (nC) 38 Configuration Single D Dynamic dV/dt rating Repetitive avalanche rated Available Logic-level gate drive Available RDS(on) specified at VGS = 4 V and 5 V Fast switching Ease of paralleling Simple drive requirements Material categorization: for definitions of compliance please see www.vishay.com/doc?99912 Note * This datasheet provides information about parts that are RoHS-compliant and / or parts that are non-RoHS-compliant. For example, parts with lead (Pb) terminations are not RoHS-compliant. Please see the information / tables in this datasheet for details. TO-220AB G DESCRIPTION G D S Third generation power MOSFETs from Vishay provides the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost effectiveness. The TO-220AB package is universally preferred for all commercial-industrial applications at power dissipation levels to approximately 50 W. The low thermal resistance and low package cost of the TO-220AB contribute to its wide acceptance throughout the industry. S N-Channel MOSFET ORDERING INFORMATION Package TO-220AB IRL640PbF Lead (Pb)-free SiHL640-E3 IRL640 SnPb SiHL640 ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted) PARAMETER SYMBOL LIMIT Drain-Source Voltage VDS 200 Gate-Source Voltage VGS ± 10 VGS at 5.0 V Continuous Drain Current TC = 25 °C TC = 100 °C Pulsed Drain Current a ID UNIT V 17 11 A IDM 68 1.0 W/°C Single Pulse Avalanche Energy b EAS 580 mJ Repetitive Avalanche Current a IAR 10 A Repetitive Avalanche Energy a EAR 13 mJ PD 125 W dV/dt 5.0 V/ns TJ, Tstg -55 to +150 Linear Derating Factor Maximum Power Dissipation Peak Diode Recovery dV/dt TC = 25 °C c Operating Junction and Storage Temperature Range Soldering Recommendations (Peak temperature) d Mounting Torque for 10 s 6-32 or M3 screw 300 °C 10 lbf · in 1.1 N·m Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 3.0 mH, Rg = 25  IAS = 17 A (see fig. 12). c. ISD  17 A, dI/dt  150 A/ms, VDD  VDS, TJ  150 °C. d. 1.6 mm from case. S16-0763-Rev. C, 02-May-16 Document Number: 91305 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL640, SiHL640 www.vishay.com Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER SYMBOL TYP. MAX. Maximum Junction-to-Ambient RthJA - 62 Case-to-Sink, Flat, Greased Surface RthCS 0.50 - Maximum Junction-to-Case (Drain) RthJC - 1.0 UNIT °C/W SPECIFICATIONS (TJ = 25 °C, unless otherwise noted) PARAMETER SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage VDS VGS = 0 V, ID = 250 μA 200 - - V VDS/TJ Reference to 25 °C, ID = 1 mA - 0.27 - V/°C VGS(th) VDS = VGS, ID = 250 μA 1.0 - 2.0 V Gate-Source Leakage IGSS VGS = ± 10 - - ± 100 nA Zero Gate Voltage Drain Current IDSS Drain-Source On-State Resistance RDS(on) VDS = 200 V, VGS = 0 V - - 25 VDS = 160 V, VGS = 0 V, TJ = 125 °C - - 250 VGS = 5.0 V ID = 10 A b - - 0.18 VGS = 4.0 V ID = 8.5 A b - - 0.27 - gfs VDS = 50 V, ID = 10 A b 16 - Input Capacitance Ciss 1800 - Coss VGS = 0 V, VDS = 25 V f = 1.0 MHz, see fig. 5 - Output Capacitance - 400 - - 120 - - - 66 Forward Transconductance μA  S Dynamic Reverse Transfer Capacitance Crss Total Gate Charge Qg Gate-Source Charge Qgs - - 9.0 Gate-Drain Charge Qgd - - 38 Turn-On Delay Time td(on) - 8.0 - tr - 83 - - 44 - - 52 - - 4.5 - Rise Time Turn-Off Delay Time td(off) Fall Time tf Internal Drain Inductance LD Internal Source Inductance LS VGS = 5.0 V ID = 17 A, VDS = 160 V, see fig. 6 and 13 b VDD = 100 V, ID = 17 A Rg = 4.6 , RD = 5.7, see fig. 10 b Between lead, 6 mm (0.25") from package and center of die contact D pF nC ns nH G - 7.5 - 0.3 - 1.2 - - 17 - - 68 S Gate Input Resistance Rg f = 1 MHz, open drain  Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current IS Pulsed Diode Forward Current a ISM Body Diode Voltage VSD Body Diode Reverse Recovery Time trr Body Diode Reverse Recovery Charge Qrr Forward Turn-On Time ton MOSFET symbol showing the  integral reverse p - n junction diode D A G S TJ = 25 °C, IS = 17 A, VGS = 0 V b TJ = 25 °C, IF = 17 A, dI/dt = 100 A/μs b - - 2.0 V - 310 470 ns - 3.2 4.8 μC Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width  300 μs; duty cycle  2 %. S16-0763-Rev. C, 02-May-16 Document Number: 91305 2 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL640, SiHL640 www.vishay.com Vishay Siliconix TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted) Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 4 - Normalized On-Resistance vs. Temperature S16-0763-Rev. C, 02-May-16 Document Number: 91305 3 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL640, SiHL640 www.vishay.com Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating Area S16-0763-Rev. C, 02-May-16 Document Number: 91305 4 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL640, SiHL640 www.vishay.com Vishay Siliconix RD VDS VGS D.U.T. Rg + - VDD 5V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) Fig. 9 - Maximum Drain Current vs. Case Temperature td(off) tr tf Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case L Vary tp to obtain required IAS VDS VDS tp VDD Rg D.U.T. + - IAS V DD VDS 5V tp 0.01 Ω Fig. 12a - Unclamped Inductive Test Circuit S16-0763-Rev. C, 02-May-16 IAS Fig. 12b - Unclamped Inductive Waveforms Document Number: 91305 5 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL640, SiHL640 www.vishay.com Vishay Siliconix Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ QG 5V 12 V 0.2 µF 0.3 µF QGS QGD + D.U.T. VG - VDS VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform S16-0763-Rev. C, 02-May-16 Fig. 13b - Gate Charge Test Circuit Document Number: 91305 6 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 IRL640, SiHL640 www.vishay.com Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit + D.U.T. Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + - - Rg • • • • + V - DD dV/dt controlled by Rg Driver same type as D.U.T. ISD controlled by duty factor “D” D.U.T. - device under test Driver gate drive Period P.W. + D= P.W. Period V GS = 10 V a D.U.T. ISD waveform Reverse recovery current D.U.T. VDS Body diode forward current dI/dt waveform Diode recovery dV/dt Re-applied voltage V DD Body diode forward drop Inductor current Ripple ≤ 5 % ISD Note a. VGS = 5 V for logic level devices Fig. 14 - For N-Channel           Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?91305. S16-0763-Rev. C, 02-May-16 Document Number: 91305 7 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 Package Information www.vishay.com Vishay Siliconix TO-220-1 A E DIM. Q H(1) D 3 2 L(1) 1 M* L b(1) INCHES MIN. MAX. MIN. MAX. A 4.24 4.65 0.167 0.183 b 0.69 1.02 0.027 0.040 b(1) 1.14 1.78 0.045 0.070 F ØP MILLIMETERS c 0.36 0.61 0.014 0.024 D 14.33 15.85 0.564 0.624 E 9.96 10.52 0.392 0.414 e 2.41 2.67 0.095 0.105 e(1) 4.88 5.28 0.192 0.208 F 1.14 1.40 0.045 0.055 H(1) 6.10 6.71 0.240 0.264 0.115 J(1) 2.41 2.92 0.095 L 13.36 14.40 0.526 0.567 L(1) 3.33 4.04 0.131 0.159 ØP 3.53 3.94 0.139 0.155 Q 2.54 3.00 0.100 0.118 ECN: X15-0364-Rev. C, 14-Dec-15 DWG: 6031 Note • M* = 0.052 inches to 0.064 inches (dimension including protrusion), heatsink hole for HVM C b e J(1) e(1) Package Picture ASE Revison: 14-Dec-15 Xi’an Document Number: 66542 1 For technical questions, contact: hvm@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. 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