Si6924AEDQ
Vishay Siliconix
N-Channel 2.5-V (G-S) Battery Switch, ESD Protection
FEATURES
PRODUCT SUMMARY
VDS (V)
28
RDS(on) (Ω)
ID (A)
0.033 at VGS = 4.5 V
4.6
0.038 at VGS = 3.0 V
4.3
0.042 at VGS = 2.5 V
4.1
•
•
•
•
•
•
Halogen-free
Low RDS(on)
VGS Max Rating: 14 V
Exceeds 2 kV ESD Protection
28 V VDS Rated
Symmetrical Voltage Blocking (Off Voltage)
RoHS
COMPLIANT
DESCRIPTION
The Si6924AEDQ is a dual N-Channel MOSFET with ESD
protection and gate over-voltage protection circuitry
incorporated into the MOSFET. The device is designed for
use in Lithium Ion battery pack circuits. The common-drain
construction takes advantage of the typical battery pack
topology, allowing a further reduction of the device’s onresistance. The 2-stage input protection circuit is a unique
design, consisting of two stages of back-to-back zener
diodes separated by a resistor. The first stage diode is
designed to absorb most of the ESD energy. The second
stage diode is designed to protect the gate from any
remaining ESD energy and over-voltages above the gates
inherent safe operating range. The series resistor used to
limit the current through the second stage diode during over
voltage conditions has a maximum value which limits the
input current to ≤ 10 mA at 14 V and the maximum toff to 12
µs. The Si6924AEDQ has been optimized as a battery or
load switch in Lithium Ion applications with the advantage of
both a 2.5 V RDS(on) rating and a safe 14 V gate-to-source
maximum rating.
APPLICATION CIRCUITS
ESD and
Overvoltage
Protection
D
ESD and
Overvoltage
Protection
R**
G
S
Battery Protection Circuit
*Thermal connection to drain pins is required to achieve specific performance
Figure 1. Typical Use In a Lithium Ion Battery Pack
Document Number: 72215
S-81056-Rev. B, 12-May-08
**R typical value is 3.3 kΩ by design.
See Typical Characteristics,
Gate-Current vs. Gate-Source Voltage, Page 3.
Figure 2. Input ESD and Overvoltage Protection Circuit
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Si6924AEDQ
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
*D
*D
3.3 kΩ
TSSOP-8
3.3 kΩ
G1
D
1
S1
2
S1
3
G1
4
Si6924AEDQ
G2
8 D
7 S2
6 S2
5 G2
S1
S2
N-Channel
Top View
Ordering Information: Si6924AEDQ-T1-GE3 (Lead (Pb)-free and Halogen-free)
N-Channel
*Thermal connection to drain pins is required to achieve specific performance.
Figure 3.
Figure 4.
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
Parameter
Symbol
10 s
Steady State
Drain-Source Voltage, Source-Drain Voltage
VDS
28
Gate-Source Voltage
VGS
± 14
Continuous Drain-to-Source Current (TJ = 150 °C)a
TA = 25 °C
TA = 70 °C
Pulsed Source Current (Diode Conduction)a
IS
TA = 25 °C
TA = 70 °C
PD
4.6
4.1
3.2
20
1.2
A
0.9
1.3
1.0
0.84
0.64
TJ, Tstg
Operating Junction and Storage Temperature Range
V
3.7
IDM
Pulsed Drain-to-Source Current
Maximum Power Dissipationa
ID
Unit
- 55 to 150
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambienta
Maximum Junction-to-Foot (Drain)
Symbol
t ≤ 10 s
Steady State
Steady State
RthJA
RthJF
Typical
Maximum
71
95
96
125
56
70
Unit
°C/W
Notes:
a. Surface Mounted on FR4 board.
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Document Number: 72215
S-81056-Rev. B, 12-May-08
Si6924AEDQ
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
VGS(th)
VDS = VGS, ID = 250 µA
0.6
Typ.
Max.
Unit
1.5
V
Static
Gate Threshold Voltage
VDS = 0 V, VGS = ± 4.5 V
±1
µA
VDS = 0 V, VGS = ± 14 V
± 20
mA
Gate-Body Leakage
IGSS
Zero Gate Voltage Drain Current
IDSS
On-State Drain Currentb
ID(on)
VDS ≥ 5 V, VGS = 5 V
VGS = 4.5 V, ID = 4.6 A
0.022
0.033
RDS(on)
VGS = 3.0 V, ID = 4.3 A
0.025
0.038
VGS = 2.5 V, ID = 4.1 A
0.029
0.042
gfs
VDS = 10 V, ID = 4.6 A
25
VSD
IS = 1.2 A, VGS = 0 V
0.7
1.1
6.5
10
Drain-Source On-State Resistanceb
Forward Transconductanceb
Diode Forward Voltage
b
VDS = 22.4 V, VGS = 0 V
1
VDS = 22.4 V, VGS = 0 V, TJ = 55 °C
5
µA
10
A
Ω
S
V
Dynamica
Qg
Total Gate Charge
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
td(on)
VDS = 10 V, VGS = 4.5 V, ID = 4.6 A
VDD = 10 V, RL = 10 Ω
ID ≅ 1 A, VGEN = 4.5 V, RG = 6 Ω
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
nC
1.2
1.5
0.95
1.5
1.4
2.1
7
11
3.1
5
µs
Notes:
a. Guaranteed by design, not subject to production testing.
b. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
0.020
10,000
0.015
I GSS - Gate Current (A)
I GSS - Gate Current (mA)
1,000
0.010
0.005
100
TJ = 150 °C
10
1
0.1
TJ = 25 °C
0.01
0.001
0.000
0
3
6
9
12
VGS - Gate-to-Source Voltage (V)
Gate-Current vs. Gate-Source Voltage
Document Number: 72215
S-81056-Rev. B, 12-May-08
15
0
2
4
6
8
10
12
14
VGS - Gate-to-Source Voltage (V)
Gate Current vs. Gate-Source Voltage
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Si6924AEDQ
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
25
25
VGS = 5 thru 2,5 V
20
I D - Drain Current (A)
I D - Drain Current (A)
20
15
2V
10
15
10
TC = 125 °C
5
5
25 °C
- 55 °C
0
0.00
0.25
0.50
0.75
1.00
1.25
0
0.0
1.50
1.0
2.0
2.5
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
3.0
V GS - Gate-to-Source Voltage (V)
5
0.04
VGS = 2.5 V
0.03
0.02
VGS = 4.5 V
VGS = 3 V
0.01
0.00
VDS = 10 V
ID = 4.6 A
4
3
2
1
0
0
4
8
12
16
20
0
1
2
ID - Drain Current (A)
4
5
6
7
Gate Charge
1.8
1.6
3
Qg - Total Gate Charge (nC)
On-Resistance vs. Drain Current
20
VGS = 4.5 V
ID = 4.6 A
10
I S - Source Current (A)
RDS(on) - On-Resistance
(Normalized)
1.5
VDS - Drain-to-Source Voltage (V)
0.05
RDS(on) - On-Resistance (Ω)
0.5
1.4
1.2
1.0
TJ = 150 °C
TJ = 25 °C
0.8
0.6
- 50
1
- 25
0
25
50
75
100
125
TJ - Junction Temperature (°C)
On-Resistance vs. Junction Temperature
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4
150
0
0.4
0.6
0.8
1.0
1.2
VSD - Source-to-Drain Voltage (V)
Source-Drain Diode Forward Voltage
Document Number: 72215
S-81056-Rev. B, 12-May-08
Si6924AEDQ
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
0.10
0.4
0.08
0.2
0.06
V GS(th) Variance (V)
R DS(on) - On-Resistance (Ω)
ID = 250 µA
ID = 4.6 AA
0.04
0.0
- 0.2
- 0.4
0.02
- 0.6
- 50
0.00
0
1
2
3
4
5
- 25
0
25
50
75
100
125
150
TJ - Temperature (°C)
VGS - Gate-to-Source Voltage (V)
On-Resistance vs. Gate-to-Source Voltage
Threshold Voltage
100
60
Limited
by R DS(on)*
50
ID - Drain Current (A)
10
Power (W)
40
30
20
1 ms
1
10 ms
100 ms
0.1
1s
TC = 25 °C
Single Pulse
10
10 s
DC
0.01
0
0.01
0.001
0.1
1
10
0.1
Time (s)
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Single Pulse Power
Safe Operating Area
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
Notes:
0.1
0.1
PDM
0.05
t1
t2
1. Duty Cycle, D =
0.02
t1
t2
2. Per Unit Base = RthJA = 96 °C/W
3. TJM - TA = PDMZthJA(t)
Single Pulse
0.01
10 -4
10 -3
4. Surface Mounted
10 -2
10 -1
1
10
100
600
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
Document Number: 72215
S-81056-Rev. B, 12-May-08
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Si6924AEDQ
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10 -4
10 -3
10 -2
10 -1
Square Wave Pulse Duration (s)
1
10
Normalized Thermal Transient Impedance, Junction-to-Foot
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?72215.
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Document Number: 72215
S-81056-Rev. B, 12-May-08
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Revision: 01-Jan-2022
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Document Number: 91000