TFDU4300-TR3

TFDU4300 Vishay Semiconductors Infrared Transceiver Module (SIR, 115.2 kbit/s) for IrDA® Applications Description The TFDU4300 is a low profile (2.5 mm) infrared transceiver module with independent logic reference voltage (Vlogic) for low voltage IO interfacing. It is compliant to the latest IrDA® physical layer standard for fast infrared data communication, supporting IrDA speeds up to 115.2 kbit/s (SIR) and carrier based remote control. The transceiver module consists of a PIN photodiode, an infrared emitter (IRED), and a low-power control IC to provide a total front-end solution in a single package. This device covers an extended IrDA low power range of close to 1 m. With an external current control resistor the current can be adjusted for shorter ranges. This Vishay SIR transceiver is built in a new smaller package using the experiences of the lead frame BabyFace technology. Features • Compliant to the latest IrDA physical layer specification (9.6 kbit/s to 115.2 kbit/s) and TV Remote Control, bi-directional operation included. e3 • Operates from 2.4 V to 5.5 V within specification over full temperature range from - 30 °C to + 85 °C • Logic voltage 1.5 V to 5.5 V is independent of IRED driver and analog supply voltage • Split power supply, transmitter and receiver can be operated from two power supplies with relaxed requirements saving costs, US patent • no. 6.157.476 • Extended IrDA low power range to about 70 cm • Typical remote control range 12 m • Low power consumption (< 0.12 mA supply current) 20101 The RXD output pulse width is independent of the optical input pulse width and stays always at a fixed pulse width thus making the device optimum for standard endecs. TFDU4300 has a tri-state output and is floating in shut-down mode with a weak pull-up. • Power shutdown mode (< 5 µA shutdown current in full temperature range, up to 85 °C) • Surface mount package, low profile (2.5 mm) - (L 8.5 mm × H 2.5 mm × W 2.9 mm) • High efficiency emitter • Low profile (universal) package capable of surface mount soldering to side and top view orientation • Directly interfaces with various super I/O and controller devices as e.g. TOIM4232 • Tri-state-receiver output, floating in shut down with a weak pull-up • Compliant with IrDA background light specification • EMI immunity in GSM bands > 300 V/m verified • Lead (Pb)-free device • Qualified for lead (Pb)-free and Sn/Pb processing (MSL4) • Device in accordance with RoHS 2002/95/EC and WEEE 2002/96EC Applications • Ideal for battery operated applications • Telecommunication products (cellular phones, pagers) • Digital still and video cameras • Printers, fax machines, photocopiers, screen projectors • Medical and industrial data collection • Diagnostic systems • Notebook computers, desktop PCs, palmtop computers (Win CE, Palm PC), PDAs www.vishay.com 204 • • • • • Internet TV boxes, video conferencing systems External infrared adapters (dongles) Data loggers GPS Kiosks, POS, point and pay devices including IrFM - applications For technical questions within your region, please contact one of the following: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com Document Number 82614 Rev. 1.8, 19-Feb-09 TFDU4300 Vishay Semiconductors Parts Table Part Description Qty/reel TFDU4300-TR1 Oriented in carrier tape for side view surface mounting 750 pcs TFDU4300-TR3 Oriented in carrier tape for side view surface mounting 2500 pcs TFDU4300-TT1 Oriented in carrier tape for top view surface mounting 750 pcs TFDU4300-TT3 Oriented in carrier tape for top view surface mounting 2500 pcs Product Summary Parameter Maximum data rate Dimensions Link distance Symbol HxLxW Value 115.2 2.5 x 8.5 x 2.9 0 to ≥ 0.7 Unit kbit/s mm x mm x mm m Operating voltage VCC 2.4 to 5.5 V Idle supply current ICC 0.075 mA Functional Block Diagram VCC1 Push-pull driver Amplifier Comparator RXD VCC2 SD TXD Logic and control Controlled driver REDC GND 18282 Pin Description Pin number Function Description 1 VCC2 IRED anode Connect IRED anode directly to the power supply (VCC2). IRED current can be decreased by adding a resistor in series between the power supply and IRED anode. A separate unregulated power supply can be used at this pin. I/O Active 2 IRED cathode TXD This Schmitt-Trigger input is used to transmit serial data when SD is low. An on-chip protection circuit disables the LED driver if the TXD pin is asserted for longer than 300 μs. The input threshold voltage adapts to and follows the logic voltage swing defined by the applied Vlogic voltage. IRED Cathode, internally connected to the driver transistor I High 4 RXD Received Data Output, push-pull CMOS driver output capable of driving standard CMOS or TTL loads. During transmission the RXD output is inactive. No external pull-up or pull-down resistor is required. Floating with a weak pull-up of 500 kΩ (typ.) in shutdown mode. The voltage swing is defined by the applied Vlogic voltage. O Low 5 SD Shutdown. The input threshold voltage adapts to and follows the logic voltage swing defined by the applied Vlogic voltage. I High 6 VCC1 Supply voltage 7 Vlogic Vlogic defines the logic voltage level of the I/O ports to adap the logic voltage swing to the IR controller. The RXD output range is from 0 V to Vlogic, for optimum noise suppression the inputs-logic decision level is 0.5 x Vlogic. 8 GND Ground 3 Document Number 82614 Rev. 1.8, 19-Feb-09 I For technical questions within your region, please contact one of the following: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com www.vishay.com 205 TFDU4300 Vishay Semiconductors Pinout Definitions: TFDU4300 weight 75 mg In the Vishay transceiver data sheets the following nomenclature is used for defining the IrDA operating modes: SIR: 2.4 kbit/s to 115.2 kbit/s, equivalent to the basic serial infrared standard with the physical layer version IrPhy 1.0 MIR: 576 kbit/s to 1152 kbit/s FIR: 4 Mbit/s VFIR: 16 Mbit/s 5 6 1 2 3 4 8 7 IRED A IRED C TXD RXD SD Vcc Vlog GND 18101 MIR and FIR were implemented with IrPhy 1.1, followed by IrPhy 1.2, adding the SIR Low Power Standard. IrPhy 1.3 extended the Low Power Option to MIR and FIR and VFIR was added with IrPhy 1.4. A new version of the standard in any case obsoletes the former version. With introducing the updated versions the old versions are obsolete. Therefore the only valid IrDA standard is the actual version IrPhy 1.4 (in Oct. 2002). Absolute Maximum Ratings Reference point ground (pin 8) unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Test conditions Symbol Min. Supply voltage range, transceiver - 0.3 V < VCC2 < 6 V - 0.5 V < Vlogic < 6 V VCC1 Supply voltage range, transmitter - 0.5 V < VCC1 < 6 V - 0.5 V < Vlogic < 6 V Supply voltage range, Vlogic Max. Unit - 0.5 + 6.0 V VCC2 - 0.5 + 6.0 V - 0.5 V < VCC1 < 6 V - 0.3 V < VCC2 < 6 V Vlogic - 0.5 + 6.0 V RXD output voltage - 0.5 V < VCC1 < 6 V - 0.3 V < Vlogic < 6 V VRXD - 0.5 Vlogic + 0.5 V Voltage at all inputs Note: Vin ≥ VCC1 is allowed VIN - 0.5 + 6.0 V Input current Typ. for all pins, except IRED anode pin 10 mA 25 mA PD 250 mW TJ 125 °C °C Output sinking current Power dissipation see derating curve Junction temperature Ambient temperature range (operating) Storage temperature range Soldering temperature - 30 + 85 Tstg - 40 + 100 °C 260 °C IIRED(DC) 125 mA IIRED(RP) 600 mA see recommended solder profile Average output current, pin 1 Repetitive pulsed output current, pin 1 to pin 2 Tamb t < 90 µs, ton < 20 % Note: We apologize to use sometimes in our documentation the abbreviation LED and the word light emitting diode instead of Infrared Emitting Diode (IRED) for IR-emitters. That is by definition wrong; we are here following just a bad trend. Typical values are for design aid only, not guaranteed nor subject to production testing and may vary with time. Eye Safety Information Vishay transceivers operating inside the absolute maximum ratings are classified as eye safe according the following table. Standard Classification IEC/EN 60825-1 (2007-03), DIN EN 60825-1 (2008-05) "SAFETY OF LASER PRODUCTS Part 1: equipment classification and requirements", simplified method Class 1 IEC 62471 (2006), CIE S009 (2002) "Photobiological Safety of Lamps and Lamp Systems" Exempt DIRECTIVE 2006/25/EC OF THE EUROPEAN PARLIAMENT AND OF THE COUNCIL of 5th April 2006 on the minimum health and safety requirements regarding the exposure of workers to risks arising from physical agents (artificial optical radiation) (19th individual Directive within the meaning of Article 16(1) of Directive 89/391/EEC) Exempt www.vishay.com 206 For technical questions within your region, please contact one of the following: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com Document Number 82614 Rev. 1.8, 19-Feb-09 TFDU4300 Vishay Semiconductors Electrical Characteristics Transceiver Tested at Tamb = 25 °C, VCC1 = VCC2 = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Supply voltage Idle supply current at VCC1 (receive mode, no signal) Idle supply current at Vlogic (receive mode, no signal) Average dynamic supply current, transmitting Standby supply current Standby supply current, Vlogic Operating temperature range Output voltage low, RXD Output voltage high, RXD Test conditions Symbol Min. Remark: For 2.4 V < VCC1 < 2.6 V at Tamb < - 25 °C a minor reduction of the receiver sensitivity may occur VCC1 2.4 SD = low, Ee = 1 klx (1), Tamb = - 25 °C to + 85 °C, VCC1 = VCC2 = 2.7 V to 5.5 V ICC1 90 SD = low, Ee = 1 klx (1), Tamb = 25 °C, VCC1 = VCC2 = 2.7 V to 5.5 V ICC1 75 SD = low, Ee = 1 klx (1), Vlog, pin 7, no signal, no load at RXD Ilog 1 µA IIRED = 300 mA, 20 % Duty Cycle ICC1 0.65 mA SD = high, T = 25 °C, Ee = 0 klx SD = high, T = 70 °C SD = high, T = 85 °C no signal, no load - 0.5 0.1 2 3 1 + 85 0.15 x Vlogic µA µA µA µA °C CLoad = 15 pF ISD ISD ISD Ilog TA VOL IOH = - 500 µA VOH 0.8 x Vlogic Vlogic + 0.5 V IOH = - 250 µA, CLoad = 15 pF RXD to VCC1 impedance Input voltage low (TXD, SD) Input voltage high (TXD, SD) CMOS level (2), Vlogic ≥ 2.5 V Input voltage high (TXD, SD) CMOS level (2), Vlogic < 2.5 V VIN = 0.9 x Vlogic Input leakage current (TXD, SD) Controlled pull down current Input capacitance (TXD, SD) Typ. - 30 VOH 0.9 x Vlogic RRXD 400 VIL VIH Max. Unit 5.5 V 130 µA µA V Vlogic + 0.5 V 600 kΩ - 0.5 Vlogic - 0.5 0.5 V 6 V VIH 0.8 x Vlogic 6 V IICH -2 +2 µA + 150 µA 1 µA 5 pF SD, TXD = "0" to "1", VIN < 0.15 Vlogic IIRTx SD, TXD = "0" to "1", VIN > 0.7 Vlogic IIRTx -1 500 0 CIN Notes: (1) Standard illuminant A. (2) To provide an improved immunity with increasing Vlogic the typical threshold level is increasing with Vlogic and set to 0.5 x Vlogic. It is recommended to use the specified min/max values to avoid increased operating current. Document Number 82614 Rev. 1.8, 19-Feb-09 For technical questions within your region, please contact one of the following: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com www.vishay.com 207 TFDU4300 Vishay Semiconductors Optoelectronic Characteristics Receiver Tested at Tamb = 25 °C, VCC1 = VCC2 = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Test conditions Typ. Max. Unit Ee 40 (4) 80 (8) mW/m2 (µW/cm2) λ = 850 nm to 900 nm Ee 5 (500) Maximum no detection irradiance (1) λ = 850 nm to 900 nm tr, tf < 40 ns, tpo = 1.6 µs at f = 115 kHz, no output signal allowed Ee 4 (0.4) Rise time of output signal 10 % to 90 %, CL = 15 pF tr(RXD) 20 100 Fall time of output signal 90 % to 10 %, CL = 15 pF tf(RXD) 20 100 ns RXD pulse width of output signal input pulse length > 1.2 µs tPW 1.65 3.0 µs input irradiance = 100 mW/m2, ≤ 115.2 kbit/s 250 ns after shutdown active or power-on 150 µs 150 µs Minimum irradiance Ee in angular range (2) 9.6 kbit/s to 115.2 kbit/s λ = 850 nm to 900 nm; α = 0°, 15° Maximum Irradiance Ee In Angular Range (3) Stochastic jitter, leading edge Standby/shutdown delay, receiver startup time Latency Symbol Min. tL kW/m2 (mW/cm2) mW/m2 (µW/cm2) 2.0 100 ns Notes: (1) Equivalent to IrDA background light and electromagnetic field test: fluorescent lighting immunity. (2) IrDA sensitivity definition: minimum irradiance Ee in angular range, power per unit area. The receiver must meet the BER specification while the source is operating at the minimum intensity in angular range into the minimum half-angular range at the maximum link length. (3) Maximum irradiance E in angular range, power per unit area. The optical delivered to the detector by a source operating at the e maximum intensity in angular range at minimum link length must not cause receiver overdrive distortion and possible related link errors. If placed at the active output interface reference plane of the transmitter, the receiver must meet its bit error ratio (BER). For more definitions see the document “Symbols and Terminology” on the Vishay website. Transmitter Tested at Tamb = 25 °C, VCC1 = VCC2 = 2.7 V to 5.5 V unless otherwise noted. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Parameter Test conditions (1) IRED operating current limitation No external resistor for current limitation Forward voltage of built-in IRED Output leakage IRED current Output radiant intensity Symbol ID Min. Typ. Max. Unit 250 300 350 mA If = 300 mA Vf 1.4 1.8 1.9 V TXD = 0 V, 0 < VCC1 < 5.5 V IIRED -1 1 µA α = 0°, 15° TXD = high, SD = low Ie 30 VCC1 = 5.0 V, α = 0°, 15° TXD = low or SD = high (Receiver is inactive as long as SD = high) Ie Output radiant intensity, angle of half intensity λp Spectral bandwidth Δλ ± 24 880 input pulse width 1.6 < tTXD < 20 µs topt 900 input pulse width tTXD ≥ 20 µs topt tTXD - 0.15 Optical overshoot 20 mW/ sr ° 45 tropt, tfopt Optical rise time, fall time Optical output pulse duration 0.04 α Peak - emission wavelength (2) mW/ sr 65 nm nm 100 ns tTXD + 0.15 µs 300 µs 25 % Notes: (1) Using an external current limiting resistor is allowed and recommended to reduce IRED intensity and operating current when current reduction is intended to operate at the IrDA low power conditions. E.g. for VCC2 = 3.3 V a current limiting resistor of RS = 56 Ω will allow a power minimized operation at IrDA low power conditions. (2) Due to this wavelength restriction compared to the IrDA spec of 850 nm to 900 nm the transmitter is able to operate as source for the standard remote control applications with codes as e.g. Phillips RC5/RC6® or RECS 80. www.vishay.com 208 For technical questions within your region, please contact one of the following: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com Document Number 82614 Rev. 1.8, 19-Feb-09 TFDU4300 Vishay Semiconductors Recommended Circuit Diagram Operated with a clean low impedance power supply the TFDU4300 needs no additional external components. However, depending on the entire system design and board layout, additional components may be required (see figure 1). VIRED VCC2, IRED A R1*) VCC R2 GND C1 C2 VCC1 Ground Vlogic Vlogic SD SD TXD TXD RXD RXD IRED C 19295 Figure 1. Recommended Application Circuit *) R1 is optional when reduced intensity is used The capacitor C1 is buffering the supply voltage and eliminates the inductance of the power supply line. This one should be a Tantalum or other fast capacitor to guarantee the fast rise time of the IRED current. The resistor R1 is the current limiting resistor, which may be used to reduce the operating current to levels below the specified controlled values for saving battery power. Vishay’s transceivers integrate a sensitive receiver and a built-in power driver. The combination of both needs a careful circuit board layout. The use of thin, long, resistive and inductive wiring should be avoided. The shutdown input must be grounded for normal operation, also when the shutdown function is not used. Document Number 82614 Rev. 1.8, 19-Feb-09 Table 1. Recommended Components Application Circuit Component Recommended value C1 4.7 µF, 16 V Vishay part number 293D 475X9 016B C2 0.1 µF, Ceramic VJ 1206 Y 104 J XXMT R1 depends on current to be adjusted R2 47 Ω, 0.125 W CRCW-1206-47R0-F-RT1 The inputs (TXD, SD) and the output RXD should be directly connected (DC - coupled) to the I/O circuit. The capacitor C2 combined with the resistor R2 is the low pass filter for smoothing the supply voltage. R2, C1 and C2 are optional and dependent on the quality of the supply voltages VCC1 and injected noise. An unstable power supply with dropping voltage during transmision may reduce the sensitivity (and transmission range) of the transceiver. The placement of these parts is critical. It is strongly recommended to position C2 as close as possible to the transceiver pins. When extended wiring is used as in bench tests the inductance of the power supply can cause dynamically a voltage drop at VCC2. Often some power supplies are not able to follow the fast current rise time. In that case another 4.7 µF (type, see table under C1) at VCC2 will be helpful. Under extreme EMI conditions as placing an RF-transmitter antenna on top of the transceiver, we recommend to protect all inputs by a low-pass filter, as a minimum a 12 pF capacitor, especially at the RXD port. The transceiver itself withstands EMI at a GSM frequencies above 500 V/m. When interference is observed, the wiring to the inputs picks it up. It is verified by DPI measurements that as long as the interfering RF - voltage is below the logic threshold levels of the inputs and equivalent levels at the outputs no interferences are expected. One should keep in mind that basic RF - design rules for circuits design should be taken into account. Especially longer signal lines should not be used without termination. See e.g. “The Art of Electronics” Paul Horowitz, Winfield Hill, 1989, Cambridge University Press, ISBN: 0521370957. For technical questions within your region, please contact one of the following: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com www.vishay.com 209 TFDU4300 Vishay Semiconductors Vbatt ~ 3 V VDD = 1.8 V VS = 2.8 V Vdd IRED Anode (1) IRED Cathode (2) IRTX TXD (3) IRRX RXD (4) IR MODE SD (5) VCC1 (6) R2 Vlogic (7) C2 GND (8) 19296 Figure 2. Typical application circuit Current Derating Diagram Figure 3 shows the maximum operating temperature when the device is operated without external current limiting resisor. I/O and Software In the description, already different I/Os are mentioned. Different combinations are tested and the function verified with the special drivers available from the I/O suppliers. In special cases refer to the I/O manual, the Vishay application notes, or contact directly Vishay Sales, Marketing or Application. For operating at RS232 ports the ENDEC TOIM4232 is recommended. 90 Ambient Temperature (°C ) Figure 2 shows an example of a typical application for to work with low voltage logic (connected to VDD), a seperate supply voltage VS and using the transceiver with the IRED Anode connected to the unregulated battery Vbatt. This method reduces the peak load of the regulated power supply and saves therefore costs. Alternatively all supplies can also be tied to only one voltage source. R1 and C1 are not used in this case and are depending on the circuit design in most cases not necessary. 85 80 75 70 65 60 55 50 2.0 18097 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Operating Voltage (V) at duty cycle 20 % Figure 3. Current Derating Diagram Table 2. Truth table Inputs SD TXD High > 1 ms x Low Outputs Remark RXD Transmitter Operation x Weakly pulled (500 kΩ) to VCC1 0 Shutdown High x High inactive Ie Transmitting Low High > 50 µs x High inactive 0 Protection is active Low Low min. irradiance Ee < max. irradiance Ee Low (active) 0 Response to an IrDA compliant optical input signal Low Low > max. Irradiance Ee Undefined 0 Overload conditions can cause unexpected outputs www.vishay.com 210 Optical input irradiance mW/m2 For technical questions within your region, please contact one of the following: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com Document Number 82614 Rev. 1.8, 19-Feb-09 TFDU4300 Vishay Semiconductors Recommended Solder Profiles 260 240 220 200 180 160 140 120 100 80 60 40 20 0 240 °C max. 10 s max. at 230 °C 2 to 4 °C/s 160 °C max. 120 to180 s Storage The storage and drying processes for all VISHAY transceivers (TFDUxxxx and TFBSxxx) are equivalent to MSL4. The data for the drying procedure is given on labels on the packing and also in the application note “Taping, Labeling, Storage and Packing”. 90 s max. 275 2 to 4 °C/s T ≥ 255 °C for 10 s....30 s 250 225 0 50 100 19535 150 200 250 300 350 Time/s Figure 4. Recommended Solder Profile for Sn/Pb soldering Temperature/°C Temperature (°C) Solder Profile for Sn/Pb Soldering Tpeak = 260 °C T ≥ 217 °C for 70 s max. 200 175 150 30 s max. 125 100 90 s to 120 s 70 s max. 2 °C to 4 °C/s 75 2 °C to 3 °C/s 50 25 0 50 100 150 200 250 300 350 Time/s Figure 5. Solder Profile, RSS Recommendation 280 Tpeak = 260 °C max. 240 200 < 4 °C/s 160 1.3 °C/s 120 Time above 217 °C t ≤ 70 s Time above 250 °C t ≤ 40 s < 2 °C/s Peak temperature Tpeak = 260 °C 80 40 0 0 TFDU Fig3 Wave Soldering For TFDUxxxx and TFBSxxxx transceiver devices wave soldering is not recommended. 0 19532 Temperature/°C Lead (Pb)-free, Recommended Solder Profile The TFDU4300 is a lead (Pb)-free transceiver and qualified for lead (Pb)-free processing. For lead (Pb)-free solder paste like Sn(3.0-4.0)Ag(0.5-0.9) Cu, there are two standard reflow profiles: RampSoak-Spike (RSS) and Ramp-To-Spike (RTS). The Ramp-Soak-Spike profile was developed primarily for reflow ovens heated by infrared radiation. With widespread use of forced convection reflow ovens the Ramp-To-Spike profile is used increasingly. Shown below in figure 5 and 6 are VISHAY's recommended profiles for use with the TFDU4300 transceivers. For more details please refer to the application note “SMD Assembly Instructions”. A ramp-up rate less than 0.9 °C/s is not recommended. Ramp-up rates faster than 1.3 °C/s could damage an optical part because the thermal conductivity is less than compared to a standard IC. 50 100 150 200 250 300 Time/s Figure 6. RTS Recommendation Manual Soldering Manual soldering is the standard method for lab use. However, for a production process it cannot be recommended because the risk of damage is highly dependent on the experience of the operator. Nevertheless, we added a chapter to the above mentioned application note, describing manual soldering and desoldering. Document Number 82614 Rev. 1.8, 19-Feb-09 For technical questions within your region, please contact one of the following: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com www.vishay.com 211 TFDU4300 Vishay Semiconductors Package Dimensions in mm 20627 Footprint Mounting Center Mounting Center 7 x 0.95 = 6.65 0.7 0.7 (8 x) Top View Side View * min 0.2 Photoimageable solder mask recommended between pads to prevent bridgeing www.vishay.com 212 For technical questions within your region, please contact one of the following: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com (0.25) 1.2 1.4 1.4 0.4 0.95 (1.82) 0.2* 20626 Document Number 82614 Rev. 1.8, 19-Feb-09 TFDU4300 Vishay Semiconductors Reel Dimensions in mm Drawing-No.: 9.800-5090.01-4 Issue: 1; 29.11.05 14017 Tape width A max. N W1 min. W2 max. W3 min. mm mm mm mm mm mm mm 16 180 60 16.4 22.4 15.9 19.4 16 330 50 16.4 22.4 15.9 19.4 Document Number 82614 Rev. 1.8, 19-Feb-09 For technical questions within your region, please contact one of the following: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com W3 max. www.vishay.com 213 TFDU4300 Vishay Semiconductors Tape Dimensions in mm Drawing-No.: 9.700-5280.01-4 Issue: 1; 03.11.03 19855 Figure 7. Tape drawing, TFDU4300 for top view mounting www.vishay.com 214 For technical questions within your region, please contact one of the following: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com Document Number 82614 Rev. 1.8, 19-Feb-09 TFDU4300 Vishay Semiconductors 19856 Drawing-No.: 9.700-5279.01-4 Issue: 1; 08.12.04 19856 Figure 8. Tape drawing, TFDU4300 for side view mounting Document Number 82614 Rev. 1.8, 19-Feb-09 For technical questions within your region, please contact one of the following: irdasupportAM@vishay.com, irdasupportAP@vishay.com, irdasupportEU@vishay.com www.vishay.com 215 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1