SIHFP23N50L

IRFP23N50L, SiHFP23N50L Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 150 44 72 Single D FEATURES 500 0.190 • Superfast Body Diode Eliminates the Need for External Diodes in ZVS Applications • Lower Gate Charge Results in Simpler Drive Requirements Available RoHS* COMPLIANT • Enhanced dV/dt Capabilities Offer Improved Ruggedness • Higher Gate Voltage Threshold Offers Improved Noise Immunity • Lead (Pb)-free Available TO-247 APPLICATIONS • Zero Voltage Switching SMPS G • Telecom and Server Power Supplies • Uninterruptible Power Supplies • Motor Control Applications S N-Channel MOSFET S D G ORDERING INFORMATION Package Lead (Pb)-free SnPb TO-247 IRFP23N50LPbF SiHFP23N50L-E3 IRFP23N50L SiHFP23N50L ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque for 10 s 6-32 or M3 screw TC = 25 °C EAS IAR EAR PD dV/dt TJ, Tstg VGS at 10 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID IDM LIMIT 500 ± 30 23 15 92 2.9 410 23 37 370 14 - 55 to + 150 300d 10 1.1 W/°C mJ A mJ W V/ns °C lbf · in N·m A UNIT V Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 °C, L = 1.5 mH, RG = 25 Ω, IAS = 23 A (see fig. 12). c. ISD ≤ 23 A, dI/dt ≤ 430 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91209 S-81352-Rev. A, 16-Jun-08 www.vishay.com 1 IRFP23N50L, SiHFP23N50L Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain) SYMBOL RthJA RthCS RthJC TYP. 0.24 MAX. 40 0.34 UNIT °C/W SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance Effective Output Capacitance (Energy Related) Internal Gate Resistance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Reverse Recovery Current Forward Turn-On Time IS ISM VSD trr Qrr IRRM ton MOSFET symbol showing the integral reverse p - n junction diode TJ = 25 °C TJ = 125 °C TJ = 25 °C TJ =1 25 °C TJ = 25 °C IF = 23 A, dI/dt = 100 A/µsb D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS ΔVDS/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss Coss Coss eff. Coss eff. (ER) RG Qg Qgs Qgd td(on) tr td(off) tf VGS = 0 V, ID = 250 µA Reference to 25 °C, ID = 1 mAd VDS = VGS, ID = 250 µA VGS = ± 30 V VDS = 500 V, VGS = 0 V VDS = 400 V, VGS = 0 V, TJ = 125 °C VGS = 10 V ID = 1 4 A b VDS = 50 V, ID = 14 Ab VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VDS = 1.0 V , f = 1.0 MHz VDS = 400 V , f = 1.0 MHz VGS = 0 V VDS = 0 V to 400 Vc VDS = 0 V to 400 Vd f = 1 MHz, open drain VGS = 10 V ID = 23 A, VDS = 400 V see fig. 6 and 13b 500 3.0 12 - 0.27 0.190 3600 380 37 4800 100 220 160 1.2 26 94 53 45 5.0 ± 100 50 2.0 0.235 150 44 72 - V V/°C V nA µA mA Ω S pF Ω nC VDD = 250 V, ID = 23 A RG = 6.0, VGS = 10 V see fig. 10b ns - 170 220 560 980 7.6 23 A 92 1.5 250 330 840 1500 11 V ns µC A G S TJ = 25 °C, IS = 14 A, VGS = 0 Vb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising fom 0 to 80 % VDS. d. Coss eff. (ER) is a fixed capacitance that stores the same energy time as Coss while VDS is rising fom 0 to 80 % VDS. www.vishay.com 2 Document Number: 91209 S-81352-Rev. A, 16-Jun-08 IRFP23N50L, SiHFP23N50L Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 1000.00 TOP ID, Drain-to-Source Current (A) ID, Drain-to Source Current (A) 10 TJ = 25 °C 100.00 1 TJ = 150 °C 0.1 10.00 0.01 4.5 V 20µs PULSE WIDTH Tj = 25 °C 20 µs PULSE WIDTH 1.00 0.001 0.1 1 10 100 TJ = 150°C 1.0 6.0 11.0 16.0 VDS, Drain-to-Source Voltage (V) VGS, Gate-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics Fig. 3 - Typical Transfer Characteristics 100 TOP RDS(ON), Drain-to-Source On Resistance (Normalized) ID, Drain-to-Source Current (A) 10 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 3.0 ID = 23 A 2.5 2.0 1.5 1 4,5 V 1.0 20µs PULSE WIDTH Tj = 150 °C 0.1 0.5 VGS = 10 V 0.0 1 10 100 -60 -40 -20 0 20 40 60 80 100 120 140 160 VDS, Drain-to-Source Voltage (V) TJ, Junction Temperature (°C) Fig. 2 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91209 S-81352-Rev. A, 16-Jun-08 www.vishay.com 3 IRFP23N50L, SiHFP23N50L Vishay Siliconix 100000 12 VGS, Gate-to-Source Voltage (V) C, Capacitance (pF) 10000 f = 1 MHZ VGS = 0 V, Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd Ciss ID = 23 VDS = 400 V VDS = 250 V VDS = 100 V 10 7 1000 5 Coss 100 2 Crss 10 1 10 100 1000 0 0 24 48 72 96 120 VDS, Drain-to-Source Voltage (V) QG, Total Gate Charge (nC) Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage 25 100.00 ISD, Reverse Drain Current (A) 20 TJ = 150 °C 10.00 Energy (µJ) 15 10 TJ = 25 °C 1.00 5 VGS = 0 V 0 0 100 200 300 400 500 600 0.10 0.0 0.5 1.0 1.5 2.0 Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage VDS , Drain-to-Source Voltage (V) VSD, Source-to-Drain Voltage (V) Fig. 8 - Typical Source-Drain Diode Forward Voltage 1000 25 OPERATION IN THIS AREA LIMITED BY RDS(ON) 20 ID, Drain Current (A) 100 10us ID, Drain Current (A) 15 100us 10 1ms 10 5 1 TC = 25 °C TJ = 150 °C Single Pulse 10 100 10ms 0 1000 10000 25 50 75 100 125 150 VDS, Drain-to-Source Voltage (V) TC, Case Temperature (°C) Fig. 9 - Maximum Safe Operating Area Fig. 10 - Maximum Drain Current vs. Case Temperature www.vishay.com 4 Document Number: 91209 S-81352-Rev. A, 16-Jun-08 IRFP23N50L, SiHFP23N50L Vishay Siliconix RD VDS VGS RG D.U.T. + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % VDS 90 % 10 % VGS td(on) tr td(off) tf Fig. 11a - Switching Time Test Circuit Fig. 11b - Switching Time Waveforms 10 (Z thJC) 1 D = 0.50 Thermal Response 0.1 0.20 0.10 0.05 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t1 / t2 2. PeakT J = P DM x Z thJC + T C 0.01 0.02 0.01 0.001 0.00001 0.0001 0.001 0.01 0.1 1 t1, Rectangular Pulse Duration (sec) Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Case 750 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 - 75 - 50 - 25 0 25 50 75 100 125 150 EAS, Single Pulse Avalanche Energy (mJ) VGS(th) Gate Threshold Voltage (V) 600 ID 10A 15A BOTTOM 23A TOP ID = 250 µA 450 300 150 0 25 50 75 100 125 150 TJ, Temperature (°C) Starting T , Junction Temperature (°C) Fig. 13 - Threshold Voltage vs. Temperature Fig. 14 - Maximum Avalanche Energy s. Drain Current Document Number: 91209 S-81352-Rev. A, 16-Jun-08 www.vishay.com 5 IRFP23N50L, SiHFP23N50L Vishay Siliconix VDS 15 V tp Driver VDS L RG 20 V D.U.T IAS tp + - VDD A 0.01Ω IAS Fig. 15b - Unclamped Inductive Waveforms Fig. 15a - Unclamped Inductive Test Circuit Current regulator Same type as D.U.T. 50 kΩ 12 V 0.2 µF 0.3 µF 10 V + QG D.U.T. VGS 3 mA - VDS QGS QGD VG Charge IG ID Current sampling resistors Fig. 16a - Gate Charge Test Circuit Fig. 16b - Basic Gate Charge Waveform www.vishay.com 6 Document Number: 91209 S-81352-Rev. A, 16-Jun-08 IRFP23N50L, SiHFP23N50L Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T + Circuit Layout Considerations • Low Stray Inductance • Ground Plane • Low Leakage Inductance Current Transformer + + - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test + VDD Driver Gate Drive P.W. Period D= P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current dI/dt D.U.T. VDS Waveform Diode Recovery dV/dt VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop Ripple ≤ 5% ISD * VGS = 5V for Logic Level Devices Fig. 17 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91209. Document Number: 91209 S-81352-Rev. A, 16-Jun-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1