SIHFP31N50L

IRFP31N50L, SiHFP31N50L Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 210 58 100 Single D FEATURES 500 0.15 • Super Fast Body Diode Eliminates the Need for External Diodes in ZVS Applications • Lower Gate Charge Results in Simpler Drive Requirements Available RoHS* COMPLIANT • Enhanced dV/dt Capabilities Offer Improved Ruggedness • Higher Gate Voltage Threshold Offers Improved Noise Immunity • Lead (Pb)-free Available TO-247 APPLICATIONS G S D G S N-Channel MOSFET • Zero Voltage Switching SMPS • Telecom and Server Power Supplies • Uninterruptible Power Supplies • Motor Control Applications ORDERING INFORMATION Package Lead (Pb)-free SnPb TO-247 IRFP31N50LPbF SiHFP31N50L-E3 IRFP31N50L SiHFP31N50L ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Pulsed Drain Currenta Linear Derating Factor Single Pulse Avalanche Energyb Repetitive Avalanche Currenta Repetitive Avalanche Energya Maximum Power Dissipation Peak Diode Recovery dV/dtc Operating Junction and Storage Temperature Range Soldering Recommendations (Peak Temperature) Mounting Torque for 10 s 6-32 or M3 screw TC = 25 °C EAS IAR EAR PD dV/dt TJ, Tstg VGS at 10 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID IDM LIMIT 500 ± 30 31 20 124 3.7 460 31 46 460 19 - 55 to + 150 300d 10 1.1 W/°C mJ A mJ W V/ns °C lbf · in N·m A UNIT V Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Starting TJ = 25 °C, L = 1 mH, RG = 25 Ω, IAS = 31 A (see fig. 12). c. ISD ≤ 31 A, dI/dt ≤ 422 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91220 S-81274-Rev. A, 16-Jun-08 www.vishay.com 1 IRFP31N50L, SiHFP31N50L Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Case-to-Sink, Flat, Greased Surface Maximum Junction-to-Case (Drain) SYMBOL RthJA RthCS RthJC TYP. 0.24 MAX. 40 0.26 UNIT °C/W SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance Effective Output Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Internal Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Reverse Recovery Current IS ISM VSD trr Qrr IRRM MOSFET symbol showing the integral reverse p - n junction diode D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT V V/°C V nA µA mA Ω S VDS ΔVDS/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss Coss Coss eff. Coss eff. (ER) Qg Qgs Qgd rG td(on) tr td(off) tf VGS = 0 V, ID = 250 µA Reference to 25 °C, ID = 1 mA VDS = VGS, ID = 250 µA VGS = ± 30 V VDS = 500 V, VGS = 0 V VDS = 400 V, VGS = 0 V, TJ = 125 °C VGS = 10 V ID = 1 9 Ab VDS = 50 V, ID = 19 Ab 500 3.0 15 - 0.28 0.15 5000 553 59 6630 155 276 200 1.1 28 115 54 53 5.0 ± 100 50 2.0 0.18 210 58 100 - VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 VDS = 1.0 V , f = 1.0 MHz VGS = 0 V VDS = 400 V , f = 1.0 MHz VDS = 0 V to 400 Vc pF VGS = 10 V ID = 31 A, VDS = 400 V, see fig. 7 and 13b nC Ω f = 1 MHz, open drain VDD = 250 V, ID = 31 A, RG = 4.3 Ω, see fig. 10b ns - 170 220 570 1.2 7.9 31 A 124 1.5 250 330 860 1.8 12 V ns nC µC A G S TJ = 25 °C, IS = 31 A, VGS = 0 TJ = 25 °C, IF = 31 A Vb - TJ = 125 °C, dI/dt = 100 A/µsb TJ = 25 °C, IS = 31 A, VGS = 0 Vb TJ = 125 °C, dI/dt = 100 A/µsb TJ = 25 °C Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Forward Turn-On Time ton Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS. Coss eff. (ER) is a fixed capacitance that stores the same energy as Coss while VDS is rising from 0 to 80 % VDS. www.vishay.com 2 Document Number: 91220 S-81274-Rev. A, 16-Jun-08 IRFP31N50L, SiHFP31N50L Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted 100 Top VGS 15 V 12 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V 1000 ID, Drain-to-Source Current (A) ID, Drain-to-Source Current (A) 100 Bottom 100 TJ = 150 °C 10 10 1 5.0 V 0.1 20 μs PULSE WIDTH TJ = 25 °C 100 10 TJ = 25 °C 1 0.01 0.1 0.1 4 5 VDS = 50 V 20 μs PULSE WIDTH 6 9 8 7 VGS, Gate-to-Source Voltage (V) 10 11 1 VDS, Drain-to-Source Voltage (V) Fig. 1 - Typical Output Characteristics Fig. 3 - Typical Transfer Characteristics 100 Top RDS(on), Drain-to-Source On Resistance (Normalized) 3.0 ID, Drain-to-Source Current (A) 10 Bottom VGS 15 V 12 V 10 V 8.0 V 7.0 V 6.0 V 5.5 V 5.0 V ID = 31 A 2.5 2.0 1 5.0 V 1.5 1.0 0.1 0.5 VGS = 10 V 20 40 60 80 100 120 140 160 0.01 0.1 20 μs PULSE WIDTH TJ = 25 °C 10 1 VDS, Drain-to-Source Voltage (V) 100 0.0 - 60 - 40 - 20 0 TJ, Junction Temperature Fig. 2 - Typical Output Characteristics Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91220 S-81274-Rev. A, 16-Jun-08 www.vishay.com 3 IRFP31N50L, SiHFP31N50L Vishay Siliconix 20 VGS = 0 V, Ciss = Cgs + Cgd, Cds Crss = Cgd Coss = Cds + Cgd f = 1 MHz SHORTED VGS, Gate-to-Source Voltage (V) 12 ID = 31 A VDS = 400 V VDS = 250 V VDS = 100 V 10000000 1000000 C, Capacitance (pF) 10000 Ciss 1000 Coss 100 Crss 10 1 10 100 1000 VDS, Drain-to-Source Voltage (V) 8 4 0 0 120 40 80 QG, Total Gate Charge (nC) 160 Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Gate Charge vs. Gate-to-Source Voltage 30 1000 25 ISD, Reverse Drain Current (A) 100 TJ = 150 °C 10 20 Energy (μs) 15 10 TJ = 25 °C 1 5 0 0 100 200 300 400 500 600 VDS, Drain-to-Source Voltage (V) 0.1 0.2 VGS = 0 V 1.4 1.0 0.6 VSD, Source-to-Drain Voltage (V) 1.8 Fig. 6 - Output Capacitance Stored Energy vs. VDS Fig. 8 - Typical Source Drain Diode Forward Voltage www.vishay.com 4 Document Number: 91220 S-81274-Rev. A, 16-Jun-08 IRFP31N50L, SiHFP31N50L Vishay Siliconix RD 35 VGS RG VDS D.U.T. + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % 30 25 20 15 10 ID, Drain Current (A) Fig. 10a - Switching Time Test Circuit VDS 90 % 5 0 25 10 % VGS td(on) tr td(off) tf 50 75 100 125 150 TC, Case Temperature (°C) Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms 1 Thermal Response (ZthJC) D = 0.50 0.1 0.20 0.10 0.05 0.02 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t1/ t2 2. Peak TJ = PDM x ZthJC + TC 0.01 0.001 0.00001 0.0001 0.001 0.01 0.1 1 t 1, Rectangular Pulse Duration (sec) Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case 15 V VDS tp VDS L Driver RG 20 V tp D.U.T IAS 0.01 Ω + A - VDD A IAS Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms Document Number: 91220 S-81274-Rev. A, 16-Jun-08 www.vishay.com 5 IRFP31N50L, SiHFP31N50L Vishay Siliconix 1000 1000 OPERATION IN THIS AREA LIMITED BY RDS(on) EAS, Single Pulse Avalanche Energy (mJ) 800 ID 14A 20A BOTTOM 30A TOP ID, Drain Current (A) 100 10us 600 100us 400 10 1ms 10ms 1 TC = 25 °C TJ = 150 °C Single Pulse 10 100 200 1000 0 25 50 75 100 125 150 VDS, Drain-to-Source Voltage (V) Fig. 12c - Maximum Avalanche Energy vs. Drain Current Starting TJ, Junction Temperature(°C) Fig. 12d - Gate Charge Test Circuit Current regulator Same type as D.U.T. QG 12 V 0.2 µF 0.3 µF 50 kΩ VGS QGS QGD D.U.T. + - VDS VG VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Maximum Safe Operating Area Fig. 13b - Basic Gate Charge Waveform www.vishay.com 6 Document Number: 91220 S-81274-Rev. A, 16-Jun-08 IRFP31N50L, SiHFP31N50L Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + + - RG • • • • dV/dt controlled by R G Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test + VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Inductor current Body diode forward drop Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91220. Document Number: 91220 S-81274-Rev. A, 16-Jun-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1