74AVC4T774BQ-Q100X

74AVC4T774-Q100 4-bit dual supply translating transceiver; 3-state Rev. 1 — 11 May 2022 Product data sheet 1. General description The 74AVC4T774-Q100 is a 4-bit, dual supply transceiver that enables bidirectional level translation. It features eight 1-bit input-output ports (An and Bn), four direction control inputs (DIR1, DIR2, DIR3 and DIR4), an output enable input (OE) and dual supply pins (VCC(A) and VCC(B)). Both VCC(A) and VCC(B) can be supplied at any voltage between 0.8 V and 3.6 V making the device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V and 3.3 V). Pins An, OE and DIRn are referenced to VCC(A) and pins Bn are referenced to VCC(B). A HIGH on DIRn allows transmission from An to Bn and a LOW on DIRn allows transmission from Bn to An. The output enable input (OE) can be used to disable the outputs so the buses are effectively isolated. The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. In suspend mode when either VCC(A) or VCC(B) are at GND level, both An and Bn are in the high-impedance OFF-state. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits • • • • • • • • • Automotive product qualification in accordance with AEC-Q100 (Grade 1) • Specified from -40 °C to +85 °C and from -40 °C to +125 °C Wide supply voltage range: • VCC(A): 0.8 V to 3.6 V • VCC(B): 0.8 V to 3.6 V Complies with JEDEC standards: • JESD8-12 (0.8 V to 1.3 V) • JESD8-11 (0.9 V to 1.65 V) • JESD8-7 (1.2 V to 1.95 V) • JESD8-5 (1.8 V to 2.7 V) • JESD8-B (2.7 V to 3.6 V) ESD protection: • HBM JESD22-A114E Class 3B exceeds 8000 V • CDM JESD22-C101C exceeds 1500 V Maximum data rates: • 380 Mbit/s (≥ 1.8 V to 3.3 V translation) • 200 Mbit/s (≥ 1.1 V to 3.3 V translation) • 200 Mbit/s (≥ 1.1 V to 2.5 V translation) • 200 Mbit/s (≥ 1.1 V to 1.8 V translation) • 150 Mbit/s (≥ 1.1 V to 1.5 V translation) • 100 Mbit/s (≥ 1.1 V to 1.2 V translation) Suspend mode Latch-up performance exceeds 100 mA per JESD 78 Class II Inputs accept voltages up to 3.6 V IOFF circuitry provides partial Power-down mode operation 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AVC4T774BQ-Q100 -40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal SOT763-1 enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 × 3.5 × 0.85 mm 74AVC4T774GU-Q100 -40 °C to +125 °C XQFN16 plastic, extremely thin quad flat package; no leads; 16 terminals; body 1.80 × 2.60 × 0.50 mm SOT1161-1 4. Marking Table 2. Marking codes Type number Marking code 74AVC4T774BQ-Q100 C4T774 74AVC4T774GU-Q100 B77 5. Functional diagram B1 B2 B3 B4 VCC(B) VCC(A) OE Fig. 1. A1 DIR1 A2 DIR2 A3 DIR3 A4 DIR4 001aao069 Logic symbol OE An DIRn Bn VCC(A) VCC(B) to next transceiver Fig. 2. 001aao070 Logic diagram (one 1-bit transceiver) 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 2 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state 6. Pinning information 6.1. Pinning 15 VCC(B) A1 3 14 B1 A2 4 13 B2 A3 5 12 B3 A4 6 DIR3 7 GND(1) terminal 1 index area 11 B4 8 9 DIR4 OE 10 GND aaa-027526 13 VCC(B) 2 14 VCC(A) DIR2 15 DIR1 74AVC4T774 16 DIR2 1 terminal 1 index area 16 VCC(A) DIR1 74AVC4T774 A1 1 12 B1 A2 2 11 B2 A3 3 10 B3 A4 4 9 B4 Fig. 3. Pin configuration SOT763-1 (DHVQFN16) GND 8 OE 7 DIR3 5 (1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND. DIR4 6 Transparent top view aaa-027527 Transparent top view Fig. 4. Pin configuration SOT1161-1 (XQFN16) 6.2. Pin description Table 3. Pin description Symbol Pin Description SOT763-1 SOT1161-1 16 14 supply voltage A (An, OE and DIRn inputs are referenced to VCC(A)) DIR1, DIR2, DIR3, DIR4 1, 2, 7, 8 15, 16, 5, 6 direction control input A1, A2, A3, A4 3, 4, 5, 6 1, 2, 3, 4 data input or output GND 10 8 ground (0 V) B1, B2, B3, B4 14, 13, 12, 11 12, 11, 10, 9 data input or output OE 9 7 output enable input (active LOW) VCC(B) 15 13 supply voltage B (Bn pins are referenced to VCC(B)) VCC(A) 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 3 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. The An, DIRn and OE input circuit is referenced to VCC(A); The Bn input circuit is referenced to VCC(B). Supply voltage Input VCC(A), VCC(B) OE DIR1 DIR2 DIR3 DIR4 An Bn 0.8 V to 3.6 V L L X X X A1 = B1 input B1 0.8 V to 3.6 V L H X X X input A1 B1 = A1 0.8 V to 3.6 V L X L X X A2 = B2 input B2 0.8 V to 3.6 V L X H X X input A2 B2 = A2 0.8 V to 3.6 V L X X L X A3 = B3 input B3 0.8 V to 3.6 V L X X H X input A3 B3 = A3 0.8 V to 3.6 V L X X X L A4 = B4 input B4 0.8 V to 3.6 V L X X X H input A4 B4 = A4 0.8 V to 3.6 V H X X X X Z Z GND [1] X X X X X Z Z [1] Input/output If at least one of VCC(A) or VCC(B) is at GND level, the device goes into suspend mode. 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC(A) supply voltage A -0.5 +4.6 V VCC(B) supply voltage B -0.5 +4.6 V IIK input clamping current VI input voltage IOK output clamping current VO < 0 V VO output voltage Active mode VI < 0 V -50 - -0.5 +4.6 -50 - [1][2][3] -0.5 VCCO + 0.5 V Suspend or 3-state mode [1] -0.5 +4.6 V [2] - ±50 mA - 100 mA [1] mA V mA IO output current VO = 0 V to VCCO ICC supply current ICC(A) or ICC(B) IGND ground current -100 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 500 mW - 250 mW Tamb = -40 °C to +125 °C SOT763-1 (DHVQFN16) [4] SOT1161-1 (XQFN16) [1] [2] [3] [4] The minimum input voltage ratings and output voltage ratings may be exceeded if the input and output current ratings are observed. VCCO is the supply voltage associated with the output port. VCCO + 0.5 V should not exceed 4.6 V. For SOT763-1 (DHVQFN16) package: Ptot derates linearly with 11.2 mW/K above 106 °C. 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 4 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state 9. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Conditions Min Max Unit VCC(A) supply voltage A 0.8 3.6 V VCC(B) supply voltage B 0.8 3.6 V VI input voltage 0 3.6 V VO output voltage 0 VCCO V 0 3.6 V -40 +125 °C - 10 Active mode [1] Suspend or 3-state mode Tamb ambient temperature Δt/ΔV input transition rise and fall rate [1] [2] VCCI =0.8 V to 3.6 V [2] ns/V VCCO is the supply voltage associated with the output port. VCCI is the supply voltage associated with the input port. 10. Static characteristics Table 7. Typical static characteristics at Tamb = 25 °C VCCI is the supply voltage associated with the data input port. VCCO is the supply voltage associated with the output port. At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Min Typ Max VOH VI = VIH or VIL HIGH-level output voltage IO = -1.5 mA; VCC(A) = VCC(B) = 0.8 V - 0.69 - V VI = VIH or VIL LOW-level output voltage IO = 1.5 mA; VCC(A) = VCC(B) = 0.8 V - 0.07 - V - ±0.025 ±0.25 μA [1] - ±0.5 ±2.5 μA [1] - ±0.5 ±2.5 μA [1] - ±0.5 ±2.5 μA VOL Conditions II input leakage DIRn, OE input; VI = 0 V or 3.6 V; current VCC(A) = VCC(B) = 0.8 V to 3.6 V IOZ A or B port; VO = 0 V or VCCO; VCC(A) = VCC(B) = 3.6 V OFF-state output current suspend mode A port; V = 0 V or V O CCO; VCC(A) = 3.6 V; VCC(B) = 0 V suspend mode B port; VO = 0 V or VCCO; VCC(A) = 0 V; VCC(B) = 3.6 V Unit power-off leakage current A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V - ±0.1 ±1 μA B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V - ±0.1 ±1 μA CI input capacitance DIRn, OE input; VI = 0 V or 3.3 V; VCC(A) = VCC(B) = 3.3 V - 2.0 - pF CI/O input/output capacitance A and B port; VO = 3.3 V or 0 V; VCC(A) = VCC(B) = 3.3 V - 4.0 - pF IOFF [1] For I/O ports, the parameter IOZ includes the input leakage current. 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 5 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state Table 8. Static characteristics VCCI is the supply voltage associated with the data input port. VCCO is the supply voltage associated with the output port. At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol VIH Parameter HIGH-level input voltage Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Max Min Max VCCI = 0.8 V 0.70VCCI - 0.70VCCI - V VCCI = 1.1 V to 1.95 V 0.65VCCI - 0.65VCCI - V VCCI = 2.3 V to 2.7 V 1.6 - 1.6 - V VCCI = 3.0 V to 3.6 V 2 - 2 - V VCC(A) = 0.8 V 0.70VCC(A) - 0.70VCC(A) - V VCC(A) = 1.1 V to 1.95 V 0.65VCC(A) - 0.65VCC(A) - V VCC(A) = 2.3 V to 2.7 V 1.6 - 1.6 - V VCC(A) = 3.0 V to 3.6 V 2 - 2 - V VCCI = 0.8 V - 0.30VCCI - 0.30VCCI V VCCI = 1.1 V to 1.95 V - 0.35VCCI - 0.35VCCI V VCCI = 2.3 V to 2.7 V - 0.7 - 0.7 V VCCI = 3.0 V to 3.6 V - 0.8 - 0.8 V VCC(A) = 0.8 V - 0.30VCC(A) - 0.30VCC(A) V VCC(A) = 1.1 V to 1.95 V - 0.35VCC(A) - 0.35VCC(A) V VCC(A) = 2.3 V to 2.7 V - 0.7 - 0.7 V VCC(A) = 3.0 V to 3.6 V - 0.8 - 0.8 V VCCO - 0.1 - VCCO - 0.1 - V IO = -3 mA; VCC(A) = VCC(B) = 1.1 V 0.85 - 0.85 - V IO = -6 mA; VCC(A) = VCC(B) = 1.4 V 1.05 - 1.05 - V IO = -8 mA; VCC(A) = VCC(B) = 1.65 V 1.2 - 1.2 - V IO = -9 mA; VCC(A) = VCC(B) = 2.3 V 1.75 - 1.75 - V IO = -12 mA; VCC(A) = VCC(B) = 3.0 V 2.3 - 2.3 - V data input DIRn, OE input VIL LOW-level input voltage data input DIRn, OE input VOH VI = VIH or VIL HIGH-level output voltage IO = -100 μA; VCC(A) = VCC(B) = 0.8 V to 3.6 V 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 6 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state Symbol VOL Parameter Conditions -40 °C to +85 °C Max Min Max - 0.1 - 0.1 V IO = 3 mA; VCC(A) = VCC(B) = 1.1 V - 0.25 - 0.25 V IO = 6 mA; VCC(A) = VCC(B) = 1.4 V - 0.35 - 0.35 V IO = 8 mA; VCC(A) = VCC(B) = 1.65 V - 0.45 - 0.45 V IO = 9 mA; VCC(A) = VCC(B) = 2.3 V - 0.55 - 0.55 V IO = 12 mA; VCC(A) = VCC(B) = 3.0 V - 0.7 - 0.7 V - ±1 - ±5 μA [1] - ±5 - ±30 μA suspend mode A port; VO = 0 V or VCCO; VCC(A) = 3.6 V; VCC(B) = 0 V [1] - ±5 - ±30 μA suspend mode B port; VO = 0 V or VCCO; VCC(A) = 0 V; VCC(B) = 3.6 V [1] - ±5 - ±30 μA A port; VI or VO = 0 V to 3.6 V; VCC(A) = 0 V; VCC(B) = 0.8 V to 3.6 V - ±5 - ±30 μA B port; VI or VO = 0 V to 3.6 V; VCC(B) = 0 V; VCC(A) = 0.8 V to 3.6 V - ±5 - ±30 μA VI = VIH or VIL LOW-level output voltage IO = 100 μA; VCC(A) = VCC(B) = 0.8 V to 3.6 V input leakage DIRn, OE input; VI = 0 V or 3.6 V; current VCC(A) = VCC(B) = 0.8 V to 3.6 V IOZ A or B port; VO = 0 V or VCCO; OFF-state output current VCC(A) = VCC(B) = 3.6 V power-off leakage current 74AVC4T774_Q100 Product data sheet Unit Min II IOFF -40 °C to +125 °C All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 7 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state Symbol Parameter Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Max Min Max VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V - 10 - 55 μA VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V - 8 - 50 μA VCC(A) = 3.6 V; VCC(B) = 0 V - 8 - 50 μA VCC(A) = 0 V; VCC(B) = 3.6 V -2 - -12 - μA VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V - 10 - 55 μA VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V - 8 - 50 μA VCC(A) = 3.6 V; VCC(B) = 0 V -2 - -12 - μA VCC(A) = 0 V; VCC(B) = 3.6 V - 8 - 50 μA A plus B port (ICC(A) + ICC(B)); IO = 0 A; VI = 0 V or VCCI; VCC(A) = 0.8 V to 3.6 V; VCC(B) = 0.8 V to 3.6 V - 20 - 70 μA A plus B port (ICC(A) + ICC(B)); IO = 0 A; VI = 0 V or VCCI; VCC(A) = 1.1 V to 3.6 V; VCC(B) = 1.1 V to 3.6 V - 16 - 65 μA - 500 - 650 μA supply current A port; VI = 0 V or VCCI; IO = 0 A ICC B port; VI = 0 V or VCCI; IO = 0 A ΔICC [1] additional VI = 3.0 V; VCC(A) = VCC(B) = 3.6 V supply current For I/O ports, the parameter IOZ includes the input leakage current. Table 9. Typical total supply current (ICC(A) + ICC(B)) VCC(A) VCC(B) Unit 0V 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 0V 0 0.1 0.1 0.1 0.1 0.1 0.1 μA 0.8 V 0.1 0.1 0.1 0.1 0.1 0.3 1.6 μA 1.2 V 0.1 0.1 0.1 0.1 0.1 0.1 0.8 μA 1.5 V 0.1 0.1 0.1 0.1 0.1 0.1 0.4 μA 1.8 V 0.1 0.1 0.1 0.1 0.1 0.1 0.2 μA 2.5 V 0.1 0.3 0.1 0.1 0.1 0.1 0.1 μA 3.3 V 0.1 1.6 0.8 0.4 0.2 0.1 0.1 μA 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 8 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state 11. Dynamic characteristics Table 10. Typical power dissipation capacitance at VCC(A) = VCC(B) and Tamb = 25 °C Voltages are referenced to GND (ground = 0 V). [1] [2] Symbol CPD [1] [2] Parameter power dissipation capacitance Conditions VCC(A) = VCC(B) Unit 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V A port: (direction An to Bn); output enabled 0.2 0.2 0.2 0.2 0.3 0.4 pF A port: (direction An to Bn); output disabled 0.2 0.2 0.2 0.2 0.3 0.4 pF A port: (direction Bn to An); output enabled 9.5 9.7 9.8 9.9 10.7 11.9 pF A port: (direction Bn to An); output disabled 0.6 0.6 0.6 0.6 0.7 0.7 pF B port: (direction An to Bn); output enabled 9.5 9.7 9.8 9.9 10.7 11.9 pF B port: (direction An to Bn); output disabled 0.6 0.6 0.6 0.6 0.7 0.7 pF B port: (direction Bn to An); output enabled 0.2 0.2 0.2 0.2 0.3 0.4 pF B port: (direction Bn to An); output disabled 0.2 0.2 0.2 0.2 0.3 0.4 pF CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL × VCC × fo) = sum of the outputs. fi = 10 MHz; VI = GND to VCC; tr = tf = 1 ns; CL = 0 pF; RL = ∞ Ω. 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 9 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state Table 11. Typical dynamic characteristics at VCC(A) = 0.8 V and Tamb = 25 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6. [1] Symbol Parameter 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V tpd propagation delay An to Bn 14.5 7.3 6.5 6.2 5.9 6.0 ns Bn to An 14.5 12.7 12.4 12.3 12.1 12.0 ns OE to An 14.3 14.3 14.3 14.3 14.3 14.3 ns OE to Bn 17.0 9.9 9.0 9.4 9.0 9.7 ns OE to An 18.2 18.2 18.2 18.2 18.2 18.2 ns OE to Bn 19.2 10.7 9.8 9.6 9.7 10.2 ns tdis disable time ten [1] enable time Conditions VCC(B) Unit tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. Table 12. Typical dynamic characteristics at VCC(B) = 0.8 V and Tamb = 25 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6. [1] Symbol tpd tdis ten [1] Parameter Conditions VCC(A) Unit 0.8 V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V propagation delay An to Bn 14.5 12.7 12.4 12.3 12.1 12.0 ns Bn to An 14.5 7.3 6.5 6.2 5.9 6.0 ns OE to An 14.3 5.5 4.1 4.0 3.0 3.5 ns OE to Bn 17.0 13.8 13.4 13.1 12.9 12.7 ns OE to An 18.2 5.6 4.0 3.2 2.4 2.2 ns OE to Bn 19.2 14.6 14.1 13.9 13.7 13.6 ns disable time enable time tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 10 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state Table 13. Dynamic characteristics for temperature range -40 °C to +85 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6. [1] Symbol Parameter Conditions VCC(B) Unit 1.2 V ±0.1 V 1.5 V ±0.1 V 1.8 V ±0.15 V 2.5 V ±0.2 V 3.3 V ±0.3 V Min Max Min Max Min Max Min Max Min Max VCC(A) = 1.1 V to 1.3 V tpd tdis ten propagation delay An to Bn 2.0 10.5 1.3 7.8 1.2 6.9 1.0 5.9 0.8 5.7 ns Bn to An 2.0 10.5 1.5 9.9 1.5 9.7 1.4 9.4 1.4 9.3 ns disable time OE to An 2.0 10.0 2.0 10.0 2.0 10.0 2.0 10.0 2.0 10.0 ns OE to Bn 2.0 11.1 2.0 8.6 1.0 8.0 0.7 7.0 1.0 8.0 OE to An 2.0 13.5 2.0 13.5 2.0 13.5 2.0 13.5 2.0 13.5 ns OE to Bn 2.0 15.0 2.0 11.0 2.0 9.4 1.0 7.8 1.0 7.4 ns propagation delay An to Bn 1.5 9.9 1.0 7.1 1.0 6.0 0.5 4.8 0.5 4.3 ns Bn to An 1.3 7.8 1.0 7.1 0.9 6.9 0.8 6.6 0.6 6.5 ns disable time OE to An 1.0 6.0 1.0 6.0 1.0 6.0 1.0 6.0 1.0 6.0 ns OE to Bn 2.0 10.2 1.5 7.5 0.9 7.2 0.4 6.2 0.4 6.1 ns OE to An 1.0 7.5 1.0 7.5 1.0 7.5 1.0 7.5 1.0 7.5 ns OE to Bn 2.0 14.4 1.4 7.9 1.3 7.7 1.1 6.4 1.1 5.6 ns enable time ns VCC(A) = 1.4 V to 1.6 V tpd tdis ten enable time VCC(A) = 1.65 V to 1.95 V propagation delay An to Bn 1.5 9.7 0.9 6.9 0.8 5.7 0.5 4.5 0.3 4.0 ns Bn to An 1.2 6.9 1.0 6.0 0.8 5.7 0.5 5.5 0.5 5.3 ns tdis disable time OE to An 0.5 5.7 0.5 5.7 0.5 5.7 0.5 5.7 0.5 5.7 ns OE to Bn 2.0 9.9 1.5 7.0 0.8 6.9 0.2 5.8 0.2 5.9 ns ten enable time OE to An 1.0 6.7 1.0 6.7 1.0 6.7 1.0 6.7 1.0 6.7 ns OE to Bn 1.5 13.9 1.2 7.2 1.2 6.9 0.8 5.4 0.6 5.0 ns tpd VCC(A) = 2.3 V to 2.7 V tpd propagation delay An to Bn 1.4 9.4 0.8 6.6 0.5 5.5 0.4 4.2 0.2 3.7 ns Bn to An 1.0 5.9 0.5 4.8 0.5 4.5 0.4 4.2 0.3 3.9 ns tdis disable time OE to An 0.2 4.0 0.2 4.0 0.2 4.0 0.2 4.0 0.2 4.0 ns OE to Bn 2.0 9.3 1.5 6.7 0.7 6.3 0.2 5.0 0.2 5.7 ns OE to An 0.6 4.5 0.6 4.5 0.6 4.5 0.6 4.5 0.6 4.5 ns OE to Bn 1.5 13.6 1.0 6.8 1.0 6.0 0.8 4.6 0.6 4.2 ns propagation delay An to Bn 1.4 9.3 0.6 6.5 0.5 5.3 0.3 3.9 0.2 3.5 ns Bn to An 0.8 5.7 0.5 4.3 0.3 4.0 0.2 3.7 0.2 3.5 ns disable time OE to An 0.2 4.5 0.2 4.5 0.2 4.5 0.2 4.5 0.2 4.5 ns OE to Bn 2.0 9.0 1.5 6.4 0.7 6.1 0.2 4.8 0.2 5.6 ns OE to An 0.5 4.0 0.5 4.0 0.5 4.0 0.5 4.0 0.5 4.0 ns OE to Bn 1.5 13.4 1.0 6.7 1.0 5.9 0.7 4.4 0.5 4.0 ns ten enable time VCC(A) = 3.0 V to 3.6 V tpd tdis ten [1] enable time tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 11 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state Table 14. Dynamic characteristics for temperature range -40 °C to +125 °C Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 7; for waveforms see Fig. 5 and Fig. 6. [1] Symbol Parameter Conditions VCC(B) Unit 1.2 V ±0.1 V 1.5 V ±0.1 V 1.8 V ±0.15 V 2.5 V ±0.2 V 3.3 V ±0.3 V Min Max Min Max Min Max Min Max Min Max VCC(A) = 1.1 V to 1.3 V tpd tdis ten propagation delay An to Bn 2.0 12.1 1.3 9.0 1.2 8.0 1.0 6.8 0.8 6.6 Bn to An 2.0 12.1 1.5 11.4 1.5 11.2 1.4 10.9 1.4 10.7 ns disable time OE to An 2.0 11.5 2.0 11.5 2.0 11.5 2.0 11.5 2.0 11.5 ns OE to Bn 2.0 12.8 2.0 9.9 1.0 9.2 0.7 8.1 1.0 9.2 OE to An 2.0 15.6 2.0 15.6 2.0 15.6 2.0 15.6 2.0 15.6 ns OE to Bn 2.0 17.3 2.0 12.7 2.0 10.9 1.0 9.0 1.0 8.6 ns propagation delay An to Bn 1.5 11.4 1.0 8.2 1.0 6.9 0.5 5.6 0.5 5.0 ns Bn to An 1.3 9.0 1.0 8.2 0.9 8.0 0.8 7.6 0.6 7.5 ns disable time OE to An 1.0 6.9 1.0 6.9 1.0 6.9 1.0 6.9 1.0 6.9 ns OE to Bn 2.0 11.8 1.5 8.7 0.9 8.3 0.4 7.2 0.4 7.1 ns OE to An 1.0 8.7 1.0 8.7 1.0 8.7 1.0 8.7 1.0 8.7 ns OE to Bn 2.0 16.6 1.4 9.1 1.3 8.9 1.1 7.4 1.1 6.5 ns enable time ns ns VCC(A) = 1.4 V to 1.6 V tpd tdis ten enable time VCC(A) = 1.65 V to 1.95 V propagation delay An to Bn 1.5 11.2 0.9 8.0 0.8 6.6 0.5 5.2 0.3 4.6 ns Bn to An 1.2 8.0 1.0 6.9 0.8 6.6 0.5 6.4 0.5 6.1 ns tdis disable time OE to An 0.5 6.6 0.5 6.6 0.5 6.6 0.5 6.6 0.5 6.6 ns OE to Bn 2.0 11.4 1.5 8.1 0.8 8.0 0.2 6.7 0.2 6.8 ns ten enable time OE to An 1.0 7.8 1.0 7.8 1.0 7.8 1.0 7.8 1.0 7.8 ns OE to Bn 1.5 16.0 1.2 8.3 1.2 8.0 0.8 6.3 0.6 5.8 ns tpd VCC(A) = 2.3 V to 2.7 V tpd propagation delay An to Bn 1.4 10.9 0.8 7.6 0.5 6.4 0.4 4.9 0.2 4.3 ns Bn to An 1.0 6.8 0.5 5.6 0.5 5.2 0.4 4.9 0.3 4.5 ns tdis disable time OE to An 0.2 4.6 0.2 4.6 0.2 4.6 0.2 4.6 0.2 4.6 ns OE to Bn 2.0 10.7 1.5 7.8 0.7 7.3 0.2 5.8 0.2 6.6 ns OE to An 0.6 5.2 0.6 5.2 0.6 5.2 0.6 5.2 0.6 5.2 ns OE to Bn 1.5 15.7 1.0 7.9 1.0 6.9 0.8 5.3 0.6 4.9 ns propagation delay An to Bn 1.4 10.7 0.6 7.5 0.5 6.1 0.3 4.5 0.2 4.1 ns Bn to An 0.8 6.6 0.5 5.0 0.3 4.6 0.2 4.3 0.2 4.1 ns disable time OE to An 0.2 5.2 0.2 5.2 0.2 5.2 0.2 5.2 0.2 5.2 ns OE to Bn 2.0 10.4 1.5 7.4 0.7 7.1 0.2 5.6 0.2 6.5 ns OE to An 0.5 4.6 0.5 4.6 0.5 4.6 0.5 4.6 0.5 4.6 ns OE to Bn 1.5 15.5 1.0 7.8 1.0 6.8 0.7 5.1 0.5 4.6 ns ten enable time VCC(A) = 3.0 V to 3.6 V tpd tdis ten [1] enable time tpd is the same as tPLH and tPHL; tdis is the same as tPLZ and tPHZ; ten is the same as tPZL and tPZH. 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 12 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state 11.1. Waveforms and test circuit VI VM An, Bn input GND tPHL tPLH VOH VM Bn, An output VOL 001aao074 Measurement points are given in Table 15. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 5. The data input (An, Bn) to output (Bn, An) propagation delay times VI VM OE input GND tPLZ output LOW-to-OFF OFF-to-LOW tPZL VCCO VM VX VOL tPHZ output HIGH-to-OFF OFF-to-HIGH VOH tPZH VY VM GND outputs enabled outputs disabled outputs enabled 001aao075 Measurement points are given in Table 15. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 6. Enable and disable times Table 15. Measurement points Supply voltage Input [1] Output [2] VCC(A), VCC(B) VM VM VX VY 0.8 V to 1.6 V 0.5VCCI 0.5VCCO VOL + 0.1 V VOH - 0.1 V 1.65 V to 2.7 V 0.5VCCI 0.5VCCO VOL + 0.15 V VOH - 0.15 V 3.0 V to 3.6 V 0.5VCCI 0.5VCCO VOL + 0.3 V VOH - 0.3 V [1] [2] VCCI is the supply voltage associated with the data input port. VCCO is the supply voltage associated with the output port. 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 13 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state tW VI 90 % negative pulse VM VM 10 % 0V VI tf tr tr tf 90 % positive pulse VM VM 10 % 0V tW VEXT VCC VI G RL VO DUT RT CL RL 001aae331 Test data is given in Table 16. RL = Load resistance; CL = Load capacitance including jig and probe capacitance; RT = Termination resistance should be equal to the output impedance Zo of the pulse generator; VEXT = External voltage for measuring switching times; Fig. 7. Test circuit for measuring switching times Table 16. Test data Supply voltage Input Load VEXT VCC(A), VCC(B) VI [1] Δt/ΔV [2] CL RL tPLH, tPHL tPZH, tPHZ tPZL, tPLZ [3] 0.8 V to 1.6 V VCCI ≤ 1.0 ns/V 15 pF 2 kΩ open GND 2VCCO 1.65 V to 2.7 V VCCI ≤ 1.0 ns/V 15 pF 2 kΩ open GND 2VCCO 3.0 V to 3.6 V VCCI ≤ 1.0 ns/V 15 pF 2 kΩ open GND 2VCCO [1] [2] [3] VCCI is the supply voltage associated with the data input port. dV/dt ≥ 1.0 V/ns. VCCO is the supply voltage associated with the output port. 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 14 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state 11.2. Typical propagation delay characteristics 001aai476 24 tpd (ns) (1) (2) (3) (4) (5) (6) tpd (ns) (1) 20 001aai477 21 17 16 12 8 4 13 (2) (3) (4) (5) (6) 0 20 40 CL (pF) 60 a. Propagation delay (A to B); VCC(A) = 0.8 V (1) VCC(B) = 0.8 V (2) VCC(B) = 1.2 V (3) VCC(B) = 1.5 V (4) VCC(B) = 1.8 V (5) VCC(B) = 2.5 V (6) VCC(B) = 3.3 V Fig. 8. 9 0 20 40 CL (pF) 60 b. Propagation delay (A to B); VCC(B) = 0.8 V (1) VCC(A) = 0.8 V (2) VCC(A) = 1.2 V (3) VCC(A) = 1.5 V (4) VCC(A) = 1.8 V (5) VCC(A) = 2.5 V (6) VCC(A) = 3.3 V Typical propagation delay versus load capacitance; Tamb = 25 °C 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 15 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state 001aai478 7 001aai491 7 (1) tPLH (ns) tPHL (ns) (2) 5 (1) 5 (3) (2) (3) (4) (4) (5) (5) 3 1 3 0 20 40 CL (pF) 1 60 a. LOW to HIGH propagation delay (A to B); VCC(A) = 1.2 V 5 40 CL (pF) tPHL (ns) (1) 5 (2) (3) (2) (3) (4) (5) 3 1 0 20 40 CL (pF) 60 001aai480 7 (1) tPLH (ns) 20 b. HIGH to LOW propagation delay (A to B); VCC(A) = 1.2 V 001aai479 7 0 (4) (5) 3 60 c. LOW to HIGH propagation delay (A to B); VCC(A) = 1.5 V 1 0 20 40 CL (pF) 60 d. HIGH to LOW propagation delay (A to B); VCC(A) = 1.5 V (1) VCC(B) = 1.2 V (2) VCC(B) = 1.5 V (3) VCC(B) = 1.8 V (4) VCC(B) = 2.5 V (5) VCC(B) = 3.3 V Fig. 9. Typical propagation delay versus load capacitance; Tamb = 25 °C 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 16 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state 001aai481 7 (1) tPLH (ns) 5 001aai482 7 tPHL (ns) (1) 5 (2) (3) (3) (4) 3 1 (2) (5) 0 20 40 CL (pF) 1 60 a. LOW to HIGH propagation delay (A to B); VCC(A) = 1.8 V tPLH (ns) 0 20 40 CL (pF) 60 b. HIGH to LOW propagation delay (A to B); VCC(A) = 1.8 V 001aai483 7 (4) (5) 3 001aai486 7 tPHL (ns) (1) 5 (1) 5 (2) (2) (3) 1 (3) (4) 3 3 (5) 0 20 40 CL (pF) 60 c. LOW to HIGH propagation delay (A to B); VCC(A) = 2.5 V 1 (4) (5) 0 20 40 CL (pF) 60 d. HIGH to LOW propagation delay (A to B); VCC(A) = 2.5 V (1) VCC(B) = 1.2 V (2) VCC(B) = 1.5 V (3) VCC(B) = 1.8 V (4) VCC(B) = 2.5 V (5) VCC(B) = 3.3 V Fig. 10. Typical propagation delay versus load capacitance; Tamb = 25 °C 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 17 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state 001aai485 7 tPLH (ns) 001aai484 7 tPHL (ns) (1) 5 (1) 5 (2) (2) (3) (3) 3 3 (4) (4) (5) (5) 1 0 20 40 CL (pF) 60 a. LOW to HIGH propagation delay (A to B); VCC(A) = 3.3 V 1 0 20 40 CL (pF) 60 b. HIGH to LOW propagation delay (A to B); VCC(A) = 3.3 V (1) VCC(B) = 1.2 V (2) VCC(B) = 1.5 V (3) VCC(B) = 1.8 V (4) VCC(B) = 2.5 V (5) VCC(B) = 3.3 V Fig. 11. Typical propagation delay versus load capacitance; Tamb = 25 °C 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 18 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state 12. Package outline DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm B D A A E A1 c detail X terminal 1 index area terminal 1 index area C e1 e b 2 7 y y1 C v M C A B w M C L 1 8 Eh e 16 9 15 10 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max. A1 b c D (1) Dh E (1) Eh e e1 L v w y y1 mm 1 0.05 0.00 0.30 0.18 0.2 3.6 3.4 2.15 1.85 2.6 2.4 1.15 0.85 0.5 2.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT763-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig. 12. Package outline SOT763-1 (DHVQFN16) 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 19 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state XQFN16: plastic, extremely thin quad flat package; no leads; 16 terminals; body 1.80 x 2.60 x 0.50 mm SOT1161-1 X B D A terminal 1 index area E A A1 A3 detail X e1 e b 5 v w 8 C C A B C y1 C y L 4 9 e e2 1 terminal 1 index area 12 16 L1 13 0 1 Dimensions Unit(1) mm max nom min 2 mm scale A A1 0.5 0.05 A3 b 0.25 0.127 0.20 0.00 0.15 D E e e1 e2 1.9 1.8 1.7 2.7 2.6 2.5 0.4 1.2 1.2 L L1 0.45 0.55 0.40 0.50 0.35 0.45 v 0.1 w y y1 0.05 0.05 0.05 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. References Outline version IEC JEDEC JEITA SOT1161-1 --- --- --- sot1161-1_po European projection Issue date 09-12-28 09-12-29 Fig. 13. Package outline SOT1161-1 (XQFN16) 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 20 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state 13. Abbreviations Table 17. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model 14. Revision history Table 18. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AVC4T774_Q100 v.1 20220511 Product data sheet - 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 - © Nexperia B.V. 2022. All rights reserved 21 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. 15. Legal information Data sheet status Document status [1][2] Product status [3] Definition Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. 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In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 22 / 23 74AVC4T774-Q100 Nexperia 4-bit dual supply translating transceiver; 3-state Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Marking.......................................................................... 2 5. Functional diagram.......................................................2 6. Pinning information......................................................3 6.1. Pinning.........................................................................3 6.2. Pin description............................................................. 3 7. Functional description................................................. 4 8. Limiting values............................................................. 4 9. Recommended operating conditions..........................5 10. Static characteristics..................................................5 11. Dynamic characteristics.............................................9 11.1. Waveforms and test circuit.......................................13 11.2. Typical propagation delay characteristics.................15 12. Package outline........................................................ 19 13. Abbreviations............................................................ 21 14. Revision history........................................................21 15. Legal information......................................................22 © Nexperia B.V. 2022. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 11 May 2022 74AVC4T774_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 11 May 2022 © Nexperia B.V. 2022. All rights reserved 23 / 23