NUP1301QA
Ultra low capacitance ESD protection array
13 November 2017
Product data sheet
1. General description
Ultra low capacitance ElectroStatic Discharge (ESD) protection array in a leadless ultra small
DFN1010D-3 (SOT1215) Surface-Mounted Device (SMD) plastic package with visible and
solderable side pads, designed to protect one signal line in rail-to-rail configuration from the
damage caused by ESD and other transients.
2. Features and benefits
•
•
•
•
•
•
•
ESD protection of one signal line (rail-to-rail configuration)
Ultra low diode capacitance: Cd = 2.3 pF
Very low reverse leakage current: ≤ 30 nA
ESD protection up to 30 kV
ESD robustness exceeds IEC 61000-4-2; level 4 (ESD)
IEC 61000-4-5 (surge); IPP = 11 A at tp = 8/20 μs
AEC-Q101 qualified
3. Applications
•
•
•
•
•
•
•
Telecommunication networks
Video line protection
Microcontroller protection
2
I C-bus protection
Antenna power supply
Analog audio
Class-D amplifier
4. Quick reference data
Table 1. Quick reference data
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VR
reverse voltage
Tamb = 25 °C
-
-
80
V
IR
reverse current
VR = 25 V; Tamb = 25 °C
-
7
30
nA
VR = 80 V; Tamb = 25 °C
-
50
500
nA
f = 1 MHz; VR = 0 V; Tamb = 25 °C;
Pin 1 - pin 3
-
0.5
0.75
pF
f = 1 MHz; VR = 0 V; Tamb = 25 °C;
Pin 2 - pin 3
-
1.8
2
pF
f = 1 MHz; VR = 0 V; Tamb = 25 °C;
Pin 3 - pins 1 and 2
-
2.3
2.75
pF
Per diode
Cd
diode capacitance
NUP1301QA
Nexperia
Ultra low capacitance ESD protection array
5. Pinning information
Table 2. Pinning information
Pin
Symbol Description
Simplified outline
1
A1
anode (diode 1)
2
K2
cathode (diode 2)
3
K1, A2
cathode (diode 1) and anode
(diode 2)
4
K1, A2
cathode (diode1) and anode
(diode2)
Graphic symbol
1
A1
4
K1, A2
3
K2
2
aaa-022858
Transparent top view
DFN1010D-3 (SOT1215)
6. Ordering information
Table 3. Ordering information
Type number
Package
NUP1301QA
Name
Description
Version
DFN1010D-3
DFN1010D-3: plastic thermal enhanced ultra thin small outline
package; no leads; 3 terminals; body 1.1 x 1.0 x 0.37 mm
SOT1215
7. Marking
Table 4. Marking codes
Type number
Marking code
NUP1301QA
X 110
MARKING CODE
(EXAMPLE)
READING
DIRECTION
YEAR DATE
CODE
VENDOR CODE
PIN 1
INDICATION MARK
MARK-FREE AREA
READING EXAMPLE:
11
01
10
Fig. 1.
aaa-008041
DFN1010D-3 (SOT1215) binary marking code description
NUP1301QA
Product data sheet
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NUP1301QA
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Ultra low capacitance ESD protection array
8. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
Parameter
Conditions
Min
Max
Unit
VR
reverse voltage
Tamb = 25 °C
-
80
V
IF
forward current
pulsed; tp ≤ 300 µs; δ ≤ 0.02 ;
single diode loaded; Tamb = 25 °C
-
290
mA
pulsed; tp ≤ 300 µs; δ ≤ 0.02 ;
double diode loaded; Tamb = 25 °C
-
170
mA
Per diode
IFRM
repetitive peak forward
current
tp ≤ 500 µs; δ ≤ 0.25 ; Tj = 25 °C
-
700
mA
IFSM
non-repetitive peak
forward current
square wave; tp = 100 µs
-
4
A
square wave; tp = 1 ms
-
1.5
A
square wave; tp = 1 s
-
0.5
A
-
11
A
Per device
IPPM
rated peak pulse current
tp = 8/20 μs
[1] [2]
Tj
junction temperature
-
150
°C
Tamb
ambient temperature
-55
150
°C
Tstg
storage temperature
-65
150
°C
-
30
kV
ESD maximum ratings
VESD
[1]
[2]
[3]
electrostatic discharge
voltage
IEC 61000-4-2 (contact discharge)
[2] [3]
Non-repetitive current pulse 8/20 μs exponential decay waveform according to IEC 61000-4-5.
Measured from pin 3 to pins 1 and 2 (pins 1 and 2 are connected).
Device stressed with ten non-repetitive ESD pulses.
001aaa631
001aaa630
120
IPP
100 %
100 % IPP; 8 µs
IPP
(%)
80
90 %
e-t
50 % IPP; 20 µs
40
10 %
0
0
10
20
30
t (µs)
t
tr = 0.6 ns to 1 ns
40
30 ns
60 ns
Fig. 2.
8/20 µs pulse waveform according to
IEC 61000-4-5
NUP1301QA
Product data sheet
Fig. 3.
ESD pulse waveform according to
IEC 61000-4-2
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NUP1301QA
Nexperia
Ultra low capacitance ESD protection array
9. Characteristics
Table 6. Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VBR
breakdown voltage
IR = 0.1 mA; Tamb = 25 °C
100
-
-
V
VF
forward voltage
IF = 1 mA; Tamb = 25 °C
[1]
-
-
715
mV
IF = 10 mA; Tamb = 25 °C
[1]
-
-
855
mV
IF = 50 mA; Tamb = 25 °C; Pulse
[1]
-
-
1
V
IF = 150 mA; Tamb = 25 °C
[1]
-
-
1.25
V
VR = 25 V; Tamb = 25 °C
-
7
30
nA
VR = 80 V; Tamb = 25 °C
-
50
500
nA
VR = 25 V; Tj = 150 °C
-
-
30
µA
VR = 80 V; Tj = 150 °C
-
-
150
µA
f = 1 MHz; VR = 0 V; Tamb = 25 °C;
Pin 1 - pin 3
-
0.5
0.75
pF
f = 1 MHz; VR = 0 V; Tamb = 25 °C;
Pin 2 - pin 3
-
1.8
2
pF
f = 1 MHz; VR = 0 V; Tamb = 25 °C;
Pin 3 - pins 1 and 2
-
2.3
2.75
pF
TLP = 10 A; positive; Tamb = 25 °C
-
0.55
-
Ω
TLP = 10 A; negative; Tamb = 25 °C
-
0.3
-
Ω
Per diode
IR
reverse current
Cd
diode capacitance
Rdyn
dynamic resistance
Per device
VCL
[1]
[2]
[3]
clamping voltage
IPP = 1 A; Tamb = 25 °C
[2] [3]
-
-
3
V
IPP = 11 A; Tamb = 25 °C
[2] [3]
-
-
10
V
Pulse test: tp ≤ 300 μs; δ ≤ 0.02.
Non-repetitive current pulse 8/20 μs exponential decay waveform according to IEC 61000-4-5.
Measured from pin 3 to pins 1 and 2 (pins 1 and 2 are connected).
NUP1301QA
Product data sheet
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NUP1301QA
Nexperia
Ultra low capacitance ESD protection array
aaa-021945
1
aaa-020909
10
IF
(A)
IFSM
(A)
10-1
(1)
(2)
10-2
1
(3)
(4)
10-3
10-4
0.0
0.5
1.0
1.5
VF (V)
10-1
10-1
2.0
(1) Tj = 150 °C
(2) Tj = 85 °C
(3) Tj = 25 °C
(4) Tj = −40 °C
Fig. 4.
IR
(A)
1
102
10
tp (ms)
103
Based on square wave currents.
Tamb = 25 °C
Fig. 5.
Non-repetitive forward current as a function of
pulse duration; maximum values
Forward current as a function of forward
voltage; typical values
aaa-020907
10-3
10-4
Cd
(pF)
(1)
10-5
1.5
(2)
10-6
aaa-020908
2.0
(3)
10-7
1.0
(4)
10-8
10-9
0.5
(5)
10-10
10-11
0
20
40
60
80
VR (V)
(1) Tj = 150 °C
(2) Tj = 125 °C
(3) Tj = 85 °C
(4) Tj = 25 °C
(5) Tj = −40 °C
Fig. 6.
0.0
100
0
5
10
15
20
VR (V)
25
f = 1 MHz; Tamb = 25 °C; pin 2 to GND
Fig. 7.
Diode capacitance as a function of reverse
voltage; typical values
Reverse current as a function of reverse
voltage; typical values
NUP1301QA
Product data sheet
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NUP1301QA
Nexperia
Ultra low capacitance ESD protection array
ESD TESTER
acc. to IEC 61000-4-2
CZ = 150 pF; RZ = 330 Ω
4 GHz DIGITAL
OSCILLOSCOPE
RZ
450 Ω
RG 223/U
50 Ω coax
10x
ATTENUATOR
CZ
50 Ω
DUT
(DEVICE
UNDER
TEST)
vertical scale = 10 V/div
horizontal scale = 15 ns/div
vertical scale = 10 A/div
horizontal scale = 15 ns/div
GND
GND
clamped +8 kV ESD pulse waveform
(IEC 61000-4-2 network), pin 3 to 1 and 2
unclamped +8 kV ESD pulse waveform
(IEC 61000-4-2 network)
vertical scale = 10 V/div
horizontal scale = 15 ns/div
vertical scale = 10 A/div
horizontal scale = 15 ns/div
GND
GND
clamped -8 kV ESD pulse waveform
(IEC 61000-4-2 network), pin 3 to 1 and 2
unclamped -8 kV ESD pulse waveform
(IEC 61000-4-2 network)
Fig. 8.
aaa-027349
ESD clamping test setup and waveforms
NUP1301QA
Product data sheet
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NUP1301QA
Nexperia
Ultra low capacitance ESD protection array
aaa-027350
30
IPP
(A)
25
-5
20
-10
15
-15
10
-20
5
-25
0
0
5
10
15
20
-30
-30
25
30
VCL (V)
tp = 100 ns; Transmission Line Pulse (TLP)
Fig. 9.
Product data sheet
-25
-20
-15
-10
-5
0
VCL (V)
tp = 100 ns; Transmission Line Pulse (TLP)
Positive clamping voltage (TLP); typical values
NUP1301QA
aaa-027351
0
IPP
(A)
Fig. 10. Negative clamping voltage (TLP); typical values
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NUP1301QA
Nexperia
Ultra low capacitance ESD protection array
10. Application information
Protection of a single (high-speed) data line in rail-to-rail configuration. The protected data line is
connected to pin 3. Pin 1 is connected to ground (GND) and pin 2 is connected to the supply rail
(supply voltage VCC.) When the transient voltage exceeds the forward voltage drop of one diode,
the transient is directed either to the supply rail or to GND. The advantages of these solutions are:
low line capacitance (0.6 pF typically), fast response time, and low clamping voltage.
VCC
VCC
D1
NUP1301
Audio
interface
D2
NUP1301
006aab568
Fig. 11. Typical application for the protection of one signal line
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge
transients. The following guidelines are recommended:
1.
2.
3.
4.
5.
6.
7.
8.
Place the device as close to the input terminal or connector as possible.
Minimize the path length between the device and the protected line.
Keep parallel signal paths to a minimum.
Avoid running protected conductors in parallel with unprotected conductors.
Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops.
Minimize the length of the transient return path to ground.
Avoid using shared transient return paths to a common ground point.
Use ground planes whenever possible. For multilayer PCBs, use ground vias.
11. Test information
Quality information
This product has been qualified in accordance with the Automotive Electronics Council (AEC)
standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in
automotive applications.
NUP1301QA
Product data sheet
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NUP1301QA
Nexperia
Ultra low capacitance ESD protection array
12. Package outline
DFN1010D-3: plastic thermal enhanced ultra thin small outline package; no leads;
3 terminals; body: 1.1 x 1.0 x 0.37 mm
SOT1215
visible depend upon
used manufacturing
technology (2x)
solderable lead
end, protrusion
max. 0.02 mm (3x)
pin 1
index area
visible depend upon
used manufacturing
technology (4x)
e
b (2x)
1
2
L (2x)
E
E1
e1
L1
D
A1
3
b1
A
D1
0
1 mm
scale
Dimensions (mm are the original dimensions)
Unit
mm
A
A1
b
b1
D
D1
E
E1
e
e1
min 0.34
0.22 0.245 1.05 0.87 0.95 0.16
nom 0.37
0.25 0.275 1.10 0.90 1.00 0.19 0.75
max 0.40 0.04 0.30 0.325 1.15 0.95 1.05 0.24
0.1
L
L1
0.17 0.195
0.20 0.225
0.25 0.275
Note
1. Dimension A is including plating thickness.
Outline
version
sot1215_po
References
IEC
JEDEC
JEITA
European
projection
Issue date
13-03-05
13-03-06
SOT1215
Fig. 12. Package outline DFN1010D-3 (SOT1215)
NUP1301QA
Product data sheet
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NUP1301QA
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Ultra low capacitance ESD protection array
13. Soldering
Footprint information for reflow soldering of DFN1010D-3 package
SOT1215
1.2
0.45 (2x)
0.3
1.1
0.35 (2x)
0.4
0.25 (2x)
0.75
0.3
0.5
1.5
1.4
0.4
0.5
0.4
0.3
0.5
1.3
0.4
0.3
0.4
0.5
1.3
solder land
solder land plus solder paste
occupied area
solder resist
Dimensions in mm
Issue date
12-11-23
13-03-06
sot1215_fr
Fig. 13. Reflow soldering footprint for DFN1010D-3 (SOT1215)
NUP1301QA
Product data sheet
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NUP1301QA
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Ultra low capacitance ESD protection array
14. Revision history
Table 7. Revision history
Data sheet ID
Release date
Data sheet status
Change notice
Supersedes
NUP1301QA v.1
20171113
Product data sheet
-
-
NUP1301QA
Product data sheet
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NUP1301QA
Nexperia
Ultra low capacitance ESD protection array
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
15. Legal information
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Data sheet status
Document
status [1][2]
Product
status [3]
Objective
[short] data
sheet
Development This document contains data from
the objective specification for product
development.
Preliminary
[short] data
sheet
Qualification
This document contains data from the
preliminary specification.
Product
[short] data
sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Definition
Suitability for use in automotive applications — This Nexperia product
has been qualified for use in automotive applications. Unless otherwise
agreed in writing, the product is not designed, authorized or warranted to
be suitable for use in life support, life-critical or safety-critical systems or
equipment, nor in applications where failure or malfunction of an Nexperia
product can reasonably be expected to result in personal injury, death or
severe property or environmental damage. Nexperia and its suppliers accept
no liability for inclusion and/or use of Nexperia products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the Internet at URL http://www.nexperia.com.
Definitions
Preview — The document is a preview version only. The document is still
subject to formal approval, which may result in modifications or additions.
Nexperia does not give any representations or warranties as to the accuracy
or completeness of information included herein and shall have no liability for
the consequences of use of such information.
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modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
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data sheet shall define the specification of the product as agreed between
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agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
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Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
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Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
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sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
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Export control — This document as well as the item(s) described herein
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Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
NUP1301QA
Product data sheet
Trademarks
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NUP1301QA
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Ultra low capacitance ESD protection array
16. Contents
1. General description......................................................1
2. Features and benefits.................................................. 1
3. Applications.................................................................. 1
4. Quick reference data....................................................1
5. Pinning information......................................................2
6. Ordering information....................................................2
7. Marking.......................................................................... 2
8. Limiting values............................................................. 3
9. Characteristics..............................................................4
10. Application information............................................. 8
11. Test information......................................................... 8
12. Package outline.......................................................... 9
13. Soldering................................................................... 10
14. Revision history........................................................11
15. Legal information..................................................... 12
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Nexperia B.V. 2017. All rights reserved
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Date of release: 13 November 2017
NUP1301QA
Product data sheet
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