MM54HC623

MM54HC620 MM74HC620 Inverting Octal TRI-STATE Transceiver MM54HC623 MM74HC623 True Octal TRI-STATE Transceiver March 1988 MM54HC620 MM74HC620 Inverting Octal TRI-STATE Transceiver MM54HC623 MM74HC623 True Octal TRI-STATE Transceiver General Description These TRI-STATE bi-directional buffers utilize advanced silicon-gate CMOS technology and are intended for two-way asynchronous communication between data buses They have high drive current outputs which enable high speed operation even when driving large bus capacitances These circuits possess the low power consumption and high noise immunity usually associated with CMOS circuitry yet have speeds comparable to low power Schottky TTL circuits These devices allow data transmission from the A bus to the B bus or from the B bus to the A bus depending on the logic levels at the enable inputs Both buses can be isolated from each other with proper logic levels at the enable inputs When GAB is taken high and GBA is taken low these devices store the states presently appearing at the data inputs The 8-bit codes appearing on the two sets of buses will be indentical for the 623 option or complimentary for the 620 option These devices can drive up to 15 LS-TTL loads All inputs are protected from damage due to static discharge by diodes to VCC and ground Features Y Y Y Y Y Typical propagation delays 13 ns Wide power supply range 2V – 6V Low quiescent supply current 80 mA maximum (74HC series) TRI-STATE outputs for connection to system buses High output drive 6 mA (minimum) Connection Diagrams Dual-In-Line Package Dual-In-Line Package TL F 9393 – 1 TL F 9393 – 2 Top View Order Number MM54HC623 or MM74HC623 Top View Order Number MM54HC620 or MM74HC620 Truth Table Enable Inputs GBA L H H L GAB L H L L B data to A bus A data to B bus Isolation B data to A bus A data to B bus B data to A bus A data to B bus Isolation B data to A bus A data to B bus Operation TRI-STATE is a registered trademark of National Semiconductor Corporation C1995 National Semiconductor Corporation TL F 9393 RRD-B30M105 Printed in U S A Absolute Maximum Ratings (Notes 1 2) Operating Conditions Supply Voltage (VCC) DC Input or Output Voltage (VIN VOUT) Operating Temp Range (TA) MM74HC MM54HC Input Rise Fall Times (tr tf) VCC e 2 0V VCC e 4 5V VCC e 6 0V Min 2 0 b 40 b 55 If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications b 0 5V to a 7 0V Supply Voltage (VCC) DC Input Voltage DIR and G pins (VIN) b1 5V to VCC a 1 5V b 0 5 to VCC a 0 5V DC Output Voltage (VIN VOUT) g 20 mA Clamp Diode Current (ICD) g 35 mA DC Output Current per pin (IOUT) g 70 mA DC VCC or GND Current per pin (ICC) b 65 C to a 150 C Storage Temperature Range (TSTG) Power Dissipation (PD) (Note 3) 600 mW S O Package only 500 mW Lead Temperature (TL) (Soldering 10 seconds) 260 C Max 6 VCC a 85 a 125 Units V V C C ns ns ns 1000 500 400 DC Electrical Characteristics (Note 4) Symbol Parameter Conditions VCC TA e 25 C Typ VIH Minimum High Level Input Voltage Maximum Low Level Input Voltage Minimum High Level Output Voltage VIN e VIH or VIL lIOUTl s20 mA 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 4 5V 6 0V 2 0V 4 5V 6 0V 4 5V 6 0V 6 0V 20 45 60 42 57 0 0 0 02 02 15 3 15 42 05 1 35 18 19 44 59 3 98 5 48 01 01 01 0 26 0 26 g0 1 74HC 54HC TA e b40 C to a 85 C TA e b55 C to a 125 C Units Guaranteed Limits 15 3 15 42 05 1 35 18 19 44 59 3 84 5 34 01 01 01 0 33 0 33 g1 0 15 3 15 42 05 1 35 18 19 44 59 37 52 01 01 01 04 04 g1 0 V V V V V V V V V V V V V V V V mA mA VIL VOH VIN e VIH or VIL lIOUTl s6 0 mA lIOUTl s7 8 mA VOL Maximum Low Level Output Voltage VIN e VIH or VIL lIOUTl s20 mA VIN e VIH or VIL lIOUTl s6 0 mA lIOUTl s7 8 mA IIN IOZ Input Leakage Current (G and DIR) VIN e VCC or GND Maximum TRI-STATE VOUT e VCC or GND 6 0V Output Leakage Enable G e VIH Current Maximum Quiescent Supply Current VIN e VCC or GND IOUT e 0 mA 6 0V g0 5 g5 0 g 10 ICC 80 80 160 mA Note 1 Maximum Ratings are those values beyond which damage to the device may occur Note 2 Unless otherwise specified all voltages are referenced to ground Note 3 Power dissipation temperature derating plastic ‘‘N’’ package b 12 mW C from 65 C to 85 C ceramic ‘‘J’’ package b 12 mW C from 100 C to 125 C Note 4 For a power supply of 5V g 10% the worst case output voltages (VOH and VOL) occur for HC at 4 5V Thus the 4 5V values should be used when designing with this supply Worst case VIH and VIL occur at VCC e 5 5V and 4 5V respectively (The VIH value at 5 5V is 3 85V ) The worst case leakage current (IIN ICC and IOZ) occur for CMOS at the higher voltage and so the 6 0V values should be used VIL limits are currently tested at 20% of VCC The above VIL specification (30% of VCC) will be implemented no later than Q1 CY’89 2 AC Electrical Characteristics VCC e 5V Symbol tPHL tPLH tPZH tPZL tPHZ tPLZ Parameter Maximum Propagation Delay Maximum Output Enable Time Maximum Output Disable Time TA e 25 C tr e tf e 6 ns Conditions CL e 45 pF RL e 1 kX CL e 45 pF RL e 1 kX CL e 5 pF Typ Guaranteed Limit 15 31 18 Units ns ns ns AC Electrical Characteristics VCC e 2 0V to 6 0V Symbol Parameter Conditions VCC CL e 50 pF tr e tf e 6 ns unless otherwise specified 74HC 54HC TA e b40 C to a 85 C TA e b55 C to a 125 C Units Guaranteed Limits TA e 25 C Typ tPHL tPLH Maximum Propagation CL e 50 pF Delay CL e 150 pF CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF 2 0V 2 0V 4 5V 4 5V 6 0V 6 0V 85 105 17 21 14 18 105 130 21 26 18 22 130 160 26 32 22 27 ns ns ns ns ns ns tPZH tPZL Maximum Output Enable RL e 1 kX CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF CL e 50 pF CL e 150 pF 2 0V 2 0V 4 5V 4 5V 6 0V 6 0V 2 0V 4 5V 6 0V 2 0V 4 5V 6 0V 120 12 5 10 10 10 170 195 34 39 29 33 130 26 22 60 12 10 215 245 43 49 37 42 165 33 28 75 15 13 255 295 51 59 43 50 195 39 33 90 18 15 ns ns ns ns ns ns ns ns ns ns ns ns pF pF pF tPHZ tPLZ tTHL tTLH CPD CIN Maximum Output Disable Time Output Rise and Fall Time Power Dissipation Capacitance (Note 5) Maximum Input Capacitance RL e 1 kX CL e 50 pF CL e 50 pF GBA GAB e VIL GBA e VIH GAB e VIL CIN OUT Maximum Input Output Capacitance A or B 15 20 20 20 pF Note 5 CPD determines the no load dynamic power consumption PD e CPD VCC2 f a ICC VCC and the no load dynamic current consumption IS e CPD VCC f a ICC 3 MM54HC620 MM74HC620 Inverting Octal TRI-STATE Transceiver MM54HC623 MM74HC623 True Octal TRI-STATE Transceiver Physical Dimensions inches (millimeters) Ceramic Dual-In-Line Package (J) Order Number MM54HC620 MM54HC623 MM74HC620 or MM74HC623 NS Package Number J20A Molded Dual-In-Line Package (N) Order Number MM54HC620 MM54HC623 MM74HC620 or MM74HC623 NS Package Number N20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL SEMICONDUCTOR CORPORATION As used herein 1 Life support devices or systems are devices or systems which (a) are intended for surgical implant into the body or (b) support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the labeling can be reasonably expected to result in a significant injury to the user National Semiconductor Corporation 1111 West Bardin Road Arlington TX 76017 Tel 1(800) 272-9959 Fax 1(800) 737-7018 2 A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness National Semiconductor Europe Fax (a49) 0-180-530 85 86 Email cnjwge tevm2 nsc com Deutsch Tel (a49) 0-180-530 85 85 English Tel (a49) 0-180-532 78 32 Fran ais Tel (a49) 0-180-532 93 58 Italiano Tel (a49) 0-180-534 16 80 National Semiconductor Hong Kong Ltd 13th Floor Straight Block Ocean Centre 5 Canton Rd Tsimshatsui Kowloon Hong Kong Tel (852) 2737-1600 Fax (852) 2736-9960 National Semiconductor Japan Ltd Tel 81-043-299-2309 Fax 81-043-299-2408 National does not assume any responsibility for use of any circuitry described no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications