NCV8408DTRKG

DATA SHEET www.onsemi.com Self-Protected Low Side Driver with Temperature and Current Limit VDSS (Clamped) RDS(on) TYP ID MAX (Limited) 42 V 55 mW @ 5 V 10 A Drain (2,4) 42 V, 10 A, Single N−Channel, DPAK Overvoltage Protection Gate Input (1) NCV8408, NCV8408B NCV8408/B is a single channel protected Low−Side Smart Discrete device. The protection features include overcurrent, overtemperature, ESD and integrated Drain−to−Gate clamping for overvoltage protection. Thermal protection includes a latch which can be reset by toggling the input. This device is suitable for harsh automotive environments. ESD Protection Temperature Limit Current Limit Features           Source (3) Short Circuit Protection Thermal Shutdown with Latched Reset Gate Input Current Flag During Latched Fault Condition Overvoltage Protection Integrated Clamp for Inductive Switching ESD Protection dV/dt Robustness Analog Drive Capability (Logic Level Input) NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant Typical Applications  Switch a Variety of Resistive, Inductive and Capacitive Loads  Can Replace Electromechanical Relays and Discrete Circuits  Automotive / Industrial  Semiconductor Components Industries, LLC, 2016 August, 2022 − Rev. 8 Current Sense 1 4 1 2 3 DPAK CASE 369C STYLE 2 ORDERING INFORMATION Package Shipping† NCV8408DTRKG DPAK (Pb−Free) 2500/Tape & Reel NCV8408BDTRKG DPAK (Pb−Free) 2500/Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NCV8408/D NCV8408, NCV8408B MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Rating Drain−to−Source Voltage Internally Clamped Drain−to−Gate Voltage Internally Clamped (RGS = 1.0 MW) Gate−to−Source Voltage Symbol Value Unit VDSS 42 Vdc VDGR 42 V VGS 14 Vdc Continuous Drain Current ID Gate Input Current (VGS = 14 VDC) IGS 10 Source to Drain Current ISD 4.0 Total Power Dissipation @ TA = 25C (Note 1) @ TA = 25C (Note 2) PD Thermal Resistance Junction−to−Ambient Steady State (Note 1) Junction−to−Ambient Steady State (Note 2) Junction−to−Tab Steady State (Note 3) Single Pulse Inductive Load Switching Energy (VDD = 20 Vdc, VGS = 5.0 V, IL = 8.0 A) Repetitive Pulse Inductive Load Switching Energy (VDD = 20 Vdc, VGS = 5.0 V, IL = 8.0 A, TJ = 25C) Repetitive Pulse Inductive Load Switching Energy (VDD = 20 Vdc, VGS = 5.0 V, IL = 6.8 A, TJ = 105C) Internally Limited 1.8 2.3 RqJA RqJA RqJT 70 55 2.1 EAS 185 EAR 128 EAR 92 mA A W C/W mJ VLD 63 V Operating Junction Temperature TJ −40 to 150 C Storage Temperature Tstg −55 to 150 C Load Dump Voltage (VGS = 0 and 10 V, RI = 2.0 W, RL = 4.5 W, td = 400 ms, TJ = 25C) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Surface−mounted onto minimum pad FR4 PCB (1 oz Cu, 0.06” thick). 2. Surface−mounted onto 2 square FR4 PCB, (1 square, 1 oz Cu, 0.06” thick). 3. Surface−mounted onto minimum pad FR4 PCB (2 oz Cu, 0.06” thick). + ID DRAIN IG + VDS GATE SOURCE VGS IS − − Figure 1. Voltage and Current Convention www.onsemi.com 2 NCV8408, NCV8408B ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) Test Conditions Characteristic Symbol Min Typ Max 42 40 43 46 45 47 51 51 51 − − 0.6 2.5 5.0 10 Unit OFF CHARACTERISTICS V(BR)DSS Drain−to−Source Clamped Breakdown Voltage (Note 4) (VGS = 0 V, ID = 10 mA, TJ = 25C) (VGS = 0 V, ID = 10 mA, TJ = 150C) (Note 6) (VGS = 0 V, ID = 10 mA, TJ = −40C) (Note 6) Zero Gate Voltage Drain Current (VGS = 0 V, VDS = 32 V, TJ = 25C) (VGS = 0 V, VDS = 32 V, TJ = 150C) (Note 6) IDSS V mA INPUT CHARACTERISTICS (Note 4) Gate Input Current − Normal Operation (VGS = 5.0 V) IGSSF − 25 50 mA Gate Input Current − Protection Latched (VGS = 5.0 V) (Note 6) IGSSL − 440 − mA Gate Threshold Voltage (VGS = VDS, ID = 1 mA) VGS(th) 1.0 1.7 2.2 V VGS(th)/TJ − 5.0 − −mV/C Gate Threshold Temperature Coefficient Latched Reset Voltage (Note 6) VLR 0.8 1.4 1.9 V Latched Reset Time (VGS = 5.0 V to VGS < 1 V) (Note 6) tLR 10 40 100 ms − 25.5 − kW − − 55 100 60 120 − 0.95 − −15 −15 −5 −20 − − − − 15 15 5 20 td(ON) 10 20 tr 20 40 td(OFF) 30 60 40 Internal Gate Input Resistance ON CHARACTERISTICS (Note 4) Static Drain−to−Source On−Resistance (VGS = 5.0 V, ID = 3.0 A, TJ @ 25C) (VGS = 5.0 V, ID = 3.0 A, TJ @ 150C) (Note 6) Source−Drain Forward On Voltage RDS(on) (VGS = 0 V, IS = 7.0 A) VSD mW V SWITCHING CHARACTERISTICS (Note 6) Turn−OFF/ON Slew Rate Matching VGS = 5.0 V, VDS = 13 V, RL = 4 W; TJ = −40C TJ = 150C TJ = 25C −40C < TJ < 150C Turn−ON Delay Time TMatch Rise Time (10% ID to 90% ID) Turn−OFF Delay Time VGS = 5 V, VDS = 13 V RL = 4 W, −40C < TJ < 150C Fall Time (90% ID to 10% ID) tf 20 Slew−Rate ON (90% VD to 10% VD) −dVDS/dtON 0.5 Slew−Rate OFF (10% VD to 90% VD) dVDS/dtOFF 0.5 % ms V/ms SELF PROTECTION CHARACTERISTICS (TJ = 25C unless otherwise noted) (Note 5) ILIM Current Limit VGS = 5.0 V, VDS = 10 V, TJ @ 25C VGS = 5.0 V, VDS = 10 V, TJ = 150C (Note 6) VGS = 5.0 V, VDS = 10 V, TJ = −40C (Note 6) Temperature Limit (Turn−off) VGS = 5.0 V VGS = 10 V A 10 10 9 13 − − 16 18 16 TLIM(off) 150 150 175 165 200 185 C ESD ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) Electro−Static Discharge Capability Human Body Model (HBM) ESD 4000 − − V Electro−Static Discharge Capability Machine Model (MM) ESD 400 − − V Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%. 5. Fault conditions are viewed as beyond the normal operating range of the part. 6. Not subject to production testing. www.onsemi.com 3 NCV8408, NCV8408B TEST CIRCUITS AND WAVEFORMS RL 4W ID VIN + D 5V VDD G 0V − 13 V S Figure 2. Resistive Load Switching Test Circuit 90% VIN 10% td(ON) tr td(OFF) tf 90% ID 10% 90% VDS 10% Figure 3. Resistive Load Switching Waveforms www.onsemi.com 4 NCV8408, NCV8408B TEST CIRCUITS AND WAVEFORMS L VDS VIN D G DUT S tp Figure 4. Inductive Load Switching Test Circuit VIN Tp Tav V(BR)DSS VDS VDS(on) Ipk ID Figure 5. Inductive Load Switching Waveforms www.onsemi.com 5 + VDD − NCV8408, NCV8408B VIN IG ID TJ Figure 6. Short−Circuit Protection Behavior Figure 7. Turn on into Short Circuit Device Response www.onsemi.com 6 NCV8408, NCV8408B TYPICAL CHARACTERISTICS 1000 10 VDD = 20 V VDD = 20 V CURRENT (A) ENERGY (mJ) 25C 150C 100 100 10 INDUCTANCE (mH) Figure 8. NCV8408 Maximum Switch Off Energy vs Inductance Figure 9. NCV8408 Maximum Switch Off Current vs Inductance 18 16 500 150C 14 400 ILIM (A) 12 300 200 150C 125C 100 25C −40C 2 4 6 8 10 125C 10 8 6 4 2 0 12 5 6V 16 9 10 200 8V ID = 3 A 180 160 14 140 5V 10 V 10 RDS(on) (mW) 12 ID (A) 8 7 Figure 11. Current Limit vs. Gate Voltage 7V 9V 6 VGS (V) Figure 10. VGS vs VDS 18 −40C 25C VGS (V) 4V 8 3V 6 120 100 80 150C 125C 60 4 40 VGS = 2.5 V 2 0 100 INDUCTANCE (mH) ID = 3 A VDS (V) 150C 1 10 600 0 25C 0 2 6 4 25C −40C 20 0 10 8 2 4 6 8 10 VDS (V) VGS (V) Figure 12. Drain Current vs. Drain Voltage Figure 13. RDS(on) vs. Gate Voltage www.onsemi.com 7 12 NCV8408, NCV8408B TYPICAL CHARACTERISTICS 120 100 TIME (ms) 80 tr 60 td(off) 40 tf 20 0 td(on) 2 3 4 5 6 7 8 9 10 VGS (V) Figure 14. Resistive Switching 180 TA = 25C 160 140 qJA (C/W) 120 100 qJA curve with PCB cu thk 1 80 60 qJA curve with PCB cu thk 2 40 20 0 0 100 200 300 400 500 600 COPPER HEAT SPREADER AREA (mm2) 700 Figure 15. RqJA vs. Copper Area 100 Duty Cycle = 50% R(t) (C/W) 10 20% 10% 5% 1 2% 1% 0.1 Single Pulse 0.01 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 PULSE TIME (s) Figure 16. Transient Thermal Resistance www.onsemi.com 8 10 100 1000 NCV8408, NCV8408B MARKING DIAGRAMS Gate Drain R(YWW) V8408G Gate Drain Drain Source Source NCV8408 R Y WW G VN(YWW) NCV 8408BG Drain NCV8408B =Site Code = Year = Work Week = Pb−Free Package VN Y WW G www.onsemi.com 9 = Site Code = Year = Work Week = Pb−Free Package MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C ISSUE F 4 1 2 DATE 21 JUL 2015 3 SCALE 1:1 A E b3 C A B c2 4 L3 Z D 1 L4 2 3 NOTE 7 b2 e c SIDE VIEW b 0.005 (0.13) TOP VIEW H DETAIL A M BOTTOM VIEW C Z H L2 GAUGE PLANE C L L1 DETAIL A Z SEATING PLANE BOTTOM VIEW A1 ALTERNATE CONSTRUCTIONS ROTATED 905 CW STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 6: PIN 1. MT1 2. MT2 3. GATE 4. MT2 STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN STYLE 7: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 3: PIN 1. ANODE 2. CATHODE 3. ANODE 4. CATHODE STYLE 8: PIN 1. N/C 2. CATHODE 3. ANODE 4. CATHODE STYLE 4: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE STYLE 9: STYLE 10: PIN 1. ANODE PIN 1. CATHODE 2. CATHODE 2. ANODE 3. RESISTOR ADJUST 3. CATHODE 4. CATHODE 4. ANODE SOLDERING FOOTPRINT* 6.20 0.244 2.58 0.102 5.80 0.228 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.028 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.114 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.72 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.90 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− GENERIC MARKING DIAGRAM* XXXXXXG ALYWW AYWW XXX XXXXXG IC Discrete = Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. 6.17 0.243 SCALE 3:1 DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z XXXXXX A L Y WW G 3.00 0.118 1.60 0.063 STYLE 5: PIN 1. GATE 2. ANODE 3. CATHODE 4. ANODE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. 7. OPTIONAL MOLD FEATURE. mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON10527D DPAK (SINGLE GAUGE) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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