Self-Protected Low Side
Driver with In-Rush Current
Management
NCV8413
The NCV8413 is a three terminal protected Low−Side Smart
Discrete FET. The protection features include Delta Thermal
Shutdown, overcurrent, overtemperature, ESD and integrated Drain to
Gate clamping for over voltage protection. The device also offers fault
indication via the gate pin. This device is suitable for harsh automotive
environments.
Features
•
•
•
•
•
•
•
•
•
•
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VDSS
(Clamped)
RDS(ON) TYP
ID MAX
(Limited)
42 V
37 mW @ 10 V
22 A
Short Circuit Protection with In−Rush Current Management
Thermal Shutdown with Automatic Restart
Delta Thermal Shutdown
Over Voltage Protection
Integrated Clamp for Over Voltage Protection and Inductive
Switching
ESD Protection
dV/dt Robustness
Analog Drive Capability (Logic Level Input)
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101 Grade 1
Qualified and PPAP Capable
These Devices are Pb−Free and are RoHS Compliant
Typical Applications
• Switch a Variety of Resistive, Inductive and Capacitive Loads
• Can Replace Electromechanical Relays and Discrete Circuits
• Automotive / Industrial
DPAK
CASE 369C
STYLE 2
MARKING DIAGRAM
1
2
3
A
Y
WW
G
ORDERING INFORMATION
ESD Protection
Current
Limit
Current
Sense
Figure 1. Block Diagram
© Semiconductor Components Industries, LLC, 2018
December, 2019 − Rev. 1
= Assembly Location
= Year
= Work Week
= Pb−Free Package
1 = Gate
2 = Drain
3 = Source
4 = Drain
Overvoltage
Protection
Temperature
Limit
4
PIN ASSIGNMENT − Style 2
Drain
Gate
Input
AYWW
NCV
8413G
Device
Package
Shipping†
NCV8413DTRKG
DPAK
(Pb−Free)
2500 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Source
1
Publication Order Number:
NCV8413/D
NCV8413
Table 1. MAXIMUM RATINGS
Rating
Symbol
Value (min)
Unit
Drain−to−Source Voltage Internally Clamped
VDSS
42
V
Drain−to−Gate Voltage Internally Clamped
VDG
42
V
Gate−to−Source Voltage
VGS
±14
V
Drain Current − Continuous
ID
Total Power Dissipation
@ TA = 25°C (Note 1)
@ TA = 25°C (Note 2)
PD
Thermal Resistance
Junction−to−Case (Soldering Point)
Junction−to−Case (Top)
Junction−to−Ambient (Note 1)
Junction−to−Ambient (Note 2)
Internally Limited
1.30
2.72
W
°C/W
RthJC
RthJT
RthJA
RthJA
1.30
54.2
95.7
45.9
Single Pulse Inductive Load Switching Energy
(L = 120 mH, ILpeak = 2.8 A, VGS = 5 V, RG = 25 W, TJstart = 25°C)
EAS
470
mJ
Load Dump Voltage (VGS = 0 and 10 V, RL = 4.5 W) (Note 4)
US *
55
V
TJ
−40 to 150
°C
Tstorage
−55 to 150
°C
Operating Junction Temperature
Storage Temperature
ESD CHARACTERISTICS (Note 3, 5)
ESD
Electro−Static Discharge Capability
Human Body Model (HBM)
Charged Device Model (CDM)
4
1
kV
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Mounted onto a 2″ square FR4 board (100 sq mm, 1 oz. Cu, steady state)
2. Mounted onto a 2″ square FR4 board (645 sq mm, 1 oz. Cu, steady state)
3. Not tested in production.
4. Load Dump Test B (with centralized load dump suppression) according to ISO16750−2 standard. Guaranteed by design. Not tested in
production. Passed Class C according to ISO16750−1.
5. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (JS−001−2017)
Field Induced Charge Device Model ESD characterization is not performed on plastic molded packages with body sizes smaller than
2 x 2 mm due to the inability of a small package body to acquire and retain enough charge to meet the minimum CDM discharge current
waveform characteristic defined in JEDEC JS−002−2018
Figure 2. Voltage and Current Convention
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2
NCV8413
Table 2. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic
Test Conditions
Symbol
Min
Typ
Max
Unit
VGS = 0 V, ID = 250 mA
V(BR)DSS
42
40
46
51
V
44
51
0.6
5
mA
50
125
mA
1.7
2.2
OFF CHARACTERISTICS
Drain−to−Source Clamped
Breakdown Voltage
VGS = 0 V, ID = 250 mA,
TJ = 150°C (Note 6)
Zero Gate Voltage Drain Current
IDSS
VDS = 32 V, VGS = 0 V
VDS = 32 V, VGS = 0 V,
TJ = 150°C (Note 6)
Gate Input Current
4
VGS = 5 V, VDS = 0 V
IGSS
VGS = VDS, ID = 1.2 mA
VGS(th)
ON CHARACTERISTICS
Gate Threshold Voltage
1.0
Threshold Temperature Coefficient
Static Drain−to−Source
On Resistance
−4
RDS(ON)
VGS = 10 V, ID = 3 A, TJ = 25°C
V
mV/°C
37
68
VGS = 10 V, ID = 3 A,
TJ = 150°C (Note 6)
75
123
VGS = 5 V, ID = 3 A, TJ = 25°C
47
76
VGS = 5 V, ID = 3 A,
TJ = 150°C (Note 6)
90
135
VSD
0.85
1.1
V
ms
Source Drain Forward On Voltage
IS = 7 A, VGS = 0 V
mW
SWITCHING CHARACTERISTICS (Note 6)
VGS = 0 V to 5 V,
VDS = 12 V, ID = 1 A
Turn−On Time (10% VGS to 90% ID)
Turn−Off Time (90% VGS to 10% ID)
VGS = 0 V to 10 V,
VDS = 12 V, ID = 1 A
Turn−On Time (10% VGS to 90% ID)
Turn−Off Time (90% VGS to 10% ID)
tON
25
35
tOFF
44
65
tON
15
25
tOFF
60
85
VGS = 0 V to 10 V,
VDD = 12 V, RL = 4.7 W
−dVDS/dtON
0.75
1.5
dVDS/dtOFF
0.6
0.98
VGS = 5 V, VDS = 10 V
ILIM
13
17
20
VGS = 5 V, VDS = 10 V,
TJ = 150°C (Note 6)
13
15.5
18
VGS = 10 V, VDS = 10 V (Note 6)
12
17
22
VGS = 10 V, VDS = 10 V,
TJ = 150°C (Note 6)
11
15.5
20
150
172
185
150
182
Slew Rate On (80% VDS to 50% VDS)
Slew Rate Off (50% VDS to 80% VDS)
V/ms
SELF PROTECTION CHARACTERISTICS
Current Limit
VGS = 5 V (Note 6)
Temperature Limit (Turn−Off)
TLIM(OFF)
Thermal Hysteresis
TLIM(OFF)
Thermal Hysteresis
°C
15
DTLIM(ON)
VGS = 10 V (Note 6)
Temperature Limit (Turn−Off)
A
200
15
DTLIM(ON)
GATE INPUT CHARACTERISTICS (Note 6)
Device ON Gate Input Current −
Normal Operation
Device ON Gate Input Current −
Thermal Limit
Device ON Gate Input Current −
Current Limit
VGS = 5 V, VDS = 10 V, ID = 1 A
IGON
VGS = 10 V, VDS = 10 V, ID = 1 A
VGS = 5 V, VDS = 10 V, ID = 0 A
IGDTL
VGS = 10 V, VDS = 10 V, ID = 0 A
VGS = 5 V, VDS = 10 V
VGS = 10 V, VDS = 10 V
IGCL
35
50
70
200
310
450
170
500
900
900
1200
1700
70
120
600
710
970
1350
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. Not tested in production.
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3
NCV8413
TYPICAL CHARACTERISTICS
1000
10
TJ(start) = 25°C
Emax (mJ)
ILmax (A)
TJ(start) = 25°C
TJ(start) = 150°C
TJ(start) = 150°C
1
10
100
100
100
L (mH)
L (mH)
Figure 3. Single Pulse Maximum Switch−off
Current vs. Load Inductance
Figure 4. Single Pulse Maximum Switching
Energy vs. Load Inductance
1000
TJ(start) = 25°C
Emax (mJ)
100
ILmax (A)
10
10
TJ(start) = 25°C
TJ(start) = 150°C
TJ(start) = 150°C
1
1
20
100
10
1
10
tav (ms)
tav (ms)
Figure 5. Single Pulse Maximum Inductive
Switch−off Current vs. Time in Avalanche
Figure 6. Single Pulse Maximum Inductive
Switching Energy vs. Time in Avalanche
20
8V
TA = 25°C
15
6V
7V
9V
10 V
VDS = 10 V
15
10
ID (A)
ID (A)
5V
4V
105°C
3V
5
10
5
VGS = 2.5 V
0
0
1
2
3
4
150°C
0
5
1
2
25°C
−40°C
3
4
VDS (V)
VGS (V)
Figure 7. On−State Ouput Characteristics
Figure 8. Transfer Characteristics
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4
5
NCV8413
TYPICAL CHARACTERISTICS
110
ID = 3 A
140
90
150°C
100
RDS(on) (mW)
RDS(on) (mW)
120
105°C
80
60
25°C
40
−40°C
20
3
4
5
6
7
8
9
105°C, VGS = 5 V
80
150°C, VGS = 10 V
70
60
105°C, VGS = 10 V
50
25°C, VGS = 5 V
40
25°C, VGS = 10 V
30 −40°C, VGS = 5 V
20
1
2
3
4
10
5
7
6
8
9
ID (A)
Figure 9. RDS(on) vs. Gate−Source Voltage
Figure 10. RDS(on) vs. Drain Current
10
22
ID = 5 A
VDS = 10 V
21
1.75
VGS = 5 V
ILIM (A)
1.50
1.25
1.00
VGS = 10 V
20
−40°C
19
25°C
18
105°C
17
150°C
16
15
14
0.75
0.50
−40 −20
0
20
40
60
80
100
120
13
12
140
5
6
7
8
9
10
TJ (°C)
VGS (V)
Figure 11. Normalized RDS(on) vs. Temperature
Figure 12. Current Limit vs. Gate−Source
Voltage
20
100
VGS = 0 V
VDS = 10 V
10
18
VGS = 10 V
150°C
16
IDSS (mA)
ILIM (A)
−40°C, VGS = 10 V
VGS (V)
2.00
NORMALIZED RDS(on)
150°C, VGS = 5 V
100
VGS = 5 V
14
1
0.1
105°C
25°C
0.01
12
−40°C
10
−40 −20
0
20
40
60
80
100
120
0.001
140
10
15
20
25
30
35
TJ (°C)
VDS (V)
Figure 13. Current Limit vs. Junction
Temperature
Figure 14. Drain−to−Source Leakage Current
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5
40
NCV8413
TYPICAL CHARACTERISTICS
1.0
1.2
ID = 1.2 mA
VDS = VGS
1.0
VSD (V)
NORMALIZED VGS(th)
1.1
0.9
0.8
0.7
150°C
0
20
40
60
80
100
140
DRAIN−SOURCE VOLTAGE SLOPE (V/ms)
VDD = 25 V
ID = 5 A
RG = 0 W
60
40 t
OFF
tf
70
4
5
6
7
7
8
9
9
10
10
2.5
2.0
dVDS/dtOFF
1.5
1.0
−dVDS/dtON
VDD = 25 V
ID = 5 A
RG = 0 W
0.5
0
3
4
5
6
7
8
9
10
Figure 17. Resistive Load Switching Time vs.
Gate−Source Voltage
Figure 18. Resistive Load Switching Drain−
Source Voltage Slope vs. Gate−Source Voltage
tOFF, VGS = 10 V
tf, VGS = 5 V
40
tOFF, VGS = 5 V
tON, VGS = 5 V
30
tr, VGS = 5 V
20
tON, VGS = 10 V
tr, VGS = 10 V
0
6
VGS (V)
tf, VGS = 10 V
50
5
VGS (V)
VDD = 25 V
ID = 5 A
60
8
DRAIN−SOURCE VOLTAGE SLOPE (V/ms)
3
4
3
Figure 16. Source−Drain Diode Forward
Characteristics
tr
20
2
Figure 15. Normalized Threshold Voltage vs.
Temperature
tON
80
1
IS (A)
120
100
120
0.5
TJ (°C)
140
TIME (ms)
25°C
VGS = 0 V
160
TIME (ms)
0.8
0.6
0.6
−40 −20
10
−40°C
105°C
0.7
0
0.9
250
500
750
1000 1250 1500
1750 2000
2.0
VDD = 25 V
ID = 5 A
1.8
−dVDS/dtON, VGS = 10 V
1.6
dVDS/dtOFF, VGS = 5 V
dVDS/dtOFF, VGS = 10 V
1.4
−dVDS/dtON, VGS = 5 V
1.2
0
0
250
500
750
1000 1250 1500 1750 2000
RG (W)
RG (W)
Figure 19. Resistive Load Switching Time vs.
Gate Resistance
Figure 20. Resistive Load Switching Drain−
Source Voltage Slope vs. Gate Resistance
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6
NCV8413
TYPICAL CHARACTERISTICS
80
RqJA (°C/W)
70
60
50
PCB Cu thickness, 1.0 oz
40
PCB Cu thickness, 2.0 oz
30
20
0
200
400
600
800
1000
1200
COPPER HEAT SPREADER AREA
1400
(mm2)
Figure 21. RqJA vs. Copper Area
100
Duty Cycle = 0.5
RqJA(t) (°C/W)
10
0.2
0.1
0.05
1 0.02
0.01
0.1
0.01
645 mm2 2 oz. Copper
Single Pulse
0.000001
0.00001
0.0001
0.001
0.01
0.1
1
PULSE WIDTH (s)
Figure 22. Transient Thermal Resistance
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7
10
100
1000
NCV8413
APPLICATION INFORMATION
Circuit Protection Features
junction temperature is exceeded. When activated at
typically 172°C, the NCV8413 turns off. This feature is
provided to prevent failures from accidental overheating.
The NCV8413 has three main protections. Current Limit,
Thermal Shutdown and Delta Thermal Shutdown. These
protections establish robustness of the NCV8413.
EMC Performance
Current Limit and Short Circuit Protection
If better EMC performance is needed, connect a small
ceramic capacitor to the drain pin as close to the device as
possible according to Figure 23.
The NCV8413 has current sense element. In the event that
the drain current reaches designed current limit level,
integrated Current Limit protection establishes its constant
level.
Delta Thermal Shutdown
Delta Thermal Shutdown (DTSD) Protection increases
higher reliability of the NCV8413. DTSD consist of two
independent temperature sensors – cold and hot sensors. The
NCV8413 establishes a slow junction temperature rise by
sensing the difference between the hot and cold sensors.
ON/OFF output cycling is designed with hysteresis that
results in a controlled saw tooth temperature profile
(Figure 24). The die temperature slowly rises (DTSD) until
the absolute temperature shutdown (TSD) is reached around
172°C.
Thermal Shutdown with Automatic Restart
Internal Thermal Shutdown (TSD) circuitry is provided to
protect the NCV8413 in the event that the maximum
Figure 23. EMC Capacitor Placement
TEST CIRCUITS AND WAVEFORMS
Figure 24. Overload Protection Behavior
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8
NCV8413
TEST CIRCUITS AND WAVEFORMS
Figure 25. Resistive Load Switching Test Circuit
Figure 26. Resistive Load Switching Waveforms
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9
NCV8413
TEST CIRCUITS AND WAVEFORMS
Figure 27. Inductive Load Switching Test Circuit
Figure 28. Inductive Load Switching Waveform
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10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE F
4
1 2
DATE 21 JUL 2015
3
SCALE 1:1
A
E
b3
B
c2
4
L3
Z
D
1
L4
C
A
2
3
NOTE 7
b2
e
c
SIDE VIEW
b
0.005 (0.13)
TOP VIEW
H
DETAIL A
M
BOTTOM VIEW
C
Z
H
L2
GAUGE
PLANE
C
L
L1
DETAIL A
Z
SEATING
PLANE
BOTTOM VIEW
A1
ALTERNATE
CONSTRUCTIONS
ROTATED 905 CW
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 6:
PIN 1. MT1
2. MT2
3. GATE
4. MT2
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
STYLE 7:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 3:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. CATHODE
STYLE 8:
PIN 1. N/C
2. CATHODE
3. ANODE
4. CATHODE
STYLE 4:
PIN 1. CATHODE
2. ANODE
3. GATE
4. ANODE
STYLE 9:
STYLE 10:
PIN 1. ANODE
PIN 1. CATHODE
2. CATHODE
2. ANODE
3. RESISTOR ADJUST
3. CATHODE
4. CATHODE
4. ANODE
SOLDERING FOOTPRINT*
6.20
0.244
2.58
0.102
5.80
0.228
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.028 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.114 REF
0.020 BSC
0.035 0.050
−−− 0.040
0.155
−−−
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.72
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.90 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
GENERIC
MARKING DIAGRAM*
XXXXXXG
ALYWW
AYWW
XXX
XXXXXG
IC
Discrete
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer
to device data sheet for actual part
marking.
6.17
0.243
SCALE 3:1
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
XXXXXX
A
L
Y
WW
G
3.00
0.118
1.60
0.063
STYLE 5:
PIN 1. GATE
2. ANODE
3. CATHODE
4. ANODE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
7. OPTIONAL MOLD FEATURE.
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON10527D
DPAK (SINGLE GAUGE)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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