NID5001NT4

NID5001N Self−Protected FET with Temperature and Current Limit HDPlus devices are an advanced series of power MOSFETs which utilize ON Semicondutor’s latest MOSFET technology process to achieve the lowest possible on−resistance per silicon area while incorporating smart features. Integrated thermal and current limits work together to provide short circuit protection. The devices feature an integrated Drain−to−Gate Clamp that enables them to withstand high energy in the avalanche mode. The Clamp also provides additional safety margin against unexpected voltage transients. Electrostatic Discharge (ESD) protection is provided by an integrated Gate−to−Source Clamp. http://onsemi.com VDSS (Clamped) RDS(ON) TYP ID MAX (Limited) 42 V 23 mW @ 10 V 33 A* *Max current may be limited below this value depending on input conditions. Drain Features • • • • • • • • • Low RDS(on) Current Limitation Thermal Shutdown with Automatic Restart Short Circuit Protection IDSS Specified at Elevated Temperature Avalanche Energy Specified Slew Rate Control for Low Noise Switching Overvoltage Clamped Protection Pb−Free Package is Available Gate Input RG Overvoltage Protection MPWR ESD Protection Temperature Limit Current Limit Current Sense Source MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Value Unit Drain−to−Source Voltage Internally Clamped VDSS 42 Vdc Drain−to−Gate Voltage Internally Clamped (RGS = 1.0 MW) VDGR 42 Vdc Rating Gate−to−Source Voltage VGS Drain Current − Continuous ID Total Power Dissipation @ TA = 25°C (Note 1) @ TA = 25°C (Note 1) @ TA = 25°C (Note 2) PD "14 Vdc Internally Limited W 64 1.0 1.56 Thermal Resistance, Junction−to−Case Junction−to−Ambient (Note 1) Junction−to−Ambient (Note 2) RqJC RqJA RqJA 1.95 120 80 °C/W Single Pulse Drain−to−Source Avalanche Energy (VDD = 25 Vdc, VGS = 5.0 Vdc, IL = 4.5 Apk, L = 120 mH, RG = 25 W) EAS 1215 mJ Operating and Storage Temperature Range April, 2006 − Rev. 8 Y WW D5001N G −55 to 150 °C 1 2 3 = Year = Work Week = Device Code = Pb−Free Package YWW D50 01NG 1 = Gate 2 = Drain 3 = Source ORDERING INFORMATION NID5001NT4 NID5001NT4G TJ, Tstg 1 DPAK CASE 369C STYLE 2 Device Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Minimum FR4 PCB, steady state. 2. Mounted onto a 2″ square FR4 board (1″ square, 2 oz. Cu 0.06″ thick single−sided, t = steady state). © Semiconductor Components Industries, LLC, 2006 MARKING DIAGRAM Package Shipping† DPAK 2500/Tape & Reel DPAK (Pb−Free) 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NID5001N/D NID5001N MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Drain−to−Source Clamped Breakdown Voltage (VGS = 0 Vdc, ID = 250 mAdc) (VGS = 0 Vdc, ID = 250 mAdc, TJ = 150°C) V(BR)DSS Min Typ Max Unit 42 42 46 44 50 50 Vdc 1.5 6.5 5.0 50 100 mAdc 1.8 5.0 2.0 Vdc −mV/°C 23 43 29 55 28 50 34 60 VSD 0.80 1.1 V VGS = 5.0 Vdc, VDD = 25 Vdc ID = 1.0 Adc, Ext RG = 2.5 W T(on) 32 40 ms T(off) 68 75 VGS = 10 Vdc, VDD = 25 Vdc, ID = 1.0 Adc, Ext RG = 2.5 W T(on) 11 15 T(off) 86 95 Slew Rate On RL = 4.7 W, Vin = 0 to 10 V, VDD = 12 V −dVDS/dton 0.5 V/ms Slew−Rate Off RL = 4.7 W, Vin = 10 to 0 V, VDD = 12 V dVDS/dtoff 0.35 V/ms OFF CHARACTERISTICS Zero Gate Voltage Drain Current (VDS = 32 Vdc, VGS = 0 Vdc) (VDS = 32 Vdc, VGS = 0 Vdc, TJ = 150°C) IDSS Gate Input Current (VGS = 5.0 Vdc, VDS = 0 Vdc) IGSSF mAdc ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = 1.2 mAdc) Threshold Temperature Coefficient VGS(th) Static Drain−to−Source On−Resistance (Note 3) (VGS = 10 Vdc, ID = 5.0 Adc, TJ @ 25°C) (VGS = 10 Vdc, ID = 5.0 Adc, TJ @ 150°C) RDS(on) Static Drain−to−Source On−Resistance (Note 3) (VGS = 5.0 Vdc, ID = 5.0 Adc, TJ @ 25°C) (VGS = 5.0 Vdc, ID = 5.0 Adc, TJ @ 150°C) RDS(on) 1.0 Source−Drain Forward On Voltage (IS = 5 A, VGS = 0 V) mW mW SWITCHING CHARACTERISTICS Turn−on Time Turn−off Time Turn−on Time Turn−off Time SELF PROTECTION CHARACTERISTICS (TJ = 25°C unless otherwise noted) Current Limit (VGS = 5.0 Vdc) VDS = 10 V (VGS = 5.0 Vdc, TJ = 150°C) ILIM 30 19 36 30 29 13 41 24 49 31 TLIM(off) 150 175 200 °C TLIM(on) 135 160 185 °C TLIM(off) 150 165 185 °C TLIM(on) 135 150 170 °C (VGS = 10 Vdc) VDS = 10 V (VGS = 10 Vdc, TJ = 150°C) Temperature Limit (Turn−off) VGS = 5.0 Vdc Temperature Limit (Circuit Reset) VGS = 5.0 Vdc Temperature Limit (Turn−off) VGS = 10 Vdc Temperature Limit (Circuit Reset) VGS = 10 Vdc Adc 21 12 ESD ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Electro−Static Discharge Capability Human Body Model (HBM) Machine Model (MM) ESD V 4000 400 3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. http://onsemi.com 2 NID5001N TYPICAL PERFORMANCE CURVES ID, DRAIN CURRENT (AMPS) VGS = 10 V to 4.2 V 28 4V 3.8 V 24 ID, DRAIN CURRENT (AMPS) 28 3.6 V 20 TJ = 25°C 3.4 V 16 3.2 V 12 3.0 V 8 2.8 V 4 2.6 V 0 20 TC = −55°C 16 12 8 25°C 4 100°C 0.5 1 1.5 2 2.5 3 3.5 4 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 1 2 3 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 24 0 0 0.2 ID = 5 A TJ = 25°C 0.15 0.1 0.05 0 2 3 5 4 6 7 8 9 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 10 4 0.035 TJ = 25°C 0.03 VGS = 5 V 0.025 VGS = 10 V 0.02 0.015 2 3 4 5 6 7 8 9 10 ID, DRAIN CURRENT (AMPS) Figure 4. On−Resistance vs. Drain Current and Gate Voltage Figure 3. On−Resistance vs. Gate−to−Source Voltage 1.6 100000 ID = 5 A VGS = 10 V VGS = 0 V 1.4 IDSS, LEAKAGE (A) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) VDS ≥ 10 V 10000 1.2 1 TJ = 150°C 1000 TJ = 100°C 0.8 0.6 −50 −25 0 25 50 75 100 100 10 15 20 25 30 35 40 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 45 NID5001N TYPICAL PERFORMANCE CURVES 100 VGS = 0 V TJ = 25°C 0.12 I D , DRAIN CURRENT (AMPS) IS, SOURCE CURRENT (AMPS) 0.14 0.1 0.08 0.06 0.04 VGS = 5 V SINGLE PULSE TC = 25°C 10 dc 1.0 0.1 0.5 0.6 0.7 0.8 0.1 0.9 100 ms RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.01 0.4 10 ms 1 ms 0.02 0 0.3 Based upon a TJ = 100°C, Steady State. 1.0 10 VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 8. Maximum Rated Forward Biased Safe Operating Area Figure 7. Diode Forward Voltage vs. Current http://onsemi.com 4 100 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C ISSUE F 4 1 2 DATE 21 JUL 2015 3 SCALE 1:1 A E b3 C A B c2 4 L3 Z D 1 L4 2 3 NOTE 7 b2 e c SIDE VIEW b 0.005 (0.13) TOP VIEW H DETAIL A M BOTTOM VIEW C Z H L2 GAUGE PLANE C L L1 DETAIL A Z SEATING PLANE BOTTOM VIEW A1 ALTERNATE CONSTRUCTIONS ROTATED 905 CW STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 6: PIN 1. MT1 2. MT2 3. GATE 4. MT2 STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN STYLE 7: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 3: PIN 1. ANODE 2. CATHODE 3. ANODE 4. CATHODE STYLE 8: PIN 1. N/C 2. CATHODE 3. ANODE 4. CATHODE STYLE 4: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE STYLE 9: STYLE 10: PIN 1. ANODE PIN 1. CATHODE 2. CATHODE 2. ANODE 3. RESISTOR ADJUST 3. CATHODE 4. CATHODE 4. ANODE SOLDERING FOOTPRINT* 6.20 0.244 2.58 0.102 5.80 0.228 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.028 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.114 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.72 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.90 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− GENERIC MARKING DIAGRAM* XXXXXXG ALYWW AYWW XXX XXXXXG IC Discrete = Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. 6.17 0.243 SCALE 3:1 DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z XXXXXX A L Y WW G 3.00 0.118 1.60 0.063 STYLE 5: PIN 1. GATE 2. ANODE 3. CATHODE 4. ANODE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. 7. OPTIONAL MOLD FEATURE. mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON10527D DPAK (SINGLE GAUGE) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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