STP105N3LL

STP105N3LL N-channel 30 V, 2.7 mΩ typ., 150 A, STripFET™ H6 Power MOSFET in a TO-220 package Datasheet − production data Features TAB Order code VDS RDS(on) max. ID STP105N3LL 30 V 3.5 mΩ 150 A • Very low on-resistance • Very low gate charge 3 1 • High avalanche ruggedness 2 TO-220 • Low gate drive power loss Applications • Switching applications Figure 1. Internal schematic diagram Description '7$% This device is an N-channel Power MOSFET developed using the STripFET™ H6 technology, with a new trench gate structure. The resulting Power MOSFET exhibits very low RDS(on) in all packages. * 6 $0Y Table 1. Device summary Order code Marking Packages Packaging STP105N3LL P105N3LL TO-220 Tube July 2015 This is information on a product in full production. DocID023976 Rev 3 1/13 www.st.com Contents STP105N3LL Contents 1 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................ 6 3 Test circuits 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/13 .............................................. 8 DocID023976 Rev 3 STP105N3LL 1 Electrical ratings Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit VDS Drain-source voltage 30 V VGS Gate-source voltage ± 20 V ID Continuous drain current at TC = 25 °C (silicon limited) 150 A ID Continuous drain current at TC = 100 °C (silicon limited) 105 A ID Continuous drain current at TC = 25 °C (package limited) 80 A IDM (1) Pulsed drain current 320 A PTOT Total dissipation at TC = 25 °C 140 W Derating factor 0.9 W/°C Single pulse avalanche energy 150 mJ -55 to 175 °C 175 °C Value Unit EAS (2) Tstg Tj Storage temperature Max. operating junction temperature 1. Pulse width limited by safe operating area 2. Starting Tj = 25°C, IAV = 40 A Table 3. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case max 1.1 °C/W Rthj-amb Thermal resistance junction-ambient max 62.5 °C/W DocID023976 Rev 3 3/13 13 Electrical characteristics 2 STP105N3LL Electrical characteristics (TCASE = 25 °C unless otherwise specified). Table 4. Static Symbol V(BR)DSS Parameter Test conditions Drain-source breakdown Voltage ID = 250 µA, VGS= 0 Min. Typ. Max. 30 Unit V VDS = 30 V 1 µA VDS = 30 V, Tc = 125 °C 10 µA ±100 nA 2.5 V 2.7 3.5 mΩ 3.5 4.5 mΩ Min Typ. Max. Unit - 3500 - pF - 400 - pF - 380 - pF - 42 - nC - 9 - nC - 18 - nC - 1 - Ω IDSS Zero gate voltage drain current (VGS = 0) IGSS Gate body leakage current (VDS = 0) VGS = ± 20 V VGS(th) Gate threshold voltage VDS = VGS, ID = 250 µA RDS(on) Static drain-source onresistance VGS = 10 V, ID = 40 A VGS = 4.5 V, ID = 40 A 1 Table 5. Dynamic Symbol Parameter Ciss Input capacitance Coss Output capacitance Crss Reverse transfer capacitance Qg Total gate charge Qgs Gate-source charge Qgd Gate-drain charge Rg Test conditions VDS = 25 V, f=1 MHz, VGS = 0 VDD = 15 V, ID = 80 A VGS = 4.5 V Figure 14 Gate input resistance f = 1 MHz, gate DC Bias = 0, test signal level = 20 mV, ID = 0 Table 6. Switching on/off (inductive load) Symbol td(on) tr td(off) tf 4/13 Parameter Test conditions Turn-on delay time Rise time Turn-off delay time VDD = 15 V, ID = 40 A, RG = 4.7 Ω, VGS = 5 V Figure 13 Fall time DocID023976 Rev 3 Min. Typ. Max. Unit - 19 - ns - 91 - ns - 24.5 - ns - 23.4 - ns STP105N3LL Electrical characteristics Table 7. Source drain diode Symbol ISD ISDM (1) VSD(2) Parameter Test conditions Min. Typ. Max. Unit Source-drain current - 80 A Source-drain current (pulsed) - 320 A 1.1 V Forward on voltage ISD = 40 A, VGS = 0 - trr Reverse recovery time - 28.6 ns Qrr Reverse recovery charge - 22.8 nC IRRM Reverse recovery current ISD = 80 A, di/dt = 100 A/µs, VDD = 24 V Figure 15 - 1.6 A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID023976 Rev 3 5/13 13 Electrical characteristics 2.1 STP105N3LL Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance AM18155v1 ID (A) K is rea s a S(on) thi D in x R n a tio m era by Op ited Lim 100 AM18156v1 δ=0.5 0.2 100µs 0.1 10 1ms 0.05 10 -1 10ms 1s 1 0.02 c 0.01 Single pulse 0.1 Tj=175°C Tc=25°C Single pulse 0.01 0.1 1 VDS(V) 10 Figure 4. Output characteristics 3V 300 VGS= 4, 5, 6, 7, 8, 9, 10V 250 200 200 150 150 100 100 50 3 4 AM18159v1 VDD=15V ID=80A 10 VDS=1V 1 2 3 4 VGS(V) Figure 7. Static drain-source on-resistance AM18160v1 RDS(on) (mΩ) VGS=10V 2.90 8 2.80 6 2.70 4 2.60 2 2.50 2.40 0 0 6/13 tp(s) AM18158v1 0 0 VDS(V) Figure 6. Gate charge vs gate-source voltage VGS (V) 10 0 50 1V 2 10 -1 ID (A) 250 1 10 -2 10 -3 300 2V 0 0 10 -4 Figure 5. Transfer characteristics AM18157v1 ID (A) 10 -2 10 -5 20 40 60 80 Qg(nC) DocID023976 Rev 3 0 20 40 60 80 ID(A) STP105N3LL Electrical characteristics Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature AM18161v1 C (pF) AM18162v1 VGS(th) (norm) ID=250µA 1.2 5000 1 4000 Ciss 0.8 3000 0.6 2000 0.4 1000 Coss Crss 0 0 10 0.2 0 -55 VDS(V) 20 Figure 10. Normalized on-resistance vs temperature AM18163v1 RDS(on) -5 45 95 120 TJ(°C) Figure 11. Normalized V(BR)DSS vs temperature AM18164v1 V(BR)DSS (norm) (norm) ID=40A VGS=10V 2 1.08 ID=1mA 1.06 1.04 1.5 1.02 1 1 0.98 0.96 0.5 0.94 0 -55 -5 45 95 120 TJ(°C) 0.92 -55 -5 45 95 145 TJ(°C) Figure 12. Source-drain diode forward characteristics AM18165v1 VSD (V) TJ=-55°C 1 0.9 TJ=25°C 0.8 0.7 TJ=175°C 0.6 0.5 0.4 0 10 20 30 40 50 60 70 ISD(A) DocID023976 Rev 3 7/13 13 Test circuits 3 STP105N3LL Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD 12V 47kΩ 1kΩ 100nF 3.3 μF 2200 RL μF IG=CONST VDD VGS 100Ω Vi=20V=VGMAX VD RG 2200 μF D.U.T. D.U.T. VG 2.7kΩ PW 47kΩ 1kΩ PW AM01468v1 Figure 15. Test circuit for inductive load switching and diode recovery times A A AM01469v1 Figure 16. Unclamped inductive load test circuit L A D G D.U.T. FAST DIODE B B VD L=100μH S 3.3 μF B 25 Ω 1000 μF D VDD 2200 μF 3.3 μF VDD ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform ton V(BR)DSS tdon VD toff tr tdoff tf 90% 90% IDM 10% ID VDD 10% 0 VDD VDS 90% VGS AM01472v1 8/13 0 DocID023976 Rev 3 10% AM01473v1 STP105N3LL 4 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. DocID023976 Rev 3 9/13 13 Package information STP105N3LL Figure 19. TO-220 type A package outline BW\SH$B5HYB7 10/13 DocID023976 Rev 3 STP105N3LL Package information Table 8. TO-220 type A package mechanical data mm Dim. Min. Typ. Max. A 4.40 4.60 b 0.61 0.88 b1 1.14 1.70 c 0.48 0.70 D 15.25 15.75 D1 1.27 E 10 10.40 e 2.40 2.70 e1 4.95 5.15 F 1.23 1.32 H1 6.20 6.60 J1 2.40 2.72 L 13 14 L1 3.50 3.93 L20 16.40 L30 28.90 ∅P 3.75 3.85 Q 2.65 2.95 DocID023976 Rev 3 11/13 13 Revision history 5 STP105N3LL Revision history Table 9. Document revision history 12/13 Date Revision Changes 13-Dec-2012 1 First release. 03-Apr-2014 2 – Added: Section 2.1: Electrical characteristics (curves) – Minor text changes 06-Jul-2015 3 – Updated Table 1: Device summary. – Updated title, features and description in cover page. – Minor text changes. DocID023976 Rev 3 STP105N3LL IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved DocID023976 Rev 3 13/13 13