TS4871IQT

TS4871 OUTPUT RAIL TO RAIL 1W AUDIO POWER AMPLIFIER WITH STANDBY MODE s OPERATING FROM VCC = 2.5V to 5.5V s 1W RAIL TO RAIL OUTPUT POWER @ Vcc=5V, THD=1%, f=1kHz, with 8Ω Load MODE (10nA) PIN CONNECTIONS (Top View) TS4871IST - MiniSO8 1 2 3 4 8 7 6 5 s ULTRA LOW CONSUMPTION IN STANDBY Standby Bypass VIN+ VINVOUT2 GND VCC VOUT1 s 75dB PSRR @ 217Hz from 5V to 2.6V s ULTRA LOW POP & CLICK s ULTRA LOW DISTORTION (0.1%) s UNITY GAIN STABLE s AVAILABLE IN SO8, MiniSO8 & DFN8 3x3mm DESCRIPTION TS4871ID-TS4871IDT - SO8 Standby 1 2 3 4 8 7 6 5 VOUT2 GND VCC VOUT1 The TS4871 is an Audio Power Amplifier capable of delivering 1W of continuous RMS Ouput Power into 8Ω load @ 5V. This Audio Amplifier is exhibiting 0.1% distortion level (THD) from a 5V supply for a Pout = 250mW RMS. An external standby mode control reduces the supply current to less than 10nA. An internal thermal shutdown protection is also provided. The TS4871 has been designed for high quality audio applications such as mobile phones and to minimize the number of external components. The unity-gain stable amplifier can be configured by external gain setting resistors. APPLICATIONS Bypass VIN+ VIN- TS4871IQT - DFN8 STANDBY BYPASS VIN+ VIN- 1 2 3 4 8 7 6 5 VOUT 2 GND Vcc VOUT 1 s Mobile Phones (Cellular / Cordless) s Laptop / Notebook Computers s PDAs s Portable Audio Devices ORDER CODE Part Number TS4871 Temperature Range: I -40, +85°C Package Marking D • • • S Q 4871I 4871 Vcc Audio Input TYPICAL APPLICATION SCHEMATIC Cfeed Rfeed Vcc 6 Vcc Cs Rin Cin 4 3 VinVin+ + Vout1 5 RL 8 Ohms Av=-1 + Vout2 8 2 Rstb 1 Bypass Standby Bias GND TS4871 Cb 7 MiniSO & DFN only available in Tape & Reel with T suffix(IST & IQT) D = Small Outline Package (SO) - also available in Tape & Reel (DT) June 2003 1/28 TS4871 ABSOLUTE MAXIMUM RATINGS Symbol VCC Vi Toper Tstg Tj Rthja Supply voltage Input Voltage 2) 1) Parameter Value 6 GND to VCC -40 to + 85 -65 to +150 150 175 215 70 Internally Limited4) 2 200 Class A 260 Unit V V °C °C °C °C/W Operating Free Air Temperature Range Storage Temperature Maximum Junction Temperature Thermal Resistance Junction to Ambient 3) SO8 MiniSO8 QNF8 Power Dissipation Pd ESD Human Body Model ESD Machine Model Latch-up Latch-up Immunity Lead Temperature (soldering, 10sec) 1. 2. 3. 4. All voltages values are measured with respect to the ground pin. The magnitude of input signal must never exceed VCC + 0.3V / G ND - 0.3V Device is protected in case of over temperature by a thermal shutdown active @ 150°C. Exceeding the power derating curves during a long period, involves abnormal operating condition. kV V °C OPERATING CONDITIONS Symbol VCC VICM VSTB RL Rthja Supply Voltage Common Mode Input Voltage Range Standby Voltage Input : Device ON Device OFF Load Resistor Thermal Resistance Junction to Ambient SO8 MiniSO8 DFN8 2) 1) Parameter Value 2.5 to 5.5 GND to VCC - 1.2V GND ≤ VSTB ≤ 0.5V VCC - 0.5V ≤ VSTB ≤ VCC 4 - 32 150 190 41 Unit V V V Ω °C/W 1. This thermal resistance can be reduced with a suitable PCB layout (see Power Derating Curves Fig. 20) 2. When mounted on a 4 layers PCB 2/28 TS4871 ELECTRICAL CHARACTERISTICS VCC = +5V, GND = 0V, Tamb = 25°C (unless otherwise specified) Symbol ICC ISTANDBY Voo Po THD + N PSRR ΦM GM GBP Parameter Supply Current No input signal, no load Standby Current 1) No input signal, Vstdby = Vcc, RL = 8Ω Output Offset Voltage No input signal, RL = 8Ω Output Power THD = 1% Max, f = 1kHz, RL = 8Ω Total Harmonic Distortion + Noise Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω Power Supply Rejection Ratio2) f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms Phase Margin at Unity Gain RL = 8Ω, CL = 500pF Gain Margin RL = 8Ω, CL = 500pF Gain Bandwidth Product RL = 8Ω Min. Typ. 6 10 5 1 0.15 75 70 20 2 Max. 8 1000 20 Unit mA nA mV W % dB Degrees dB MHz 1. Standby mode is actived when Vstdby is tied to Vcc 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz VCC = +3.3V, GND = 0V, Tamb = 25°C (unless otherwise specified)3) Symbol ICC ISTANDBY Voo Po THD + N PSRR ΦM GM GBP Parameter Supply Current No input signal, no load Standby Current 1) No input signal, Vstdby = Vcc, RL = 8Ω Output Offset Voltage No input signal, RL = 8Ω Output Power THD = 1% Max, f = 1kHz, RL = 8Ω Total Harmonic Distortion + Noise Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω Power Supply Rejection Ratio2) f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms Phase Margin at Unity Gain RL = 8Ω, CL = 500pF Gain Margin RL = 8Ω, CL = 500pF Gain Bandwidth Product RL = 8Ω Min. Typ. 5.5 10 5 450 0.15 75 70 20 2 Max. 8 1000 20 Unit mA nA mV mW % dB Degrees dB MHz 1. Standby mode is actived when Vstdby is tied to Vcc 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz 3. All electrical values are made by correlation between 2.6V and 5V measurements 3/28 TS4871 ELECTRICAL CHARACTERISTICS VCC = 2.6V, GND = 0V, Tamb = 25°C (unless otherwise specified) Symbol ICC ISTANDBY Voo Po THD + N PSRR ΦM GM GBP Parameter Supply Current No input signal, no load Standby Current 1) No input signal, Vstdby = Vcc, RL = 8Ω Output Offset Voltage No input signal, RL = 8Ω Output Power THD = 1% Max, f = 1kHz, RL = 8Ω Total Harmonic Distortion + Noise Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω Power Supply Rejection Ratio2) f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms Phase Margin at Unity Gain RL = 8Ω, CL = 500pF Gain Margin RL = 8Ω, CL = 500pF Gain Bandwidth Product RL = 8Ω Min. Typ. 5.5 10 5 260 0.15 75 70 20 2 Max. 8 1000 20 Unit mA nA mV mW % dB Degrees dB MHz 1. Standby mode is actived when Vstdby is tied to Vcc 2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz Components Rin Cin Rfeed Cs Cb Cfeed Rstb Gv Functional Description Inverting input resistor which sets the closed loop gain in conjunction with Rfeed. This resistor also forms a high pass filter with Cin (fc = 1 / (2 x Pi x Rin x Cin)) Input coupling capacitor which blocks the DC voltage at the amplifier input terminal Feed back resistor which sets the closed loop gain in conjunction with Rin Supply Bypass capacitor which provides power supply filtering Bypass pin capacitor which provides half supply filtering Low pass filter capacitor allowing to cut the high frequency (low pass filter cut-off frequency 1 / (2 x Pi x Rfeed x Cfeed)) Pull-up resistor which fixes the right supply level on the standby pin Closed loop gain in BTL configuration = 2 x (Rfeed / Rin) REMARKS 1. All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = 100µF. 2. External resistors are not needed for having better stability when supply @ Vcc down to 3V. By the way, the quiescent current remains the same. 3. The standby response time is about 1µs. 4/28 TS4871 Fig. 1 : Open Loop Frequency Response Fig. 2 : Open Loop Frequency Response 0 60 Gain Vcc = 5V RL = 8Ω Tamb = 25°C -20 -40 -60 Phase (Deg) 0 60 Gain Vcc = 5V ZL = 8Ω + 560pF Tamb = 25°C -20 -40 -60 Phase (Deg) 40 Gain (dB) 40 Phase Gain (dB) Phase 20 -80 -100 -120 -80 -100 -120 20 0 -140 -160 0 -140 -160 -20 -180 -200 -20 -180 -200 -40 0.3 1 10 100 Frequency (kHz) 1000 10000 -220 -40 0.3 1 10 100 1000 Frequency (kHz) 10000 -220 Fig. 3 : Open Loop Frequency Response Fig. 4 : Open Loop Frequency Response 80 60 40 Gain Vcc = 3.3V RL = 8Ω Tamb = 25°C 0 -20 -40 -60 -80 80 60 40 Phase 20 0 -20 -40 0.3 Gain Vcc = 3.3V ZL = 8Ω + 560pF Tamb = 25°C 0 -20 -40 -60 -80 -100 -120 -140 -160 -180 -200 -220 1 10 100 1000 Frequency (kHz) 10000 -240 Phase (Deg) Phase (Deg) Phase 20 0 -100 -120 -140 -160 -180 -200 -220 -240 -20 -40 0.3 1 10 100 1000 Frequency (kHz) 10000 Fig. 5 : Open Loop Frequency Response Phase (Deg) Gain (dB) Fig. 6 : Open Loop Frequency Response Gain (dB) 80 60 40 Gain (dB) 0 Gain Vcc = 2.6V RL = 8Ω Tamb = 25°C -20 -40 -60 -80 Phase Phase (Deg) Gain (dB) 80 Gain 60 40 Phase 20 0 -20 -40 0.3 Vcc = 2.6V ZL = 8Ω + 560pF Tamb = 25°C 0 -20 -40 -60 -80 -100 -120 -140 -160 -180 -200 -220 1 10 100 1000 Frequency (kHz) 10000 -240 -100 -120 -140 -160 -180 -200 -220 -240 20 0 -20 -40 0.3 1 10 100 1000 Frequency (kHz) 10000 5/28 TS4871 Fig. 7 : Open Loop Frequency Response Fig. 8 : Open Loop Frequency Response 100 80 60 Gain Gain (dB) -80 Phase -100 -120 Phase (Deg) 100 80 60 Gain Gain (dB) -80 Phase -100 -120 -140 -160 Phase (Deg) 40 20 0 -20 -40 0.3 -140 -160 -180 Vcc = 5V CL = 560pF Tamb = 25°C 1 10 100 1000 Frequency (kHz) 10000 -200 40 20 -180 0 -20 Vcc = 3.3V CL = 560pF Tamb = 25°C 1 10 100 1000 Frequency (kHz) 10000 -200 -220 -240 -220 -40 0.3 Fig. 9 : Open Loop Frequency Response 100 80 60 Gain Gain (dB) -80 Phase -100 -120 -140 -160 Phase (Deg) 40 20 -180 0 -20 -40 0.3 Vcc = 2.6V CL = 560pF Tamb = 25°C 1 10 100 1000 Frequency (kHz) 10000 -200 -220 -240 6/28 TS4871 Fig. 10 : Power Supply Rejection Ratio (PSRR) vs Power supply Fig. 11 : Power Supply Rejection Ratio (PSRR) vs Feedback Capacitor -30 Vripple = 200mVrms Rfeed = 22Ω Input = floating RL = 8Ω Tamb = 25°C -10 -20 -30 PSRR (dB) -40 PSRR (dB) -50 -40 -50 -60 Vcc = 5, 3.3 & 2.6V Cb = 1µF & 0.1µF Rfeed = 22kΩ Vripple = 200mVrms Input = floating RL = 8Ω Tamb = 25°C Cfeed=0 Cfeed=150pF Cfeed=330pF -60 Vcc = 5V, 3.3V & 2.6V Cb = 1µF & 0.1µF -70 -70 -80 10 Cfeed=680pF 100 1000 10000 Frequency (Hz) 100000 -80 10 100 1000 10000 Frequency (Hz) 100000 Fig. 12 : Power Supply Rejection Ratio (PSRR) vs Bypass Capacitor Fig. 13 : Power Supply Rejection Ratio (PSRR) vs Input Capacitor -10 -10 Cb=1µF -20 Cb=10µF -30 PSRR (dB) Cin=1µF Cin=330nF -40 -50 -60 -70 -80 10 Cb=100µF 100 1000 Cb=47µF PSRR (dB) Vcc = 5, 3.3 & 2.6V Rfeed = 22k Rin = 22k, Cin = 1µF Rg = 100Ω, RL = 8Ω Tamb = 25°C -20 Cin=220nF -30 Vcc = 5, 3.3 & 2.6V Rfeed = 22kΩ, Rin = 22k Cb = 1µF Rg = 100Ω, RL = 8Ω Tamb = 25°C -40 Cin=100nF -50 Cin=22nF -60 10 10000 100000 Frequency (Hz) 100 1000 Frequency (Hz) 10000 100000 Fig. 14 : Power Supply Rejection Ratio (PSRR) vs Feedback Resistor -10 -20 -30 PSRR (dB) -40 -50 -60 Vcc = 5, 3.3 & 2.6V Cb = 1µF & 0.1µF Vripple = 200mVrms Input = floating RL = 8Ω Tamb = 25°C Rfeed=110kΩ Rfeed=47kΩ Rfeed=22kΩ -70 Rfeed=10kΩ -80 10 100 1000 10000 Frequency (Hz) 100000 7/28 TS4871 Fig. 15 : Pout @ THD + N = 1% vs Supply Voltage vs RL Fig. 16 : Pout @ THD + N = 10% vs Supply Voltage vs RL 1.4 Output power @ 10% THD + N (W) Output power @ 1% THD + N (W) 2.0 Gv = 2 & 10 Cb = 1µF F = 1kHz BW < 125kHz Tamb = 25°C 8Ω 6Ω 4Ω 16Ω 1.2 1.0 0.8 0.6 0.4 0.2 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 2.5 Gv = 2 & 10 Cb = 1µF F = 1kHz BW < 125kHz Tamb = 25°C 8Ω 4Ω 6Ω 16Ω 32Ω 0.0 2.5 3.0 3.5 Vcc (V) 32Ω 3.0 3.5 Vcc (V) 4.0 4.5 5.0 4.0 4.5 5.0 Fig. 17 : Power Dissipation vs Pout Fig. 18 : Power Dissipation vs Pout 1.4 Vcc=5V 1.2 F=1kHz THD+N 4.4ms). Increasing Cin value increases the pop and click phenomena to an unpleasant sound at power supply ON and standby function ON/OFF. Why Cs is not important in pop and click consideration ? Hypothesis : • Cs = 100µF • Supply voltage = 5V • Supply voltage internal resistor = 0.1Ω • Supply current of the amplifier Icc = 6mA At power ON of the supply, the supply capacitor is charged through the internal power supply resistor. So, to reach 5V you need about five to ten times the charging time constant of Cs (τs = 0.1xCs (s)). Then, this time equal 50µs to 100µs > tdischCs. s Power amplifier design examples Given : • • • • • • • Load impedance : 8Ω Output power @ 1% THD+N : 0.5W Input impedance : 10kΩ min. Input voltage peak to peak : 1Vpp Bandwidth frequency : 20Hz to 20kHz (0, -3dB) Ambient temperature max = 50°C SO8 package First of all, we must calculate the minimum power supply voltage to obtain 0.5W into 8Ω. With curves in fig. 15, we can read 3.5V. Thus, the power supply voltage value min. will be 3.5V. Following equation the maximum power dissipation Pdiss max = 2 Vcc 2 π2RL (W) with 3.5V we have Pdissmax=0.31W. Refer to power derating curves (fig. 20), with 0.31W the maximum ambient temperature will be 100°C. This last value could be higher if you follow the example layout shown on the demoboard (better dissipation). The gain of the amplifier in flat region will be: V OUTP P 2 2 R L P OUT G V = -------------------- = ----------------------------------- = 5.65 VINPP VINPP We have Rin > 10kΩ. Let's take Rin = 10kΩ, then Rfeed = 28.25kΩ. We could use for Rfeed = 30kΩ in normalized value and the gain will be Gv = 6. In lower frequency we want 20 Hz (-3dB cut off frequency). Then: So, we could use for Cin a 1µF capacitor value TS4871 Application n°1 : 20Hz to 20kHz bandwidth and 6dB gain BTL power amplifier. Components : Designator R1 R4 R6 R7 R8* C5 C6 C7 C9 C10 Part Type 22k / 0.125W 22k / 0.125W Short Cicuit 330k / 0.125W (Vcc-Vf_led)/If_led 470nF 100µF 100nF Short Circuit Short Circuit 1µF 2mm insulated Plug 10.16mm pitch 3 pts connector 2.54mm pitch PCB Phono Jack Led 3mm TS4871ID or TS4871IS 1 C IN = ----------------------------- = 795nF 2 π R inF C L which gives 16Hz. In Higher frequency we want 20kHz (-3dB cut off frequency). The Gain Bandwidth Product of the TS4871 is 2MHz typical and doesn’t change when the amplifier delivers power into the load. The first amplifier has a gain of: Rfee d ----------------- = 3 R in and the theoretical value of the -3dB cut-off higher frequency is 2MHz/3 = 660kHz. We can keep this value or limit the bandwidth by adding a capacitor Cfeed, in parallel on Rfeed. Then: C FE E D 1 = -------------------------------------- = 265pF 2π R F EEDFC H So, we could use for Cfeed a 220pF capacitor value that gives 24kHz. Now, we can calculate the value of Cb with the formula τb = 50k ΩxCb >> τin = (Rin+Rfeed)xCin which permits to reduce the pop and click effects. Then Cb >> 0.8µF. We can choose for Cb a normalized value of 2.2µF that gives good results in THD+N and PSRR. In the following tables, you could find three another examples with values required for the demoboard. Remark : components with (*) marking are optional. C12 S1, S2, S6, S7 S8 P1 D1* U1 Application n°2 : 20Hz to 20kHz bandwidth and 20dB gain BTL power amplifier. Components : Designator R1 R4 R6 R7 R8* C5 C6 C7 Part Type 110k / 0.125W 22k / 0.125W Short Cicuit 330k / 0.125W (Vcc-Vf_led)/If_led 470nF 100µF 100nF 23/28 TS4871 Application n°4 : Differential inputs BTL power amplifier. In this configuration, we need to place these components : R1, R4, R5, R6, R7, C4, C5, C12. We have also : R4 = R5, R1 = R6, C4 = C5. The gain of the amplifier is: R1 G V D I FF = 2 ------R4 For Vcc=5V, a 20Hz to 20kHz bandwidth and 20dB gain BTL power amplifier you could follow the bill of material below. Components : Part Type 33k / 0.125W Short Circuit 22k / 0.125W Short Cicuit 330k / 0.125W (Vcc-Vf_led)/If_led 470pF 150nF 100µF 100nF Short Circuit Short Circuit 1µF 2mm insulated Plug 10.16mm pitch 3 pts connector 2.54mm pitch PCB Phono Jack Led 3mm TS4871ID or TS4871IS S8 P1, P2 U1 R1 R4 R5 R6 R7 R8* C4 C5 C6 C7 C9 C10 C12 D1* Designator Part Type 110k / 0.125W 22k / 0.125W 22k / 0.125W 110k / 0.125W 330k / 0.125W (Vcc-Vf_led)/If_led 470nF 470nF 100µF 100nF Short Circuit Short Circuit 1µF Led 3mm Designator C9 C10 C12 S1, S2, S6, S7 S8 P1 D1* U1 Part Type Short Circuit Short Circuit 1µF 2mm insulated Plug 10.16mm pitch 3 pts connector 2.54mm pitch PCB Phono Jack Led 3mm TS4871ID or TS4871IS Application n°3 : 50Hz to 10kHz bandwidth and 10dB gain BTL power amplifier. Components : Designator R1 R2 R4 R6 R7 R8* C2 C5 C6 C7 C9 C10 C12 S1, S2, S6, S7 S8 P1 D1* U1 S1, S2, S6, S7 2mm insulated Plug 10.16mm pitch 3 pts connector 2.54mm pitch PCB Phono Jack TS4871ID or TS4871IS 24/28 TS4871 s Note on how to use the PSRR curves (page 7) We have finished a design and we have chosen the components values : Vripple Fig. 86 : PSRR measurement schematic Rfeed 6 • Rin=Rfeed=22kΩ • Cin=100nF • Cb=1µF Now, on fig. 13, we can see the PSRR (input grounded) vs frequency curves. At 217Hz we have a PSRR value of -36dB. In reality we want a value about -70dB. So, we need a gain of 34dB ! Now, on fig. 12 we can see the effect of Cb on the PSRR (input grounded) vs. frequency. With Cb=100µF, we can reach the -70dB value. The process to obtain the final curve (Cb=100µF, Cin=100nF, Rin=Rfeed=22kΩ) is a simple transfer point by point on each frequency of the curve on fig. 13 to the curve on fig. 12. The measurement result is shown on the next figure. Fig. 85 : PSRR changes with Cb Vcc 4 Rin Cin 3 VinVin+ + Vcc Vout1 5 Vs- RL Av=-1 + Vout2 8 Vs+ 2 Rg 100 Ohms 1 Bypass Standby Bias GND Cb TS4871 7 s Principle of operation • We fixed the DC voltage supply (Vcc), the AC sinusoidal ripple voltage (Vripple) and no supply capacitor Cs is used The PSRR value for each frequency is: PSRR ( d B ) = 20 x Log 10 R ms ( V r i p pl e ) -------------------------------------------Rms ( Vs + - Vs - ) -30 Cin=100nF Cb=1µF -40 PSRR (dB) Vcc = 5, 3.3 & 2.6V Rfeed = 22k, Rin = 22k Rg = 100Ω, RL = 8Ω Tamb = 25°C -50 Cin=100nF Cb=100µF Remark : The measure of the Rms voltage is not a Rms selective measure but a full range (2 Hz to 125 kHz) Rms measure. It means that we measure the effective Rms signal + the noise. -60 sHigh/low cut-off frequencies 1000 10000 100000 -70 10 100 For their calculation, please check this "Frequency Response Gain vs Cin, & Cfeed" graph: 10 Frequency (Hz) W hat is the PSRR ? The PSRR is the Power Supply Rejection Ratio. It's a kind of SVR in a determined frequency range. The PSRR of a device, is the ratio between a power supply disturbance and the result on the output. We can say that the PSRR is the ability of a device to minimize the impact of power supply disturbances to the output. How do we measure the PSRR ? Gain (dB) 5 0 -5 -10 -15 -20 -25 10 Cin = 470nF Cin = 22nF Cin = 82nF Rin = Rfeed = 22kΩ Tamb = 25°C 10000 Cfeed = 330pF Cfeed = 680pF Cfeed = 2.2nF 100 1000 Frequency (Hz) 25/28 TS4871 PACKAGE MECHANICAL DATA SO-8 MECHANICAL DATA DIM. A A1 A2 B C D E e H h L k ddd 0.1 5.80 0.25 0.40 mm. MIN. 1.35 0.10 1.10 0.33 0.19 4.80 3.80 1.27 6.20 0.50 1.27 8˚ (max.) 0.04 0.228 0.010 0.016 TYP MAX. 1.75 0.25 1.65 0.51 0.25 5.00 4.00 MIN. 0.053 0.04 0.043 0.013 0.007 0.189 0.150 0.050 0.244 0.020 0.050 inch TYP. MAX. 0.069 0.010 0.065 0.020 0.010 0.197 0.157 0016023/C 26/28 TS4871 PACKAGE MECHANICAL DATA 27/28 TS4871 PACKAGE MECHANICAL DATA Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States © http://www.st.com 28/28