IRF840S

IRF840S, SiHF840S Vishay Siliconix Power MOSFET PRODUCT SUMMARY VDS (V) RDS(on) (Ω) Qg (Max.) (nC) Qgs (nC) Qgd (nC) Configuration VGS = 10 V 63 9.3 32 Single D FEATURES 500 0.85 • • • • • • • • Surface Mount Available in Tape and Reel Dynamic dV/dt Rating Repetitive Avalanche Rated Fast Switching Ease of Paralleling Simple Drive Requirement Lead (Pb)-free Available Available RoHS* COMPLIANT D2PAK (TO-263) DESCRIPTION Third generation Power MOSFETs from Vishay provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SMD-220 is a surface mount power package capable of accommodating die size up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The SMD-220 is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0 W in a typical surface mount application. G GD S S N-Channel MOSFET ORDERING INFORMATION Package Lead (Pb)-free SnPb Note a. See device orientation. D2PAK (TO-263) IRF840SPbF SiHF840S-E3 IRF840S SiHF840S D2PAK (TO-263) IRF840STRLPbFa SiHF840STL-E3a IRF840STRaL SiHF840STLa D2PAK (TO-263) IRF840STRRPbFa SiHF840STR-E3a IRF840STRa SiHF840STRa ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted PARAMETER Drain-Source Voltage Gate-Source Voltage Continuous Drain Current VGS at 10 V TC = 25 °C TC = 100 °C SYMBOL VDS VGS ID LIMIT 500 ± 20 8.0 5.1 32 1.0 0.025 510 8.0 13 125 3.1 3.5 - 55 to + 150 300d UNIT V A IDM Pulsed Drain Currenta Linear Derating Factor Linear Derating Factor (PCB Mount)e EAS Single Pulse Avalanche Energyb IAR Avalanche Currenta EAR Repetiitive Avalanche Energya Maximum Power Dissipation TC = 25 °C PD Maximum Power Dissipation (PCB Mount)e TA = 25 °C c Peak Diode Recovery dV/dt dV/dt Operating Junction and Storage Temperature Range TJ, Tstg Soldering Recommendations (Peak Temperature) for 10 s Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. VDD = 50 V, starting TJ = 25 °C, L = 14 mH, RG = 25 Ω, IAS = 8.0 A (see fig. 12). c. ISD ≤ 8.0 A, dI/dt ≤ 100 A/µs, VDD ≤ VDS, TJ ≤ 150 °C. d. 1.6 mm from case. e. When mounted on 1" square PCB (FR-4 or G-10 material). * Pb containing terminations are not RoHS compliant, exemptions may apply Document Number: 91071 S-81432-Rev. A, 07-Jul-08 W/°C mJ A mJ W V/ns °C www.vishay.com 1 IRF840S, SiHF840S Vishay Siliconix THERMAL RESISTANCE RATINGS PARAMETER Maximum Junction-to-Ambient Maximum Junction-to-Ambient (PCB Mount)a Maximum Junction-to-Case (Drain) SYMBOL RthJA RthJA RthJC TYP. MAX. 62 40 1.0 °C/W UNIT Note a. When mounted on 1" square PCB (FR-4 or G-10 material). SPECIFICATIONS TJ = 25 °C, unless otherwise noted PARAMETER Static Drain-Source Breakdown Voltage VDS Temperature Coefficient Gate-Source Threshold Voltage Gate-Source Leakage Zero Gate Voltage Drain Current Drain-Source On-State Resistance Forward Transconductance Dynamic Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Drain-Source Body Diode Characteristics Continuous Source-Drain Diode Current Pulsed Diode Forward Currenta Body Diode Voltage Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge Forward Turn-On Time IS ISM VSD trr Qrr ton MOSFET symbol showing the integral reverse p - n junction diode D SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT VDS ΔVDS/TJ VGS(th) IGSS IDSS RDS(on) gfs Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf LD LS VGS = 0 V, ID = 250 µA Reference to 25 °C, ID = 1 mA VDS = VGS, ID = 250 µA VGS = ± 20 V VDS = 500 V, VGS = 0 V VDS = 400 V, VGS = 0 V, TJ = 125 °C VGS = 10 V ID = 4.8 Ab Ab VDS = 50 V, ID = 4.8 500 2.0 4.9 0.78 - 4.0 ± 100 25 250 0.85 - V V/°C V nA µA Ω S VGS = 0 V, VDS = 25 V, f = 1.0 MHz, see fig. 5 - 1300 310 120 14 23 49 20 4.5 7.5 63 9.3 32 nH ns nC pF VGS = 10 V ID = 8.0 A, VDS = 400 V, see fig. 6 and 13b - VDD = 250 V, ID = 8.0 A, RG = 9.1 Ω, RD = 31 Ω, see fig. 10b - Between lead, 6 mm (0.25") from package and center of die contact D - G S - 460 4.2 8.0 A 32 2.0 970 8.9 V ns µC G S TJ = 25 °C, IS = 8.0 A, VGS = 0 Vb TJ = 25 °C, IF = 8.0 A, dI/dt = 100 A/µsb Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD) Notes a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11). b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %. www.vishay.com 2 Document Number: 91071 S-81432-Rev. A, 07-Jul-08 IRF840S, SiHF840S Vishay Siliconix TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted Fig. 1 - Typical Output Characteristics, TC = 25 °C Fig. 3 - Typical Transfer Characteristics Fig. 2 - Typical Output Characteristics, TC = 150 °C Fig. 4 - Normalized On-Resistance vs. Temperature Document Number: 91071 S-81432-Rev. A, 07-Jul-08 www.vishay.com 3 IRF840S, SiHF840S Vishay Siliconix Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage Fig. 7 - Typical Source-Drain Diode Forward Voltage Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage Fig. 8 - Maximum Safe Operating Area www.vishay.com 4 Document Number: 91071 S-81432-Rev. A, 07-Jul-08 IRF840S, SiHF840S Vishay Siliconix RD VDS VGS RG D.U.T. + - VDD 10 V Pulse width ≤ 1 µs Duty factor ≤ 0.1 % Fig. 10a - Switching Time Test Circuit VDS 90 % 10 % VGS td(on) tr td(off) tf Fig. 9 - Maximum Drain Current vs. Case Temperature Fig. 10b - Switching Time Waveforms Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91071 S-81432-Rev. A, 07-Jul-08 www.vishay.com 5 IRF840S, SiHF840S Vishay Siliconix L Vary tp to obtain required IAS RG VDS tp VDD D.U.T. I AS 10 V tp 0.01 Ω IAS + V DD VDS VDS Fig. 12a - Unclamped Inductive Test Circuit Fig. 12b - Unclamped Inductive Waveforms Fig. 12c - Maximum Avalanche Energy vs. Drain Current Current regulator Same type as D.U.T. 50 kΩ 12 V 0.2 µF 0.3 µF 10 V QGS QG QGD D.U.T. + - VDS VG VGS 3 mA Charge IG ID Current sampling resistors Fig. 13a - Basic Gate Charge Waveform Fig. 13b - Gate Charge Test Circuit www.vishay.com 6 Document Number: 91071 S-81432-Rev. A, 07-Jul-08 IRF840S, SiHF840S Vishay Siliconix Peak Diode Recovery dV/dt Test Circuit D.U.T. + Circuit layout considerations • Low stray inductance • Ground plane • Low leakage inductance current transformer + + - RG • • • • dV/dt controlled by RG Driver same type as D.U.T. ISD controlled by duty factor "D" D.U.T. - device under test + VDD Driver gate drive P.W. Period D= P.W. Period VGS = 10 V* D.U.T. ISD waveform Reverse recovery current Body diode forward current dI/dt D.U.T. VDS waveform Diode recovery dV/dt VDD Re-applied voltage Inductor current Body diode forward drop Ripple ≤ 5 % ISD * VGS = 5 V for logic level devices Fig. 14 - For N-Channel Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see http://www.vishay.com/ppg?91071. Document Number: 91071 S-81432-Rev. A, 07-Jul-08 www.vishay.com 7 Legal Disclaimer Notice Vishay Disclaimer All product specifications and data are subject to change without notice. Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein or in any other disclosure relating to any product. Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any information provided herein to the maximum extent permitted by law. The product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed therein, which apply to these products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by any conduct of Vishay. The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding products designed for such applications. Product names and markings noted herein may be trademarks of their respective owners. Document Number: 91000 Revision: 18-Jul-08 www.vishay.com 1