74LV07ATPWJ

74LV07AT Hex buffer with open-drain outputs Rev. 1 — 19 December 2016 Product data sheet 1. General description The 74LV07AT is a hex buffer with open-drain outputs. The outputs are open-drain and can be connected to other open-drain outputs to implement active-LOW wired-OR or active-HIGH wired-AND functions. Designed to operate over a VCC range from 4.5 V to 5.5 V, the inputs are TTL compatible, which allows the device to be used to translate from 3.3 V to 5 V. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device is fully specified for partial Power-down applications using IOFF. The IOFF circuitry disables the output, preventing the damaging backflow current through the device when it is powered down. 2. Features and benefits         Direct interface with TTL levels Supply voltage range from 4.5 V to 5.5 V Typical tPZL of 3.5 ns at 5 V Typical VOL(p) < 0.8 V at VCC = 5 V, Tamb = 25 C Supports mixed-mode voltage operation on all ports IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 250 mA per JESD 78 Class II ESD protection:  HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 3 kV  MM JESD22-A115-A exceeds 150 V  CDM JESD22-C101E exceeds 2 kV  Specified from 40 C to +85 C and from 40 C to +125 C 74LV07AT Nexperia Hex buffer with open-drain outputs 3. Ordering information Table 1. Ordering information Type number Package 74LV07ATPW Temperature range Name Description Version 40 C to +125 C plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 TSSOP14 4. Functional diagram  $ <   $ <   $ <  $ $ $  $ <  $  $ <  $  $ <  $ Logic symbol                  < < < < < < $ < *1' PQD PQD Fig 1.  Fig 2. PQD IEC logic symbol Fig 3. Logic diagram for one gate 5. Pinning information 5.1 Pinning /9$7 $  <   9&&  $ $   < <   $ $   < <   $ *1'   < DDD Fig 4. Pin configuration TSSOP14 74LV07AT Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 December 2016 © Nexperia B.V. 2017. All rights reserved 2 of 12 74LV07AT Nexperia Hex buffer with open-drain outputs 5.2 Pin description Table 2. Pin description Symbol Pin Description 1A, 2A, 3A, 4A, 5A, 6A 1, 3, 5, 9, 11, 13 data input 1Y, 2Y, 3Y, 4Y, 5Y, 6Y 2, 4, 6, 8, 10, 12 data output GND 7 ground (0 V) VCC 14 supply voltage 6. Functional description Table 3. Function selection [1] Input Output nA nY L L H Z [1] H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit 0.5 +7.0 V input voltage [1] 0.5 +7.0 V VO output voltage output LOW state, power-down or 3-state mode [2] 0.5 +7.0 V IIK input clamping current VI < 0 V 20 - mA IOK output clamping current VO < 0 V 50 - mA IO output current VO = 0 V to VCC - 35 mA ICC supply current - 70 mA IGND ground current 70 - mA Tstg storage temperature 65 +150 C - 500 mW VI total power dissipation Ptot Tamb = 40 C to +125 C [3] [1] The minimum input voltage ratings may be exceeded if the input current ratings are observed. [2] The output voltage ratings may be exceeded if the output current ratings are observed. [3] For TSSOP14 packages: above 75 C the value of Ptot derates linearly at 7 mW/K. 74LV07AT Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 December 2016 © Nexperia B.V. 2017. All rights reserved 3 of 12 74LV07AT Nexperia Hex buffer with open-drain outputs 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VCC supply voltage VI input voltage VO output voltage Tamb ambient temperature t/V input transition rise and fall rate output LOW state, power-down or 3-state mode VCC = 5.0 V  0.5 V Min Typ Max Unit 4.5 5.0 5.5 V 0 - 5.5 V 0 - 5.5 V 40 +25 +125 C - - 20 ns/V 9. Static characteristics Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2 - - 2 - 2 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V VOL LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 A - 0 0.1 - 0.1 - 0.1 V - - 0.44 - 0.55 - 0.55 V IO = 16mA IOZ OFF-state VCC = 5.5 V; VI = VIH or VIL; output current VO = GND to 5.5 V - - 0.25 - 2.5 - 2.5 A IOFF power-off leakage current VI or VO = GND to 5.5 V; VCC = 0 V - - 0.5 - 5 - 5 A II input leakage current VI = VCC or GND; VCC = 0 V to 5.5 V - - 0.1 - 1 - 1 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 2 - 20 - 20 A ICC additional per input pin; VI = 3.4 V; supply current IO = 0 A; other pins at VCC or GND; VCC = 5.5 V - - 1.35 - 1.5 - 1.5 mA 74LV07AT Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 December 2016 © Nexperia B.V. 2017. All rights reserved 4 of 12 74LV07AT Nexperia Hex buffer with open-drain outputs 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V. For test circuit see Figure 6. Symbol Parameter 25 C Conditions Min Max Min Max Min Max - 3.5 5.3 1 6.6 1 7.7 ns - 5.2 7.7 1 9.5 1 11 ns CL = 15 pF - 3.2 4.3 1 5.1 1 5.7 ns CL = 50 pF - 5.4 7 1 8 1 8.9 ns OFF-state to nA to nY; see Figure 5 LOW VCC = 4.5 V to 5.5 V propagation CL = 15 pF delay CL = 50 pF tPZL LOW to OFF-state propagation delay tPLZ 40 C to +85 C 40 C to +125 C Unit Typ[1] nA to nY; see Figure 5 VCC = 4.5 V to 5.5 V CI input capacitance VI = VCC or GND; VCC = 5 V - 2 6 - 6 - 6 pF CO output capacitance VO = VCC or GND; VCC = 5 V - 5 - - - - - pF CPD power dissipation capacitance per buffer; CL = 50 pF; f = 10 MHz; VI = GND to VCC - 3 - - - - - pF [2] [1] Typical values are measured at Tamb = 25 C and VCC = 5 V. [2] CPD is used to determine the dynamic power dissipation PD (W). PD = CPD  VCC2  fi +  (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts. 74LV07AT Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 19 December 2016 © Nexperia B.V. 2017. All rights reserved 5 of 12 74LV07AT Nexperia Hex buffer with open-drain outputs Table 8. Noise characteristics GND = 0 V. For test circuit see Figure 6. Symbol Parameter Tamb = 25 C Conditions Unit Min Typ Max VCC = 5 V; CL = 50 pF VOL(p) LOW-level output voltage (peak) - 0.6 - V VOL(v) LOW-level output voltage (valley) - 0.4 - V VIH(AC) AC HIGH-level input voltage (dynamic) 2 - - V VIL(AC) AC LOW-level input voltage (dynamic) - - 0.8 V 11. Waveforms 9, 90 Q$LQSXW 90 *1' W 3=/ W 3/= 9&& Q