APT13F120S

APT13F120B APT13F120S 1200V, 14A, 1.2Ω Max trr, ≤250ns N-Channel FREDFET Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. This 'FREDFET' version has a drain-source (body) diode that has been optimized for high reliability in ZVS phase shifted bridge and other circuits through reduced trr, soft recovery, and high recovery dv/dt capability. Low gate charge, high gain, and a greatly reduced ratio of Crss/Ciss result in excellent noise immunity and low switching loss. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control di/dt during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. TO -24 7 D 3 PAK APT13F120B APT13F120S D Single die FREDFET G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI • ZVS phase shifted and other full bridge • Low trr for high reliability • Half bridge • Ultra low Crss for improved noise immunity • PFC and other boost converter • Low gate charge • Buck converter • Avalanche energy rated • Single and two switch forward • RoHS compliant • Flyback Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 14 Continuous Drain Current @ TC = 100°C 9 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 1070 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 7 A 1 50 Thermal and Mechanical Characteristics Min Characteristic Typ Max Unit W PD Total Power Dissipation @ TC = 25°C 625 RθJC Junction to Case Thermal Resistance 0.20 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface TJ,TSTG Operating and Storage Junction Temperature Range TL Soldering Temperature for 10 Seconds (1.6mm from case) WT Package Weight Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw Microsemi Website - http://www.microsemi.com 0.11 -55 150 300 °C/W °C 0.22 oz 6.2 g 10 in·lbf 1.1 N·m 050-8131 Rev D 8-2011 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter Test Conditions Min VBR(DSS) Drain-Source Breakdown Voltage VGS = 0V, ID = 250μA 1200 ∆VBR(DSS)/∆TJ Breakdown Voltage Temperature Coefficient RDS(on) Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance 4 Co(er) 5 Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time td(off) tf Typ Max 1.41 .91 4 -10 1.2 5 TJ = 25°C VGS = 0V 250 1000 ±100 TJ = 125°C VGS = ±30V Unit V V/°C Ω V mV/°C μA nA TJ = 25°C unless otherwise specified Test Conditions Current Rise Time Turn-Off Delay Time Min Typ Max 15 VDS = 50V, ID = 7A Unit S 4765 VGS = 0V, VDS = 25V f = 1MHz 55 350 Effective Output Capacitance, Energy Related Total Gate Charge tr VDS = 1200V Effective Output Capacitance, Charge Related Qg 2.5 VGS = VDS, ID = 1mA Parameter gfs Co(cr) VGS = 10V, ID = 7A Threshold Voltage Temperature Coefficient IDSS Symbol Reference to 25°C, ID = 250μA 3 APT13F120B_S pF 135 VGS = 0V, VDS = 0V to 800V 70 145 VGS = 0 to 10V, ID = 7A, 24 VDS = 600V nC 70 26 Resistive Switching 15 VDD = 800V, ID = 7A RG = 4.7Ω 6 ns 85 , VGG = 15V 24 Current Fall Time Source-Drain Diode Characteristics Symbol IS ISM VSD Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge Irrm Reverse Recovery Current dv/dt Peak Recovery dv/dt Test Conditions Min Typ D MOSFET symbol showing the integral reverse p-n junction diode (body diode) A 50 S 1.0 250 520 TJ = 25°C TJ = 125°C TJ = 25°C diSD/dt = 100A/μs TJ = 125°C VDD = 100V TJ = 25°C Unit 14 G ISD = 7A, TJ = 25°C, VGS = 0V ISD = 7A 3 Max TJ = 125°C ISD ≤ 7A, di/dt ≤1000A/μs, VDD = 800V, TJ = 125°C 1.12 3.03 10 13.5 V ns μC A 25 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 050-8131 Rev D 8-2011 2 Starting at TJ = 25°C, L = 43.59mH, RG = 25Ω, IAS = 7A. 3 Pulse test: Pulse Width < 380μs, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -2.17E-7/VDS^2 + 2.63E-8/VDS + 3.74E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. APT13F120B_S 35 V GS 12 = 10V T = 125°C J 10 TJ = -55°C ID, DRIAN CURRENT (A) 25 20 15 TJ = 25°C 10 5 0 V 6 5V 4 4.5V 2 TJ = 125°C TJ = 150°C 0 0 5 10 15 20 25 30 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 0 NORMALIZED TO VDS> ID(ON) x RDS(ON) MAX. 250μSEC. PULSE TEST @