APT38M50J

APT38M50J 500V, 38A, 0.10Ω Max N-Channel MOSFET S S Power MOS 8™ is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. D G SO 2 T- 27 "UL Recognized" file # E145592 ISOTOP ® D APT38M50J Single die MOSFET G S TYPICAL APPLICATIONS FEATURES • Fast switching with low EMI/RFI • PFC and other boost converter • Low RDS(on) • Buck converter • Ultra low Crss for improved noise immunity • Two switch forward (asymmetrical bridge) • Low gate charge • Single switch forward • Avalanche energy rated • Flyback • RoHS compliant • Inverters Absolute Maximum Ratings Symbol ID Parameter Unit Ratings Continuous Drain Current @ TC = 25°C 38 Continuous Drain Current @ TC = 100°C 24 A IDM Pulsed Drain Current VGS Gate-Source Voltage ±30 V EAS Single Pulse Avalanche Energy 2 1200 mJ IAR Avalanche Current, Repetitive or Non-Repetitive 28 A 1 175 Thermal and Mechanical Characteristics Typ Max Unit W PD Total Power Dissipation @ TC = 25°C 357 RθJC Junction to Case Thermal Resistance 0.35 RθCS Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range VIsolation RMS Voltage (50-60hHz Sinusoidal Waveform from Terminals to Mounting Base for 1 Min.) WT Torque Package Weight Terminals and Mounting Screws. Microsemi Website - http://www.microsemi.com Downloaded from Elcodis.com electronic components distributor -55 150 °C/W °C V 2500 1.03 oz 29.2 g 10 in·lbf 1.1 N·m 2-2007 TJ,TSTG 0.15 Rev A Min Characteristic 050-8075 Symbol Static Characteristics TJ = 25°C unless otherwise specified Symbol Parameter Test Conditions Min VBR(DSS) Drain-Source Breakdown Voltage VGS = 0V, ID = 250µA 500 ∆VBR(DSS)/∆TJ Breakdown Voltage Temperature Coefficient RDS(on) Drain-Source On Resistance VGS(th) Gate-Source Threshold Voltage ∆VGS(th)/∆TJ Zero Gate Voltage Drain Current IGSS Gate-Source Leakage Current Dynamic Characteristics Symbol Forward Transconductance Ciss Input Capacitance Crss Reverse Transfer Capacitance Coss Output Capacitance TJ = 125°C 0.60 0.085 4 -10 0.10 5 100 500 ±100 Min f = 1MHz Co(er) 5 Effective Output Capacitance, Energy Related Typ Max 42 8800 120 945 VGS = 0V, VDS = 25V Effective Output Capacitance, Charge Related Unit V V/°C Ω V mV/°C µA nA Unit S pF 550 VGS = 0V, VDS = 0V to 333V Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge td(on) Turn-On Delay Time tf VGS = 0V Test Conditions VDS = 50V, ID = 28A 4 td(off) TJ = 25°C Max TJ = 25°C unless otherwise specified Co(cr) tr VDS = 500V Typ VGS = ±30V Parameter gfs 3 VGS = VDS, ID = 2.5mA Threshold Voltage Temperature Coefficient IDSS Reference to 25°C, ID = 250µA VGS = 10V, ID = 28A 3 APT38M50J Current Rise Time Turn-Off Delay Time 275 220 50 100 38 45 100 33 VGS = 0 to 10V, ID = 28A, VDS = 250V Resistive Switching VDD = 333V, ID = 28A RG = 4.7Ω 6 , VGG = 15V Current Fall Time nC ns Source-Drain Diode Characteristics Symbol IS ISM Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Diode Forward Voltage ISD = 28A, TJ = 25°C, VGS = 0V trr Reverse Recovery Time ISD = 28A 3 Qrr Reverse Recovery Charge Peak Recovery dv/dt Typ Max Unit 38 A G VSD dv/dt Min D 175 S diSD/dt = 100A/µs, TJ = 25°C ISD ≤ 28A, di/dt ≤1000A/µs, VDD = 333V, TJ = 125°C 1 660 13.2 V ns µC 8 V/ns 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25°C, L = 3.06mH, RG = 4.7Ω, IAS = 28A. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(cr) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -2.04E-7/VDS^2 + 4.76E-8/VDS + 1.36E-10. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. 050-8075 Rev A 2-2007 3 Pulse test: Pulse Width < 380µs, duty cycle < 2%. Downloaded from Elcodis.com electronic components distributor 200 V GS = 10V TJ = -55°C J V 120 TJ = 25°C 80 40 TJ = 150°C TJ = 125°C 6V 70 60 50 40 30 20 5V 10 4.5V 0 25 20 15 10 5 0 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) 0 NORMALIZED TO VGS = 10V @ 28A 2.0 1.0 0.5 250µSEC. PULSE TEST @ ID(ON) x RDS(ON) MAX. 150 ID, DRAIN CURRENT (A) RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE 175 1.5 30 25 20 15 10 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics Figure 1, Output Characteristics 2.5 = 7,8 & 10V GS 80 ID, DRIAN CURRENT (A) ID, DRAIN CURRENT (A) T = 125°C 90 160 0 APT38M50J 100 APT38M50J 250 250 100 100 I I DM ID, DRAIN CURRENT (A) 10 13µs 100µs 1ms Rds(on) 10ms 1 100ms 0.1 1 10 13µs TJ = 150°C TC = 25°C 1 0.1 10 100 600 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area 100µs 1ms 10ms Rds(on) 100ms Scaling for Different Case & Junction Temperatures: ID = ID(T = 25 C)*(TJ - TC)/125 DC line ° DC line TJ = 125°C TC = 75°C C 10 100 600 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area TJ (°C) 1 TC (°C) 0.105 0.244 ZEXT ID, DRAIN CURRENT (A) DM Dissipated Power (Watts) 0.0185 0.360 ZEXT are the external thermal impedances: Case to sink, sink to ambient, etc. Set to zero when modeling only the case to junction. Figure 11, Transient Thermal Impedance Model 0.35 D = 0.9 0.30 0.7 0.25 0.20 0.5 Note: 0.15 0.3 0.10 t1 t2 t1 = Pulse Duration 0.05 0 PDM ZθJC, THERMAL IMPEDANCE (°C/W) 0.40 t 0.1 0.05 10-5 Duty Factor D = 1/t2 Peak TJ = PDM x ZθJC + TC SINGLE PULSE 10-4 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 12. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration 1.0 SOT-227 (ISOTOP®) Package Outline 11.8 (.463) 12.2 (.480) 31.5 (1.240) 31.7 (1.248) 7.8 (.307) 8.2 (.322) r = 4.0 (.157) (2 places) W=4.1 (.161) W=4.3 (.169) H=4.8 (.187) H=4.9 (.193) (4 places) 25.2 (0.992) 0.75 (.030) 12.6 (.496) 25.4 (1.000) 0.85 (.033) 12.8 (.504) 4.0 (.157) 4.2 (.165) (2 places) 2-2007 14.9 (.587) 15.1 (.594) Rev A 3.3 (.129) 3.6 (.143) 38.0 (1.496) 38.2 (1.504) 050-8075 8.9 (.350) 9.6 (.378) Hex Nut M4 (4 places) 1.95 (.077) 2.14 (.084) * Source 30.1 (1.185) 30.3 (1.193) Drain * Emitter terminals are shorted internally. Current handling capability is equal for either Source terminal. * Source Gate Dimensions in Millimeters and (Inches) ISOTOP® is a registered trademark of ST Microelectronics NV. Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved. Downloaded from Elcodis.com electronic components distributor