Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
4 MHz, 7 nV/√Hz, Low Offset and Drift, High Precision Amplifiers
FEATURES
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PIN CONNECTION DIAGRAMS
Offset voltage:
► 25 µV maximum at 25°C (B grade, 8-lead SOIC, single/ dual)
► 50 µV maximum at 25°C (A grade, 8-lead SOIC, single/ dual)
► 50 µV maximum at 25°C (A grade, 14-lead SOIC, quad)
Offset voltage drift:
► 0.25 µV/°C maximum (B grade, 8-lead SOIC, single/dual)
► 0.55 µV/°C maximum (A grade, 8-lead SOIC, single/dual)
► 0.75 µV/°C maximum (A grade, 14-lead SOIC, quad)
MSL1 rated
Low input bias current: 1 nA maximum at TA = 25°C
Low voltage noise density: 6.9 nV/√Hz typical at f = 1000 Hz
CMRR, PSRR, and AV > 120 dB minimum
Low supply current: 400 µA per amplifier typical
Wide gain bandwidth product: 3.9 MHz at ±5 V
Dual-supply operation:
► Specified at ±5 V to ±15 V
► Operates at ±2.5 V to ±15 V
Unity gain stable
No phase reversal
Long-term offset voltage drift (10,000 hours): 0.5 µV typical
Temperature hysteresis: 1 µV typical
Figure 1. ADA4077-1, 8-Lead SOIC and 8-Lead MSOP
Figure 2. ADA4077-2, 8-Lead MSOP and 8-Lead SOIC
APPLICATIONS
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Process control front-end amplifiers
Optical network control circuits
Instrumentation
Precision sensors and controls
Precision filters
Figure 3. ADA4077-4, 14-Lead TSSOP and 14-Lead SOIC
GENERAL DESCRIPTION
The single ADA4077-1, dual ADA4077-2, and quad ADA4077-4
amplifiers feature extremely low offset voltage and drift, and low
input bias current, noise, and power consumption. Outputs are
stable with capacitive loads of more than 1000 pF with no external
compensation.
Applications for this amplifier include sensor signal conditioning
(such as thermocouples, resistance temperature detectors (RTDs),
strain gages), process control front-end amplifiers, and precision
diode power measurement in optical and wireless transmission
systems. The ADA4077-1/ADA4077-2/ADA4077-4 are useful in line
powered and portable instrumentation, precision filters, and voltage
or current measurement and level setting.
Unlike other amplifiers, the ADA4077-1/ADA4077-2/ADA4077-4
have an MSL1 rating that is compliant with the most stringent
of assembly processes, and they are specified over the extended
industrial temperature range from −40°C to +125°C for the most
demanding operating environments.
Table 1. Evolution of Precision Devices by Generation
Op Amp First
Second
Third
Fourth
Fifth
Sixth
Single
Dual
Quad
OP77
OP177
OP1177
OP2177
OP4177
AD8677
ADA4077-1
ADA4077-2
ADA4077-4
OP07
Rev. F
DOCUMENT FEEDBACK
TECHNICAL SUPPORT
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Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to
change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
TABLE OF CONTENTS
Features................................................................ 1
Applications........................................................... 1
Pin Connection Diagrams......................................1
General Description...............................................1
Specifications........................................................ 3
Electrical Characteristics, ±5 V...........................3
Electrical Characteristics, ±15 V.........................4
Absolute Maximum Ratings...................................6
Thermal Resistance........................................... 6
ESD Caution.......................................................6
Pin Configurations and Function Descriptions.......7
Typical Performance Characteristics................... 10
Test Circuit...........................................................20
Theory of Operation.............................................21
Applications Information...................................... 22
Output Phase Reversal.................................... 22
Low Power Linearized RTD..............................22
Proper Board Layout........................................ 22
Long-Term Drift.................................................22
Temperature Hysteresis................................... 23
Outline Dimensions............................................. 24
Ordering Guide.................................................25
REVISION HISTORY
8/2022—Rev. E to Rev. F
Changes to General Description Section.........................................................................................................1
Deleted Figure 4, Renumbered Sequentially................................................................................................... 1
Changes to Output Voltage High Parameter and Output Voltage Low Parameter, Table 2............................. 3
Changes to Output Voltage High Parameter and Output Voltage Low Parameter, Table 3............................. 4
Changes to Typical Performance Characteristics Section............................................................................. 10
analog.com
Rev. F | 2 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS, ±5 V
VSY = ±5.0 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
ADA4077-1/ADA4077-2
B Grade, SOIC
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
10
25
65
50
105
90
220
µV
µV
µV
µV
µV
µV
50
105
120
220
µV
µV
µV
µV
0.1
0.25
0.5
0.25
0.55
1.2
µV/°C
µV/°C
µV/°C
0.4
0.5
−0.4
0.75
1.2
+1
+1.5
+0.5
+1
+3
5
70
µV/°C
µV/°C
nA
nA
nA
nA
V
dB
dB
dB
dB
dB
pF
GΩ
±10
22
0.05
V
V
V
V
mA
mA
Ω
VOS
−40°C < TA < +125°C
A Grade, SOIC
15
−40°C < TA < +125°C
A Grade, MSOP
50
−40°C < TA < +125°C
ADA4077-4
A Grade, SOIC
15
−40°C < TA < +125°C
A Grade, TSSOP
Offset Voltage Drift
ADA4077-1/ADA4077-2
B Grade, SOIC
A Grade, SOIC
A Grade, MSOP
ADA4077-4
A Grade, SOIC
A Grade, TSSOP
Input Bias Current
15
∆VOS/∆T
−40°C < TA < +125°C
−40°C < TA < +125°C
IB
−40°C < TA < +125°C
Input Offset Current
IOS
−40°C < TA < +125°C
Input Voltage Range
Common-Mode Rejection Ratio
CMRR
Large Signal Voltage Gain
Av
Input Capacitance
Input Resistance
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Output Current
Short-Circuit Current
Closed-Loop Output Impedance
POWER SUPPLY
Power Supply Rejection Ratio
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CINCM
RIN
VOH
VOL
IOUT
ISC
ZOUT
PSRR
VCM = −3.8 V to +3 V
VCM = −3.8 V to +3 V, −40°C < TA < +85°C
VCM = −3.8 V to +2.8 V, 85°C < TA < 125°C
RL = 2 kΩ, VO = −3.0 V to +3.0 V
−40°C < TA < +125°C
Common mode
Common mode
−1
−1.5
−0.5
−1
−3.8
122
120
120
121
120
IL = 1 mA
−40°C < TA < +125°C
IL = 1 mA
−40°C < TA < +125°C
VDROPOUT < 1.6 V
TA = 25°C
f = 1 kHz, AV = +1
3.5
3.2
VS = ±2.5 V to ±18 V
−40°C < TA < +125°C
123
120
+0.1
140
130
−3.5
−3.2
128
dB
dB
Rev. F | 3 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
SPECIFICATIONS
Table 2.
Parameter
Supply Current per Amplifier
DYNAMIC PERFORMANCE
Slew Rate
Settling Time to 0.1%
Gain Bandwidth Product
Unity-Gain Crossover
−3 dB Closed-Loop Bandwidth
Phase Margin
Total Harmonic Distortion Plus Noise
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
MULTIPLE AMPLIFIERS CHANNEL SEPARATION
Symbol
Test Conditions/Comments
Typ
Max
Unit
ISY
VO = 0 V
−40°C < TA < +125°C
400
450
650
µA
µA
SR
tS
GBP
UGC
−3 dB
ΦM
THD + N
RL = 2 kΩ
VIN = 1 V step, RL = 2 kΩ, AV = −1
VIN = 10 mV p-p, RL = 2 kΩ, AV = +100
VIN = 10 mV p-p, RL = 2 kΩ, AV = +1
AV = +1, VIN = 10 mV p-p, RL = 2 kΩ
VIN = 10 mV p-p, RL = 2 kΩ, AV = +1
VIN = 1 V rms, AV = +1, RL = 2 kΩ, f = 1 kHz
1.2
3
3.9
3.9
5.9
55
0.004
V/µs
µs
MHz
MHz
MHz
Degrees
%
en p-p
en
0.1 Hz to 10 Hz
f = 1 Hz
f = 100 Hz
f = 1000 Hz
f = 1 kHz
f = 1 kHz, RL = 10 kΩ
0.25
13
7
6.9
0.2
−125
µV p-p
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
dB
in
CS
Min
ELECTRICAL CHARACTERISTICS, ±15 V
VSY = ±15 V, VCM = 0 V, TA = 25°C, unless otherwise noted.
Table 3.
Parameter
INPUT CHARACTERISTICS
Offset Voltage
ADA4077-1/ADA4077-2
B Grade, SOIC
Symbol
Test Conditions/Comments
Min
Typ
Max
Unit
10
35
65
50
105
90
220
µV
µV
µV
µV
µV
µV
50
105
120
220
µV
µV
µV
µV
VOS
−40°C < TA < +125°C
A Grade, SOIC
15
−40°C < TA < +125°C
A Grade, MSOP
50
−40°C < TA < +125°C
ADA4077-4
A Grade, SOIC
15
−40°C < TA < +125°C
A Grade, TSSOP
15
−40°C < TA < +125°C
Offset Voltage Drift
ADA4077-1/ADA4077-2
B Grade, SOIC
A Grade, SOIC
A Grade, MSOP
ADA4077-4
A Grade, SOIC
A Grade, TSSOP
Input Bias Current
∆VOS/∆T
−40°C < TA < +125°C
−40°C < TA < +125°C
−40°C < TA < +125°C
0.1
0.25
0.5
0.25
0.55
1.2
µV/°C
µV/°C
µV/°C
−40°C < TA < +125°C
−40°C < TA < +125°C
0.4
0.5
−0.4
0.75
1.2
+1
+1.5
+0.5
µV/°C
µV/°C
nA
nA
nA
IB
−40°C < TA < +125°C
Input Offset Current
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IOS
−1
−1.5
−0.5
+0.1
Rev. F | 4 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
SPECIFICATIONS
Table 3.
Parameter
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
ADA4077-1/ADA4077-2 (SOIC, MSOP)
Symbol
CMRR
Input Resistance
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Output Current
Short-Circuit Current
Closed-Loop Output Impedance
POWER SUPPLY
Power Supply Rejection Ratio
Supply Current per Amplifier
Min
−40°C < TA < +125°C
−1
−13.8
132
130
VCM = −13.8 V to +13 V
−40°C < TA < +125°C
Typ
Max
Unit
+1
+13
nA
V
dB
dB
150
Av
ADA4077-4 (SOIC, TSSOP)
Input Capacitance
Test Conditions/Comments
CINDM
CINCM
RIN
VOH
VOL
IOUT
ISC
ZOUT
PSRR
ISY
RL = 2 kΩ, VO = −13.0 V to +13.0 V
−40°C < TA < +125°C
RL = 2 kΩ, VO = −13.0 V to +13.0 V
−40°C < TA < +125°C
Differential mode
Common mode
Common mode
125
120
122
120
IL = 1 mA
−40°C < TA < +125°C
IL = 1 mA
−40°C < TA < +125°C
VDROPOUT < 1.2 V
TA = 25°C
f = 1 kHz, AV = +1
13.5
13.2
VS = ±2.5 V to ±18 V
−40°C < TA < +125°C
VO = 0 V
−40°C < TA < +125°C
123
120
130
3
5
70
dB
dB
dB
dB
pF
pF
GΩ
±10
22
0.05
V
V
V
V
mA
mA
Ω
130
−13.5
−13.2
128
400
500
650
dB
dB
µA
µA
DYNAMIC PERFORMANCE
Slew Rate
Settling Time to 0.01%
Settling Time to 0.1%
Gain Bandwidth Product
Unity-Gain Crossover
−3 dB Closed-Loop Bandwidth
Phase Margin
Total Harmonic Distortion Plus Noise
SR
ts
ts
GBP
UGC
−3 dB
ΦM
THD + N
RL = 2 kΩ
VIN = 10 V p-p, RL = 2 kΩ, AV = −1
VIN = 10 V p-p, RL = 2 kΩ, AV = −1
VIN = 10 mV p-p, RL = 2 kΩ, AV = +100
VIN = 10 mV p-p, RL = 2 kΩ, AV = +1
AV = +1, VIN = 10 mV p-p, RL = 2 kΩ
VIN = 10 mV p-p, RL = 2 kΩ, AV = +1
VIN = 1 V rms, AV = +1, RL = 2 kΩ,
f = 1 kHz
1.2
16
10
3.6
3.9
5.5
58
0.004
V/µs
µs
µs
MHz
MHz
MHz
Degrees
%
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
en p-p
en
Current Noise Density
MULTIPLE AMPLIFIERS CHANNEL SEPARATION
in
CS
0.1 Hz to 10 Hz
f = 1 Hz
f = 100 Hz
f = 1000 Hz
f = 1 kHz
f = 1 kHz, RL = 10 kΩ
0.25
13
7
6.9
0.2
−125
µV p-p
nV/√Hz
nV/√Hz
nV/√Hz
pA/√Hz
dB
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Rev. F | 5 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 4.
Parameter
Rating
Supply Voltage
Input Voltage
Input Current1
Differential Input Voltage
Output Short-Circuit Duration to GND
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Maximum Reflow Temperature (MSL1 Rating)2
Lead Temperature, Soldering (10 sec)
Electrostatic Discharge (ESD)
Human Body Model (HBM)3
Field Induced Charge Device Model (FICDM)4
36 V
±VSY
±10 mA
±VSY
Indefinite
−65°C to +150°C
−40°C to +125°C
−65°C to +150°C
260°C
300°C
6 kV
1.25 kV
1
The input pins have clamp diodes to the power supply pins and to each other.
Limit the input current to 10 mA or less whenever input signals exceed the
power supply rail by 0.3 V.
2
IPC/JEDEC J-STD-020 applicable standard
3
ESDA/JEDEC JS-001-2011 applicable standard.
4
JESD22-C101 (ESD FICDM standard of JEDEC) applicable standard.
θJA is specified for the worst case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 5. Thermal Resistance
Package Type
θJA
θJC
Unit
8-Lead MSOP
8-Lead SOIC
14-Lead TSSOP
14-Lead SOIC
190
158
240
115
44
43
43
36
°C/W
°C/W
°C/W
°C/W
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although
this product features patented or proprietary protection circuitry,
damage may occur on devices subjected to high energy ESD.
Therefore, proper ESD precautions should be taken to avoid
performance degradation or loss of functionality.
Stresses at or above those listed under Absolute Maximum Ratings
may cause permanent damage to the product. This is a stress
rating only; functional operation of the product at these or any other
conditions above those indicated in the operational section of this
specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.
analog.com
Rev. F | 6 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 4. ADA4077-1 Pin Configuration, 8-Lead MSOP (RM-8)
Figure 5. ADA4077-1 Pin Configuration, 8-Lead SOIC (R-8)
Table 6. ADA4077-1 Pin Function Descriptions, 8-Lead MSOP and 8-Lead SOIC
Pin No.
Mnemonic
Description
1, 5, 8
2
3
4
6
7
NIC
−IN
+IN
V−
OUT
V+
Not internally connected.
Inverting Input.
Noninverting Input.
Negative Supply Voltage.
Output.
Positive Supply Voltage.
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Rev. F | 7 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 6. ADA4077-2 Pin Configuration, 8-Lead MSOP
Figure 7. ADA4077-2 Pin Configuration, 8-Lead SOIC
Table 7. ADA4077-2 Pin Function Descriptions, 8-Lead MSOP and 8-Lead SOIC
Pin No.
Mnemonic
Description
1
2
3
4
5
6
7
8
OUT A
−IN A
+IN A
V−
+IN B
−IN B
OUT B
V+
Output Channel A.
Inverting Input Channel A.
Noninverting Input Channel A.
Negative Supply Voltage.
Noninverting Input Channel B.
Inverting Input Channel B.
Output Channel B.
Positive Supply Voltage.
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Rev. F | 8 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Figure 9. ADA4077-4 Pin Configuration, 14-Lead SOIC
Figure 8. ADA4077-4 Pin Configuration, 14-Lead TSSOP
Table 8. ADA4077-4 Pin Function Descriptions, 14-Lead TSSOP and 14-Lead SOIC
Pin No.
Mnemonic
Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
OUT A
−IN A
+IN A
V+
+IN B
−IN B
OUT B
OUT C
−IN C
+IN C
V−
+IN D
−IN D
OUT D
Output Channel A.
Negative Input Channel A.
Positive Input Channel A.
Positive Supply Voltage.
Positive Input Channel B.
Negative Input Channel B.
Output Channel B.
Output Channel C.
Negative Input Channel C.
Positive Input Channel C.
Negative Supply Voltage.
Positive Input Channel D.
Negative Input Channel D.
Output Channel D.
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Rev. F | 9 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 10. ADA4077-2 Offset Voltage (VOS) Distribution, VSY = ±5 V
Figure 13. ADA4077-2 Offset Voltage (VOS) Distribution, VSY = ±15 V
Figure 11. Offset Voltage (VOS) Distribution, VSY = ±5 V
Figure 14. Offset Voltage (VOS) Distribution, VSY = ±15 V
Figure 12. Offset Voltage (VOS) vs. Temperature, VSY = ±5 V
Figure 15. Offset Voltage (VOS) vs. Temperature, VSY = ±15 V
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Rev. F | 10 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 16. TCVOS Distribution (TSSOP and MSOP, A Grade)
Figure 19. TCVOS Distribution (SOIC, A Grade)
Figure 17. Offset Voltage (VOS) vs. Power Supply Voltage (VSY)
Figure 20. TCVOS Distribution (SOIC, B Grade)
Figure 18. Offset Voltage (VOS) vs. Common-Mode Voltage (VCM), VSY = ±15 V
Figure 21. Supply Current per Amplifier (ISY) vs. Power Supply Voltage (VSY)
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Rev. F | 11 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 22. Output Voltage Swing vs. Temperature, VSY = ±5 V
Figure 25. Output Voltage Swing vs. Temperature, VSY = ±15 V
Figure 23. Input Bias Current Distribution, VSY = ±5 V
Figure 26. Input Bias Current Distribution, VSY = ±15 V
Figure 24. Input Bias Current (IB) vs. Temperature, VSY = ±5 V
Figure 27. Input Bias Current (IB) vs. Temperature, VSY = ±15 V
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Rev. F | 12 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 28. Output Dropout Voltage vs. ILOAD, Sink Current, VSY = ±5 V
Figure 31. Output Dropout Voltage vs. ILOAD, Sink Current, VSY = ±15 V
Figure 29. Output Dropout Voltage vs. ILOAD, Source Current, VSY = ±5 V
Figure 32. Output Dropout Voltage vs. ILOAD, Source Current, VSY = ±15 V
Figure 30. Open-Loop Gain and Phase Margin vs. Frequency, VSY = ±5 V
Figure 33. Open-Loop Gain and Phase Margin vs. Frequency, VSY = ±15 V
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Rev. F | 13 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 34. PSRR vs. Temperature, VSY = ±5 V to ±15 V
Figure 37. CMRR vs. Frequency, VSY = ±5 V and VSY = ±15 V
Figure 35. PSRR vs. Frequency, VSY = ±5 V
Figure 38. PSRR vs. Frequency, VSY = ±15 V
Figure 36. CMRR vs. Temperature, VSY = ±5 V
Figure 39. CMRR vs. Temperature, VSY = ±15 V
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Rev. F | 14 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 40. Closed-Loop Gain vs. Frequency, VSY = ±5 V
Figure 43. Closed-Loop Gain vs. Frequency, VSY = ±15 V
Figure 41. Output Impedance (ZOUT) vs. Frequency, VSY = ±5 V
Figure 44. Output Impedance (ZOUT) vs. Frequency, VSY = ±15 V
Figure 42. Large Signal Transient Response, VSY = ±5 V
Figure 45. Large Signal Transient Response, VSY = ±15 V
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Rev. F | 15 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 46. Small Signal Transient Response, VSY = ±5 V
Figure 47. Positive Overload Recovery, VSY = ±5 V
Figure 48. Negative Overload Recovery, VSY = ±5 V
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Figure 49. Small Signal Transient Response, VSY = ±15 V
Figure 50. Positive Overload Recovery, VSY = ±15 V
Figure 51. Negative Overload Recovery, VSY = ±15 V
Rev. F | 16 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 52. Small Signal Overshoot vs. Load Capacitance, VSY = ±5 V
Figure 55. Small Signal Overshoot vs. Load Capacitance, VSY = ±15 V
Figure 53. Positive 0.1% Settling Time, VSY = ±5 V
Figure 56. Positive 0.1% Settling Time, VSY = ±15 V
Figure 54. Negative 0.1% Settling Time, VSY = ±5 V
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Figure 57. Negative 0.1% Settling Time, VSY = ±15 V
Rev. F | 17 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 58. Voltage Noise Density vs. Frequency, VSY = ±5 V and VSY = ±15 V
Figure 61. Voltage Noise Corner vs. Frequency, VSY = ±15 V and VSY = ±5 V
Figure 59. THD + Noise vs. Frequency, VSY = ±5 V
Figure 62. THD + Noise vs. Frequency, VSY = ±15 V
Figure 60. 0.1 Hz to 10 Hz Noise, VSY = ±5 V
Figure 63. 0.1 Hz to 10 Hz Noise, VSY = ±15 V
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Rev. F | 18 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 64. Input Bias Current (IB) vs. Common-Mode Voltage (VCM)
Figure 67. Current Noise Density, VSY = ±5 V
Figure 65. Channel Separation, VSY = ±15 V (See Figure 69)
Figure 66. Current Noise Density, VSY = ±15 V
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Rev. F | 19 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
TEST CIRCUIT
Figure 68. Test Circuit for Channel Separation vs. Frequency
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Rev. F | 20 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
THEORY OF OPERATION
The ADA4077-1/ADA4077-2/ADA4077-4 are the sixth generation of
the Analog Devices, Inc., industry-standard OP07 amplifier family.
The ADA4077-1/ADA4077-2/ADA4077-4 are high precision, low
noise operational amplifiers with a combination of extremely low offset voltage and very low input bias currents. Unlike JFET amplifiers,
the low bias and offset currents are relatively insensitive to ambient
temperatures, even up to 125°C.
The Analog Devices proprietary process technology and linear
design expertise have produced high voltage amplifiers with superior performance to the OP07/OP77/OP177/OP1177 in tiny, 8-lead
SOIC and 8-lead MSOP packages (ADA4077-1 and ADA4077-2)
and 14-lead TSSOP and 14-lead SOIC packages (ADA4077-4).
Despite their small size, the ADA4077-1/ADA4077-2/ADA4077-4
offer numerous improvements, including low wideband noise, wide
bandwidth, lower offset and offset drift, lower input bias current, and
complete freedom from phase inversion.
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The ADA4077-1/ADA4077-2/ADA4077-4 have an operating temperature range of −40°C to +125°C with an MSL1 rating, which is
as wide as any similar device in a plastic surface-mount package.
This MSL1 rating is increasingly important as printed circuit board
(PCB) and overall system sizes continue to shrink, causing internal
system temperatures to rise.
In the ADA4077-1/ADA4077-2/ADA4077-4, the power consumption
is reduced by a factor of four compared to the OP177, and the
bandwidth and slew rate are both increased by a factor of six. The
low power dissipation and very stable performance vs. temperature
also reduce warmup drift errors to insignificant levels.
Inputs are protected internally from overvoltage conditions referenced to either supply rail. Like any high performance amplifier,
maximum performance is achieved by following appropriate circuit
and PCB guidelines.
Rev. F | 21 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
APPLICATIONS INFORMATION
OUTPUT PHASE REVERSAL
Phase reversal is defined as a change of polarity in the amplifier
transfer function. Many operational amplifiers exhibit phase reversal
when the voltage applied to the input is greater than the maximum
common-mode voltage. In some instances, this phase reversal can
cause permanent damage to the amplifier. In feedback loops, it can
result in system lockups or equipment damage. The ADA4077-1/
ADA4077-2/ADA4077-4 are immune to phase reversal problems
even at input voltages beyond the power supply settings.
Figure 70. Low Power Linearized RTD Circuit
PROPER BOARD LAYOUT
The ADA4077-1/ADA4077-2/ADA4077-4 are high precision devices. To ensure optimum performance at the PCB level, care must
be taken in the design of the board layout.
To avoid leakage currents, maintain a clean and moisture free
board surface. Coating the surface creates a barrier to moisture
accumulation, and reduces parasitic resistance on the board.
Figure 69. No Phase Reversal
LOW POWER LINEARIZED RTD
A common application for a single element varying bridge is an
RTD thermometer amplifier, as shown in Figure 70. The excitation
is delivered to the bridge by a 2.5 V reference applied at the top of
the bridge.
RTDs can have a thermal resistance as high as 0.5°C/mW to
0.8°C/mW. To minimize errors due to resistor drift, keep the current
low through each leg of the bridge. In this circuit, the amplifier
supply current flows through the bridge. However, at a maximum
supply current of 500 µA for the ADA4077-2, the RTD dissipates
less than 0.1 mW of power, even at the highest resistance. Therefore, errors due to power dissipation in the bridge are kept under
0.1°C.
Calibration of the bridge is made at the minimum value of the
temperature to be measured by adjusting RP until the output is
zero.
To calibrate the output span, set the full-scale and linearity potentiometers to midpoint, and apply a 500°C temperature to the sensor,
or substitute the equivalent 500°C RTD resistance.
Adjust the full-scale potentiometer for a 5 V output. Finally, apply
250°C or the equivalent RTD resistance, and adjust the linearity
potentiometer for a 2.5 V output. The circuit achieves higher than
±0.5°C accuracy after adjustment.
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Keeping supply traces short and properly bypassing the power
supplies minimizes the power supply disturbances caused by the
output current variation, such as when driving an ac signal into a
heavy load. Connect bypass capacitors as closely as possible to
the device supply pins. Stray capacitances are a concern at the
outputs and the inputs of the amplifier. It is recommended that the
signal traces be kept at least 5 mm from supply lines to minimize
coupling.
A variation in temperature across the PCB can cause a mismatch
in the Seebeck voltages at solder joints and other points where
dissimilar metals are in contact, resulting in thermal voltage errors.
To minimize these thermocouple effects, orient resistors so that
heat sources warm both ends equally. Ensure, where possible, that
input signal paths contain matching numbers and types of components, to match the number and type of thermocouple junctions.
For example, dummy components such as zero value resistors can
be used to match real resistors in the opposite input path. Place
matching components in close proximity to each other, and orient
them in the same manner. Ensure that leads are of equal length so
that thermal conduction is in equilibrium. Keep heat sources on the
PCB as far away from amplifier input circuitry as is practical.
The use of a ground plane is highly recommended. A ground plane
reduces electromagnetic interference (EMI) noise and maintains a
constant temperature across the circuit board.
LONG-TERM DRIFT
The stability of a precision signal path over its lifetime or between
calibration procedures is dependent on the long-term stability of the
Rev. F | 22 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
APPLICATIONS INFORMATION
analog components in the path, such as op amps, references, and
data converters. To help system designers predict the long-term
drift of circuits that use the ADA4077-1/ADA4077-2/ADA4077-4,
Analog Devices measured the offset voltage of multiple units
for 10,000 hours (more than 13 months) using a high precision
measurement system, including an ultrastable oil bath. To replicate
real-world system performance, the devices under test (DUTs) were
soldered onto an FR4 PCB using a standard reflow profile (as
defined in the JEDEC J-STD-020D standard), as opposed to testing
them in sockets. This manner of testing is important because
expansion and contraction of the PCB can apply stress to the
integrated circuit (IC) package and contribute to shifts in the offset
voltage.
The ADA4077-1/ADA4077-2/ADA4077-4 have extremely low longterm drift (LTD). Figure 71 shows the LTD of the ADA4077-1 (SOIC
package). The red, blue, and green traces show sample units. Note
that the mean drift over 10,000 hours is less than 0.5 µV, or less
than 2% of their maximum specified offset voltage of 25 µV at room
temperature.
Figure 71. Measured Long-Term Drift of the ADA4077-1/ADA4077-2/
ADA4077-4 Offset Voltage over 10,000 Hours
larger when the device is cycled through only a half cycle, from
room temperature to 125°C and back to room temperature.
Figure 72. Change in Offset Voltage over Three Full Temperature Cycles
Figure 73. Histogram Showing the Temperature Hysteresis of the Offset
Voltage over Three Full Cycles and over Three Half Cycles
TEMPERATURE HYSTERESIS
In addition to stability over time as described in the Long-Term Drift
section, it is useful to know the temperature hysteresis, that is,
the stability vs. cycling of temperature. Hysteresis is an important
parameter because it tells the system designer how closely the
signal returns to its starting amplitude after the ambient temperature
changes and subsequent return to room temperature. Figure 72
shows the change in input offset voltage as the temperature cycles
three times from room temperature to 125°C to −40°C and back
to room temperature. The dotted line is an initial preconditioning
cycle to eliminate the original temperature-induced offset shift from
exposure to production solder reflow temperatures. In the three full
cycles, the offset hysteresis is typically only 1 µV, or 1.5% of its
65 µV maximum offset voltage over the full operating temperature
range. The histogram in Figure 73 shows that the hysteresis is
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Rev. F | 23 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
OUTLINE DIMENSIONS
Figure 74. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Figure 75. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
Figure 76. 14-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-14)
Dimensions shown in millimeters
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Rev. F | 24 of 25
Data Sheet
ADA4077-1/ADA4077-2/ADA4077-4
OUTLINE DIMENSIONS
Figure 77. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
Updated: July 18, 2022
ORDERING GUIDE
Model1
Temperature Range
Package Description
ADA4077-1ARMZ
ADA4077-1ARMZ-R7
ADA4077-1ARMZ-RL
ADA4077-1ARZ
ADA4077-1ARZ-R7
ADA4077-1ARZ-RL
ADA4077-1BRZ
ADA4077-1BRZ-R7
ADA4077-1BRZ-RL
ADA4077-2ARMZ
ADA4077-2ARMZ-R7
ADA4077-2ARMZ-RL
ADA4077-2ARZ
ADA4077-2ARZ-R7
ADA4077-2ARZ-RL
ADA4077-2BRZ
ADA4077-2BRZ-R7
ADA4077-2BRZ-RL
ADA4077-4ARUZ
ADA4077-4ARUZ-R7
ADA4077-4ARUZ-RL
ADA4077-4ARZ
ADA4077-4ARZ-R7
ADA4077-4ARZ-RL
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead MSOP
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
14-Lead TSSOP
14-Lead TSSOP
14-Lead TSSOP
14-Lead SOIC
14-Lead SOIC
14-Lead SOIC
1
Packing Quantity
Reel, 1000
Reel, 3000
Reel, 1000
Reel, 2500
Reel, 1000
Reel, 2500
Reel, 1000
Reel, 3000
Reel, 1000
Reel, 2500
Reel, 1000
Reel, 2500
Reel, 1000
Reel, 2500
Reel, 1000
Reel, 2500
Package
Option
RM-8
RM-8
RM-8
R-8
R-8
R-8
R-8
R-8
R-8
RM-8
RM-8
RM-8
R-8
R-8
R-8
R-8
R-8
R-8
RU-14
RU-14
RU-14
R-14
R-14
R-14
Marking Code
A35
A35
A35
A2X
A2X
A2X
Z = RoHS Compliant Part.
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