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ADIS16407PCBZ

ADIS16407PCBZ

  • 厂商:

    AD(亚德诺)

  • 封装:

  • 描述:

    ADIS16407PCBZ - Ten Degrees of Freedom Inertial Sensor Platform stabilization and control - Analog D...

  • 数据手册
  • 价格&库存
ADIS16407PCBZ 数据手册
Ten Degrees of Freedom Inertial Sensor ADIS16407 FEATURES Triaxial digital gyroscope with digital range scaling ±75°/sec, ±150°/sec, ±300°/sec settings Axis-to-axis alignment, –19.675°/sec DIN = 0000 0100 0000 0000 = 0x0400 09797-011 Figure 11. Example SPI Read, Second 16-Bit Sequence The ADIS16407 SPI interface supports full duplex serial communication (simultaneous transmit and receive) and uses the bit sequence shown in Figure 13. Table 7 provides a list of the most common settings that require attention to initialize the serial port of a processor for the ADIS16407 SPI interface. Table 7. Generic Master Processor SPI Settings Processor Setting Master SCLK Rate ≤ 2 MHz1 SPI Mode 3 MSB-First Mode 16-Bit Mode 1 Burst Read Function The burst read function enables the user to read all output registers using one command on the DIN line and shortens the stall time between each 16-bit segment to one SCLK cycle (see Table 2). Figure 12 provides the burst read sequence of data on each SPI signal. The sequence starts with writing 0x3E00 to DIN, followed by each output register clocking out on DOUT, in the order in which they appear in Table 8. CS SCLK DIN DOUT 0x3E00 DON’T CARE SUPPLY_OUT XGYRO_OUT AUX_ADC 09797-012 Description The ADIS16407 operates as a slave Maximum serial clock rate CPOL = 1 (polarity), CPHA = 1 (phase) Bit sequence Shift register/data length 1 2 3 15 For burst read, SCLK rate ≤ 1 MHz. Figure 12. Burst Read Sequence CS SCLK DIN DOUT R/W D15 A6 D14 A5 D13 A4 D12 A3 D11 A2 D10 A1 D9 A0 D8 DC7 D7 DC6 D6 DC5 D5 DC4 D4 DC3 D3 DC2 D2 DC1 D1 DC0 D0 R/W D15 A6 D14 A5 D13 Figure 13. SPI Communication Bit Sequence Rev. A | Page 10 of 24 09797-013 NOTES 1. THE DOUT BIT PATTERN REFLECTS THE ENTIRE CONTENTS OF THE REGISTER IDENTIFIED BY [A6:A0] IN THE PREVIOUS 16-BIT DIN SEQUENCE WHEN R/W = 0. 2. IF R/W = 1 DURING THE PREVIOUS SEQUENCE, DOUT IS NOT DEFINED. 09797-010 14 15 0x0800 ADIS16407 OUTPUT DATA REGISTERS The output registers in Table 8 provide the most recent sensor data produced by the ADIS16407. Each output register has flags for new data indication and error/alarm conditions, which reduces the need to monitor DIAG_STAT. Table 8. Output Data Register Formats Register SUPPLY_OUT XGYRO_OUT YGYRO_OUT ZGYRO_OUT XACCL_OUT YACCL_OUT ZACCL_OUT XMAGN_OUT YMAGN_OUT ZMAGN_OUT BARO_OUT BARO_OUTL TEMP_OUT1 AUX_ADC 1 Table 10. YGYRO_OUT (Base Address = 0x06), Read Only Bits [15] [14] [13:0] Description New data indicator (ND), 1 = new data in register Error/alarm, 1 = active, see DIAG_STAT for error flags Y-axis gyroscope data, twos complement format, 0.05°/sec per LSB, when SENS_AVG[15:8] = 0x04 Address 0x02 0x04 0x06 0x08 0x0A 0x0C 0x0E 0x10 0x12 0x14 0x16 0x18 0x1A 0x1C Measurement Power supply Gyroscope, x-axis Gyroscope, y-axis Gyroscope, z-axis Accelerometer, x-axis Accelerometer, y-axis Accelerometer, z-axis Magnetometer, x-axis Magnetometer, y-axis Magnetometer, z-axis Barometer/pressure, higher Barometer/pressure, lower Internal temperature Auxiliary ADC Z-AXIS Table 11. ZGYRO_OUT (Base Address = 0x08), Read Only Bits [15] [14] [13:0] Description New data indicator (ND), 1 = new data in register Error/alarm, 1 = active, see DIAG_STAT for error flags Z-axis gyroscope data, twos complement format, 0.05°/sec per LSB, when SENS_AVG[15:8] = 0x04 Table 12. Rotation Rate, Twos Complement Format Rotation Rate +300°/sec +0.1°/sec +0.05°/sec 0°/sec −0.05°/sec −0.1°/sec −300°/sec Decimal +6000 +2 +1 0 −1 −2 −6000 Hex 0x1770 0x0002 0x0001 0x0000 0x3FFF 0x3FFE 0x2890 Binary xx01 0111 0111 0000 xx00 0000 0000 0010 xx00 0000 0000 0001 xx00 0000 0000 0000 xx11 1111 1111 1111 xx11 1111 1111 1110 xx10 1000 1001 0000 This is most useful for monitoring relative changes in the temperature. aZ mZ gZ Accelerometers Figure 14 provides arrows (aX, aY, aZ) that indicate the direction of acceleration, which produces a positive response in the gyroscope output registers: XACCL_OUT (x-axis, Table 13), YACCL_OUT (y-axis, Table 14), and ZACCL_OUT (z-axis, Table 15). Table 16 illustrates the accelerometer data format. Y-AXIS aY mX X-AXIS Table 13. XACCL_OUT (Base Address = 0x0A), Read Only aX mY gY gX Bits [15] [14] [13:0] 09797-014 Description New data indicator (ND), 1 = new data in register Error/alarm, 1 = active, see DIAG_STAT for error flags X-axis acceleration data, twos complement format, 0.25 mg per LSB Table 14. YACCL_OUT (Base Address = 0x0C), Read Only Bits [15] [14] [13:0] Description New data indicator (ND), 1 = new data in register Error/alarm, 1 = active, see DIAG_STAT for error flags Y-axis acceleration data, twos complement format, 0.25 mg per LSB Figure 14. Inertial Sensor Direction Reference Gyroscopes Figure 14 provides arrows (gX, gY, gZ) that indicate the direction of rotation, which produces a positive response in the gyroscope output registers: XGYRO_OUT (x-axis, Table 9), YGYRO_OUT (y-axis, Table 10), and ZGYRO_OUT (z-axis, Table 11). Table 12 illustrates the gyroscope data format. Table 9. XGYRO_OUT (Base Address = 0x04), Read Only Bits [15] [14] [13:0] Description New data indicator (ND), 1 = new data in register Error/alarm, 1 = active, see DIAG_STAT for error flags X-axis gyroscope data, twos complement format, 0.05°/sec per LSB, when SENS_AVG[15:8] = 0x04 Table 15. ZACCL_OUT (Base Address = 0x0E), Read Only Bits [15] [14] [13:0] Description New data indicator (ND), 1 = new data in register Error/alarm, 1 = active, see DIAG_STAT for error flags Z-axis acceleration data, twos complement format, 0.25 mg per LSB Rev. A | Page 11 of 24 ADIS16407 Table 16. Acceleration, Twos Complement Format Acceleration +18 g +6.667 mg +3.333 mg 0g −3.333 mg −6.667 mg −18 g Decimal +5401 +2 +1 0 −1 −2 −5401 Hex 0x1519 0x0002 0x0001 0x0000 0x3FFF 0x3FFE 0x2AE7 Binary xx01 0101 0001 1001 xx00 0000 0000 0010 xx00 0000 0000 0001 xx00 0000 0000 0000 xx11 1111 1111 1111 xx11 1111 1111 1110 xx10 1010 1110 0111 Use BAR_OUTL and the following steps to increase the numerical resolution by 8-bits for best performance: 1. 2. 3. Read BAR_OUT and multiply by 256 (shift 8 bits) Read BAR_OUTL and max off upper 8 bits Add results together for a 24-bit result, where 1 LSB = 0.0003125 and 0x00000 = 0 mbar Table 21. BARO_OUT (Base Address = 0x16), Read Only Bits [15] [14] [13:0] Description New data indicator (ND), 1 = new data in register Error/alarm, 1 = active, see DIAG_STAT for error flags Barometric pressure data, binary data format, 0.08 mbar per LSB, 0x0000 = 0 mbar Magnetometers Figure 14 provides arrows (mX, mY, mZ) that indicate the direction of the magnetic field, which produces a positive response in the gyroscope output registers: XMAGN_OUT (x-axis, Table 17), YMAGN_OUT (y-axis, Table 18), and ZAMAGN_OUT (z-axis, Table 19). Table 20 illustrates the magnetic field intensity data format. Table 17. XMAGN_OUT (Base Address = 0x10), Read Only Bits [15] [14] [13:0] Description New data indicator (ND), 1 = new data in register Error/alarm, 1 = active, see DIAG_STAT for error flags X-axis magnetic field intensity data, twos complement format, 0.5 mgauss per LSB Table 22. BARO_OUTL (Base Address = 0x18), Read Only Bits [15:8] [7:0] Description Not used Barometric pressure data, binary data format, 0.0003125 mbar per LSB, 0x0000 = 0 mbar Table 23. Pressure, Binary, BARO_OUT Only Pressure (mbar) 1200 1100 1000 0.16 0.08 0 Decimal 15,000 13,750 12,500 2 1 0 Hex 0x3A98 0x35B6 0x30D4 0x0002 0x0001 0x0000 Binary xx11 1010 1001 1000 xx11 0101 1011 0110 xx11 0000 1101 0100 xx00 0000 0000 0010 xx00 0000 0000 0001 xx00 0000 0000 0000 Table 18. YMAGN_OUT (Base Address = 0x12), Read Only Bits [15] [14] [13:0] Description New data indicator (ND), 1 = new data in register Error/alarm, 1 = active, see DIAG_STAT for error flags Y-axis magnetic field intensity data, twos complement format, 0.5 mgauss per LSB Internal Temperature The internal temperature measurement data loads into the TEMP_OUT (Table 24) register. Table 25 illustrates the temperature data format. Table 24. TEMP_OUT (Base Address = 0x1A), Read Only Bits [15] [14] [13:12] [11:0] Description New data indicator (ND), 1 = new data in register Error/alarm, 1 = active, see DIAG_STAT for error flags Not used Internal temperature data, twos complement, 0.136°C/LSB, 25°C = 0x000 Table 19. ZMAGN_OUT (Base Address = 0x14), Read Only Bits [15] [14] [13:0] Description New data indicator (ND), 1 = new data in register Error/alarm, 1 = active, see DIAG_STAT for error flags Z-axis magnetic field intensity data, twos complement format, 0.5 mgauss per LSB Table 20. Magnetometer, Twos Complement Format Magnetic Field +2.5 gauss +0.001 gauss +0.0005 gauss 0 gauss −0.0005 gauss −0.0005 gauss −2.5 gauss Decimal +5000 +2 +1 0 −1 −2 −5000 Hex 0x1388 0x0002 0x0001 0x0000 0x3FFF 0x3FFE 0x2C78 Binary xx01 0011 1000 1000 xx00 0000 0000 0010 xx00 0000 0000 0001 xx00 0000 0000 0000 xx11 1111 1111 1111 xx11 1111 1111 1110 xx10 1100 0111 1000 Table 25. Temperature, Twos Complement Format Temperature +105°C +85°C +25.272°C +25.136°C +25°C +24.864°C +24.728°C −40°C Decimal +588 LSB +441 LSB +2 LSB +1 LSB 0 LSB −1 LSB −2 LSB −478 LSB Hex 0x24C 0x1B9 0x002 0x001 0x000 0xFFF 0xFFE 0xE22 Binary xxxx 0010 0100 1100 xxxx 0001 1011 1001 xxxx 0000 0000 0010 xxxx 0000 0000 0001 xxxx 0000 0000 0000 xxxx 1111 1111 1111 xxxx 1111 1111 1110 xxxx 1110 0010 0010 Barometric Pressure The barometric pressure measurements are contained in two registers, BARO_OUT (Table 21) and BARO_OUTL (Table 22) registers. Table 23 provides several numerical format examples for BARO_OUT, which is sufficient for most applications. Rev. A | Page 12 of 24 ADIS16407 Power Supply The SUPPLY_OUT register (Table 26) provides a measurement of the voltage that is on the VDD pins of the device. Table 27 illustrates the power supply data format. Table 26. SUPPLY_OUT (Base Address = 0x02), Read Only Bits [15] [14] [13:12] [11:0] Description New data indicator (ND), 1 = new data in register Error/alarm, 1 = active, see DIAG_STAT for error flags Not used Power supply measurement data, binary format, 2.418 mV/LSB, 0 V = 0x000 Table 29. Analog Input, Offset Binary Format Input Voltage 3.3 V 1V 1.6118 mV 805.9 μV 0V Decimal 4095 1241 2 1 0 Hex 0xFFF 0x4D9 0x002 0x001 0x000 Binary xxxx 1111 1111 1111 xxxx 0100 1101 1001 xxxx 0000 0000 0010 xxxx 0000 0000 0001 xxxx 0000 0000 0000 DEVICE CONFIGURATION The control registers in Table 30 provide users with a variety of configuration options. The SPI provides access to these registers, one byte at a time, using the bit assignments in Figure 13. Each register has 16 bits, where Bits[7:0] represent the lower address, and Bits[15:8] represent the upper address. Figure 16 provides an example of writing 0x03 to Address 0x3B (SMPL_PRD[15:8]), using DIN = 0xBB03. This example reduces the sample rate by a factor of eight (see Table 46). CS SCLK DIN DIN = 1011 1011 0000 0011 = 0xBB03, WRITES 0x03 TO ADDRESS 0x3B. Table 27. Power Supply Data, Binary Format Voltage +5.25 V +5.0 V +4.75 V 1V 4.836 mV 2.418 mV 0V Decimal 2171 2068 1964 414 2 1 0 Hex 0x87B 0x814 0x7AC 0x19E 0x002 0x001 0x000 Binary xxxx 1000 0111 1011 xxxx 1000 0001 0100 xxxx 0111 1010 1100 xxxx 0001 1001 1110 xxxx 0000 0000 0010 xxxx 0000 0000 0001 xxxx 0000 0000 0000 INPUT ADC CHANNEL The AUX_ADC register provides access to the auxiliary ADC input channel. The ADC is a 12-bit successive approximation converter that has an input circuit equivalent to the one shown in Figure 15. The maximum input is 3.3 V. The ESD protection diodes can handle 10 mA without causing irreversible damage. The on resistance (R1) of the switch has a typical value of 100 Ω. The sampling capacitor, C2, has a typical value of 16 pF. VCC D C1 D R1 C2 09797-015 Figure 16. Example SPI Write Sequence Dual Memory Structure Writing configuration data to a control register updates its SRAM contents, which are volatile. After optimizing each relevant control register setting in a system, set GLOB_CMD[3] = 1 (DIN = 0xBE08) to backup these settings in nonvolatile flash memory. The flash backup process requires a valid power supply level for the entire 75 ms process time. Table 30 provides a user register memory map that includes a flash backup column. A “yes” in this column indicates that a register has a mirror location in flash and, when backed up properly, it automatically restores itself during startup or after a reset. Figure 17 provides a diagram of the dual memory structure used to manage operation and store critical user settings. MANUAL FLASH BACKUP NONVOLATILE FLASH MEMORY (NO SPI ACCESS) START-UP RESET VOLATILE SRAM SPI ACCESS Figure 15. Equivalent Analog Input Circuit (Conversion Phase: Switch Open, Track Phase: Switch Closed) Table 28. AUX_ADC (Base Address = 0x1C), Read Only Bits [15] [14] [13:12] [11:0] Description New data indicator (ND), 1 = new data in register Error/alarm, 1 = active, see DIAG_STAT for error flags Not used Analog input channel data, binary format, 0.8059 mV/LSB, 0 V = 0x000 Figure 17. SRAM and Flash Memory Diagram Rev. A | Page 13 of 24 09797-017 09797-016 ADIS16407 USER REGISTERS Table 30. User Register Memory Map 1 Name FLASH_CNT SUPPLY_OUT XGYRO_OUT YGYRO_OUT ZGYRO_OUT XACCL_OUT YACCL_OUT ZACCL_OUT XMAGN_OUT YMAGN_OUT ZMAGN_OUT BARO_OUT BARO_OUTL TEMP_OUT AUX_ADC XGYRO_OFF YGYRO_OFF ZGYRO_OFF XACCL_OFF YACCL_OFF ZACCL_OFF XMAGN_HIC YMAGN_HIC ZMAGN_HIC XMAGN_SIC YMAGN_SIC ZMAGN_SIC GPIO_CTRL MSC_CTRL SMPL_PRD SENS_AVG SLP_CTRL DIAG_STAT GLOB_CMD ALM_MAG1 ALM_MAG2 ALM_SMPL1 ALM_SMPL2 ALM_CTRL AUX_DAC Reserved LOT_ID1 LOT_ID2 PROD_ID SERIAL_NUM 1 2 R/W R R R R R R R R R R R R R R R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W W R W R/W R/W R/W R/W R/W R/W N/A R R R R Flash Backup Yes No No No No No No No No No No No No No No Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes Yes No Yes Yes Yes No No N/A Yes Yes Yes Yes Yes No N/A Yes Yes Yes Yes Address 2 0x00 0x02 0x04 0x06 0x08 0x0A 0x0C 0x0E 0x10 0x12 0x14 0x16 0x18 0x1A 0x1C 0x1E 0x20 0x22 0x24 0x26 0x28 0x2A 0x2C 0x2E 0x30 0x32 0x34 0x36 0x38 0x3A 0x3C 0x3E 0x40 0x42 0x44 0x46 0x48 0x4A 0x4C 0x4E 0x50 0x52 0x54 0x56 0x58 Default N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A N/A 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0800 0x0800 0x0800 0x0000 0x0006 0x0001 0x0402 N/A 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 0x0000 N/A N/A N/A 0x4107 N/A Function Flash memory write count Power supply measurement X-axis gyroscope output Y-axis gyroscope output Z-axis gyroscope output X-axis accelerometer output Y-axis accelerometer output Z-axis accelerometer output X-axis magnetometer measurement Y-axis magnetometer measurement Z-axis magnetometer measurement Barometer pressure measurement, high word Barometer pressure measurement, low word Temperature output Auxiliary ADC measurement X-axis gyroscope bias offset factor Y-axis gyroscope bias offset factor Z-axis gyroscope bias offset factor X-axis acceleration bias offset factor Y-axis acceleration bias offset factor Z-axis acceleration bias offset factor X-axis magnetometer, hard iron factor Y-axis magnetometer, hard iron factor Z-axis magnetometer, hard iron factor X-axis magnetometer, soft iron factor Y-axis magnetometer, soft iron factor Z-axis magnetometer, soft iron factor Auxiliary digital input/output control Miscellaneous control Internal sample period (rate) control Dynamic range and digital filter control Sleep mode control System status System command Alarm 1 amplitude threshold Alarm 2 amplitude threshold Alarm 1 sample size Alarm 2 sample size Alarm control Auxiliary DAC data Reserved Lot identification number Lot identification number Product identifier Bit Assignments See Table 38 See Table 26 See Table 9 See Table 10 See Table 11 See Table 13 See Table 14 See Table 15 See Table 17 See Table 18 See Table 19 See Table 21 See Table 22 See Table 24 See Table 28 See Table 49 See Table 50 See Table 51 See Table 52 See Table 53 See Table 54 See Table 55 See Table 56 See Table 57 See Table 58 See Table 59 See Table 60 See Table 42 See Table 39 See Table 46 See Table 47 See Table 33 See Table 40 See Table 32 See Table 62 See Table 63 See Table 64 See Table 65 See Table 66 See Table 43 See Table 34 See Table 35 See Table 36 See Table 37 N/A means not applicable. Each register contains two bytes. The address of the lower byte is displayed. The address of the upper byte is equal to the address of the lower byte plus 1. Rev. A | Page 14 of 24 ADIS16407 SYSTEM FUNCTIONS The ADIS16407 provides a number of system level controls for managing its operation, using the registers in Table 31. Table 31. System Tool Registers Register Name MSC_CTRL SLP_CTRL DIAG_STAT GLOB_CMD LOT_ID1 LOT_ID2 PROD_ID SERIAL_NUM Address 0x38 0x3E 0x40 0x42 0x52 0x54 0x56 0x58 Description Self test, calibration, data ready Sleep mode control Error flags Single command functions Lot Identification Code 1 Lot Identification Code 2 Product identifier Serial number PRODUCT IDENTIFICATION The PROD_ID register in Table 36 contains the binary equivalent of 16,407. It provides a product specific variable for systems that need to track this in their system software. The LOT_ID1 and LOT_ID2 registers in Table 34 and Table 35 combine to provide a unique, 32-bit lot identification code. The SERIAL_NUM register in Table 37 contains a binary number that represents the serial number on the device label. The assigned serial numbers in SERIAL_NUM are lot specific. Table 34. LOT_ID1 (Base Address = 0x52), Read Only Bits [15:0] Description Lot identification, binary code GLOBAL COMMANDS The GLOB_CMD register in Table 32 provides trigger bits for software reset, flash memory management, DAC control, and calibration control. Start each of these functions by writing a 1 to the assigned bit in GLOB_CMD. After completing the task, the bit automatically returns to 0. For example, set GLOB_CMD[7] = 1 (DIN = 0xC280) to initiate a software reset, which stops the sensor operation and runs the device through its start-up sequence. Set GLOB_CMD[3] = 1 (DIN = 0xC208) to back up the user register contents in nonvolatile flash. This sequence includes loading the control registers with the data in their respective flash memory locations prior to producing new data. Table 32. GLOB_CMD (Base Address = 0x42), Write Only Bits [15:8] [7] [6:4] [3] [2] [1] [0] Description (Default = 0x0000) Not used Software reset Not used Flash update Auxiliary DAC data latch Factory calibration restore Gyroscope bias correction Table 35. LOT_ID2 (Base Address = 0x54), Read Only Bits [15:0] Description Lot identification, binary code Table 36. PROD_ID Bit (Base Address = 0x56), Read Only Bits [15:0] Description (Default = 0x4017) Product identification = 0x4017 Table 37. SERIAL_NUM (Base Address = 0x58), Read Only Bits [15:12] [11:0] Description Reserved Serial number, 1 to 4094 (0xFFE) MEMORY MANAGEMENT The FLASH_CNT register in Table 38 provides a 16-bit counter that helps track the number of write cycles to the nonvolatile flash memory. The flash updates every time a manual flash update occurs. A manual flash update is initiated by the GLOB_CMD[3] bit and is also performed at the completion of the GLOB_CMD[1:0] functions (see Table 32). Table 38. FLASH_CNT (Base Address = 0x00), Read Only Bits [15:0] Description Binary counter POWER MANAGEMENT The SLP_CTRL register (see Table 33) provides two sleep modes for system level management: normal and timed. Set SLP_CTRL[8] = 1 (DIN = 0xBF01) to start normal sleep mode. When the device is in sleep mode, the following events can cause it to wake up: asserting CS from high to low, asserting RST from high to low, or cycling the power. Use SLP_CTRL[7:0] to put the device into sleep mode for a specified period. For example, SLP_CNT[7:0] = 0x64 (DIN = 0xBE64) puts the ADIS16407 to sleep for 50 seconds. Table 33. SLP_CTRL (Base Address = 0x3E), Write Only Bits [15:9] [8] [7:0] Description Not used Normal sleep mode (1 = start sleep mode) Timed sleep mode (write 0x01 to 0xFF to start) Sleep mode duration, binary, 0.5 sec/LSB Checksum Test Set MSC_CTRL[11] = 1 (DIN = 0xB908) to perform a checksum test of the internal program memory. This function takes a summation of the internal program memory and compares it with the original summation value for the same locations (from factory configuration). Check the results in the DIAG_STAT register, which is in Table 40. DIAG_STAT[6] equals 0 if the sum matches the correct value, and 1 if it does not. Make sure that the power supply is within specification for the entire 20 ms that this function takes to complete. Rev. A | Page 15 of 24 ADIS16407 SELF TEST FUNCTION The MSC_CTRL register in Table 39 provides a self test function for the gyroscopes and accelerometers. This function allows the user to verify the mechanical integrity of each MEMS sensor. When enabled, the self test applies an electrostatic force to each internal sensor element, which causes them to move. The movement in each element simulates its response to actual rotation/ acceleration and generates a predictable electrical response in the sensor outputs. The ADIS16407 exercises this function and compares the response to an expected range of responses and reports a pass/fail response to DIAG_STAT[5]. If this is high, the DIAG_STAT[15:10] provide pass/fail flags for each inertial sensor. Table 39. MSC_CTRL (Base Address = 0x38), Read/Write Bits [15:12] [11] [10] [9:8] [7] [6] [5:3] [2] [1] [0] 1 STATUS/ERROR FLAGS The DIAG_STAT register in Table 40 provides error flags for a number of functions. Each flag uses 1 to indicate an error condition and 0 to indicate a normal condition. Reading this register provides access to the status of each flag and resets all of the bits to 0 for monitoring future operation. If the error condition remains, the error flag returns to 1 at the conclusion of the next sample cycle. DIAG_STAT[0] does not require a read of this register to return to 0. If the power supply voltage goes back into range, this flag clears automatically. The SPI communication error flag in DIAG_STAT[3] indicates that the number of SCLKs in a SPI sequence did not equal a multiple of 16 SCLKs. Table 40. DIAG_STAT (Base Address = 0x40), Read Only Bits [15] [14] [13] [12] [11] [10] [9] [8] [7] [6] [5] [4] [3] [2] [1] Description (Default = 0x0000) Z-axis accelerometer self test failure 1 = fail, 0 = pass Y-axis accelerometer self test failure 1 = fail, 0 = pass X-axis accelerometer self test failure 1 = fail, 0 = pass Z-axis gyroscope self test failure 0 = pass Y-axis gyroscope self test failure 1 = fail, 0 = pass X-axis gyroscope self test failure 1 = fail, 0 = pass Alarm 2 status 1 = active, 0 = inactive Alarm 1 status 1 = active, 0 = inactive Not used Flash test, checksum flag 1 = fail, 0 = pass Self test diagnostic error flag 1 = fail, 0 = pass Sensor overrange 1 = overrange, 0 = normal SPI communication failure 1 = fail, 0 = pass Flash update failure 1 = fail, 0 = pass Power supply high 1 = VDD > 5.25 V 0 = VDD ≤ 5.25 V Power supply low 1 = VDD < 4.75 V 0 = VDD ≥ 4.75 V Description (Default = 0x0006) Not used Checksum memory test (cleared upon completion)1 1 = enabled, 0 = disabled Internal self test (cleared upon completion)1 1 = enabled, 0 = disabled Do not use, always set to 00 Linear acceleration bias compensation for gyroscopes 1 = enabled, 0 = disabled Point of percussion, see Figure 6 1 = enabled, 0 = disabled Not used Data ready enable 1 = enabled, 0 = disabled Data ready polarity 1 = active high, 0 = active low Data ready line select 1 = DIO2, 0 = DIO1 The bit is automatically reset to 0 after finishing the test. [0] Rev. A | Page 16 of 24 ADIS16407 INPUT/OUTPUT CONFIGURATION Table 41 provides a summary of registers that provide input/output configuration and control. Table 41. Input/Output Registers Register Name GPIO_CTRL MSC_CTRL AUX_DAC Address 0x36 0x38 0x4E Description General-purpose I/O control Self test, calibration, data ready Output voltage control, AUX_DAC Example Input/Output Configuration For example, set GPIO_CTRL[3:0] = 0100 (DIN = 0xB604) to set DIO3 as an output signal pin and DIO1, DIO2, and DIO4 as input signal pins. Set the output on DIO3 to 1 by setting GPIO_CTRL[10] = 1 (DIN = 0xB704). Then, read GPIO_CTRL[7:0] (DIN = 0x3600) and mask off GPIO_CTRL[9:8] and GPIO_CTRL[11] to monitor the digital signal levels on DIO4, DIO2, and DIO1. DATA READY INPUT/OUTPUT INDICATOR The factory default setting of MSC_CTRL[2:0] = 110 establishes DIO1 as a positive polarity data ready signal. See Table 39 for additional data ready configuration options. For example, set MSC_CTRL[2:0] = 100 (DIN = 0xB804) to change the polarity of the data ready signal on DIO1 for interrupt inputs that require negative logic inputs for activation. The pulse width is typically between 60 μs and 150 μs, including jitter (±30 μs). AUXILIARY DAC The AUX_DAC register in Table 43 provides user controls for setting the output voltage on the AUX_DAC pin. The 12-bit AUX_DAC line can drive its output to within 5 mV of the ground reference when it is not sinking current. As the output approaches 0 V, the linearity begins to degrade (~100 LSB starting point). As the sink current increases, the nonlinear range increases. The DAC latch command in GLOB_CMD[2] (see Table 32) moves the values of the AUX_DAC register into the DAC input register, enabling both bytes to take effect at the same time. This prevents undesirable output levels, which reflect single byte changes of the AUX_DAC register. Table 43. AUX_DAC (Base Address = 0x4E), Read/Write Bits [15:12] [11:0] Description (Default = 0x0000) Not used Data bits, scale factor = 0.8059 mV/LSB, offset binary format, 0 V = 0 LSB GENERAL-PURPOSE INPUT/OUTPUT DIO1, DIO2, DIO3, and DIO4 are configurable, general-purpose input/output lines that serve multiple purposes. The data ready controls in MSC_CTRL[2:0] have the highest priority for configuring DIO1 and DIO2. The alarm indicator controls in ALM_CTRL[2:0] have the second highest priority for configuring DIO1 and DIO2. The external clock control associated with SMPL_PRD[0] has the highest priority for DIO4 configuration (see Table 46). GPIO_CTRL in Table 42 has the lowest priority for configuring DIO1, DIO2, and DIO4, and has absolute control over DIO3. Table 42. GPIO_CTRL (Base Address = 0x36), Read/Write Bits [15:12] [11] [10] [9] [8] [7:4] [3] [2] [1] [0] Description (Default = 0x0000) Not used General-Purpose I/O Line 4 (DIO4) data level General-Purpose I/O Line 3 (DIO3) data level General-Purpose I/O Line 2 (DIO2) data level General-Purpose I/O Line 1 (DIO1) data level Not used General-Purpose I/O Line 4 (DIO4) direction control 1 = output, 0 = input General-Purpose I/O Line 3 (DIO3) direction control 1 = output, 0 = input General-Purpose I/O Line 2 (DIO2) direction control 1 = output, 0 = input General-Purpose I/O Line 1 (DIO1) direction control 1 = output, 0 = input Table 44. Setting AUX_DAC = 1 V DIN 0xCED9 0xCF04 0xC204 Description AUX_DAC[7:0] = 0xD9 (217 LSB) AUX_DAC[15:8] = 0x04 (1024 LSB) GLOB_CMD[2] = 1; move values into the DAC input register, resulting in a 1 V output level Rev. A | Page 17 of 24 ADIS16407 DIGITAL PROCESSING CONFIGURATION Table 45. Digital Processing Registers Register Name SMPL_PRD SENS_AVG Address 0x3A 0x3C Description Sample rate control Digital filtering and range control MAGNITUDE (dB) 0 –20 –40 –60 –80 –100 –120 –140 0.001 N=2 N=4 N = 16 N = 64 0.01 0.1 1 09797-018 SAMPLE RATE The internal sampling system produces new data in the output data registers at a rate of 819.2 SPS. The SMPL_PRD register in Table 46 provides two functional controls that affect sampling and register update rates. SMPL_PRD[12:8] provides a control for reducing the update rate, using an averaging filter with a decimated output. These bits provide a binomial control that divides the data rate by a factor of 2 every time this number increases by 1. For example, set SMPL_PRD[15:8] = 0x04 (DIN = 0xBB04) to set the decimation factor to 16. This reduces the update rate to 51 SPS and the bandwidth to 25 Hz. Table 46. SMPL_PRD (Base Address = 0x3A), Read/Write Bits [15:13] [12:8] [7:1] [0] Description (Default = 0x0001) Not used D, decimation rate setting, binomial, see Figure 19 Not used Clock 1 = internal 819.2 SPS 0 = external FREQUENCY (f/fS) Figure 18. Bartlett Window, FIR Filter Frequency Response (Phase Delay = N Samples) DYNAMIC RANGE The SENS_AVG[10:8] bits provide three dynamic range settings for this gyroscope. The lower dynamic range settings (±75°/sec and ±150°/sec) limit the minimum filter tap sizes to maintain resolution. For example, set SENS_AVG[10:8] = 010 (DIN = 0xBD02) for a measurement range of ±150°/sec. Because this setting can influence the filter settings, program SENS_AVG[10:8] before programming SENS_AVG[2:0] if more filtering is required. Table 47. SENS_AVG (Base Address = 0x3C), Read/Write Bits [15:11] [10:8] Description (Default = 0x0402) Not used Measurement range (sensitivity) selection 100 = ±300°/sec (default condition) 010 = ±150°/sec, filter taps ≥ 4 (Bits[2:0] ≥ 0x02) 001 = ±75°/sec, filter taps ≥ 16 (Bits[2:0] ≥ 0x04) Not used Filter Size Variable B Number of taps in each stage; NB = 2B See Figure 18 for filter response INPUT CLOCK CONFIGURATION SMPL_PRD[0] provides a control for synchronizing the internal sampling to an external clock source. Set SMPL_PRD[0] = 0 (DIN = 0xBA00) and GPIO_CTRL[3] = 0 (DIN = 0xB600) to enable the external clock. See Table 2 and Figure 4 for timing information. DIGITAL FILTERING The SENS_AVG register in Table 47 provides user controls for the low-pass filter. This filter contains two cascaded averaging filters that provide a Bartlett window, FIR filter response (see Figure 19). For example, set SENS_AVG[2:0] = 100 (DIN = 0xBC04) to set each stage to 16 taps. When used with the default sample rate of 819.2 SPS and zero decimation (SMPL_PRD[15:8] = 0x00), this value reduces the sensor bandwidth to approximately 16 Hz. [7:3] [2:0] BARTLETT WINDOW FIR FILTER NB x(n) n=1 NB x(n) n=1 AVERAGE/ DECIMATION FILTER ND x(n) n=1 ÷ND MEMS SENSOR LOW-PASS FILTER 330Hz ADC 1 NB 1 NB 1 ND GYROSCOPES LOW-PASS, TWO-POLE (404Hz, 757Hz) ACCELEROMETERS LOW-PASS, SINGLE-POLE (330Hz) CLOCK 819.2SPS B = SENS_AVG[2:0] NB = 2B NB = NUMBER OF TAPS (PER STAGE) D = SMPL_PRD[12:8] ND = 2D ND = NUMBER OF TAPS EXTERNAL CLOCK ENABLED BY SMPL_PRD[0] = 0 Figure 19. Sampling and Frequency Response Block Diagram Rev. A | Page 18 of 24 09797-019 ADIS16407 CALIBRATION The mechanical structure and assembly process of the ADIS16407 provide excellent position and alignment stability for each sensor, even after subjected to temperature cycles, shock, vibration, and other environmental conditions. The factory calibration includes a dynamic characterization of each gyroscope and accelerometer over temperature and generates sensor specific correction formulas. Table 48 provides a list of registers that can help optimize system performance after installation. Figure 20 illustrates the summing function for the offset correction register of each sensor. Table 48. Registers for User Calibration Register XGYRO_OFF YGYRO_OFF ZGYRO_OFF XACCL_OFF YACCL_OFF ZACCL_OFF XMAGN_HIC YMAGN_HIC ZMAGN_HIC XMAGN_SIC YMAGN_SIC ZMAGN_SIC MSC_CTRL GLOB_CMD Address 0x1E 0x20 0x22 0x24 0x26 0x28 0x2A 0x2C 0x2E 0x30 0x32 0x34 0x38 0x42 Description Gyroscope bias, x-axis Gyroscope bias, y-axis Gyroscope bias, z-axis Accelerometer bias, x-axis Accelerometer bias, y-axis Accelerometer bias, z-axis Hard iron correction, x-axis Hard iron correction, y-axis Hard iron correction, z-axis Soft iron correction, x-axis Soft iron correction, y-axis Soft iron correction, z-axis Miscellaneous calibration Automatic calibration Table 49. XGYRO_OFF (Base Address = 0x1E), Read/Write Bits [15:14] [13:0] Description (Default = 0x0000) Not used X-axis, gyroscope offset correction factor, twos complement, 0.0125°/sec per LSB Table 50. YGYRO_OFF (Base Address = 0x20), Read/Write Bits [15:14] [13:0] Description (Default = 0x0000) Not used Y-axis, gyroscope offset correction factor, twos complement, 0.0125°/sec per LSB Table 51. ZGYRO_OFF (Base Address = 0x22), Read/Write Bits [15:14] [13:0] Description (Default = 0x0000) Not used Z-axis, gyroscope offset correction factor, twos complement, 0.0125°/sec per LSB Gyroscope Bias Correction Factors When the bias estimate is complete, multiply the estimate by −1 to change its polarity, convert it into digital format for the offset correction registers (Table 49), and write the correction factors to the correction registers. For example, lower the x-axis bias by 10 LSB (0.125°/sec) by setting XGYRO_OFF = 0x1FF6 (DIN = 0x9F1F, 0x9EF6). Single Command Bias Correction GLOB_CMD[0] (Table 32) loads the xGYRO_OFF registers with the values that are the opposite of the values that are in xGYRO_OUT, at the time of initiation. Use this command, together with the decimation filter (SMPL_PRD[12:8], Table 46), to automatically average the gyroscope data and improve the accuracy of this function, as follows: 1. 2. Set SENS_AVG[10:8] = 001 (DIN = 0xBD01) to optimize the xGYRO_OUT sensitivity to 0.0125°/sec/LSB. Set SMPL_PRD[12:8] = 0x10 (DIN = 0xBB10) to set the decimation rate to 65,536 (216), which provides an averaging time of 80 seconds (65,536 ÷ 819.2 SPS). Wait for 80 seconds while keeping the device motionless. Set GLOB_CMD[0] = 1 (DIN = 0xC201) and wait for the time it takes to perform the flash memory backup (~75 ms). GYROSCOPES The XGYRO_OUT (Table 49), YGYRO_OUT (Table 50), and ZGYRO_OUT (Table 51) registers provide user-programmable bias adjustment function for the x-, y-, and z-axis gyroscopes, respectively. Figure 20 illustrates that they contain bias correction factors that adjust to the sensor data immediately before it loads into the output register. X-AXIS MEMS GYRO ADC FACTORY CALIBRATION AND FILTERING XGYRO_OUT XGYRO_OFF Figure 20. User Calibration, XGYRO_OFF Example Gyroscope Bias Error Estimation Any system level calibration function must start with an estimate of the bias errors, which typically comes from a sample of gyroscope output data, when the device is not in motion. The sample size of data depends on the accuracy goals. Figure 7 provides a trade-off relationship between averaging time and the expected accuracy of a bias measurement. Vibration, thermal gradients, and power supply instability can influence the accuracy of this process. Rev. A | Page 19 of 24 09797-020 3. 4. ADIS16407 ACCELEROMETERS The XACCL_OUT (Table 52), YACCL_OUT (Table 53), and ZACCL_OUT (Table 54) registers provide user programmable bias adjustment function for the x-, y-, and z-axis accelerometers, respectively. These registers adjust the accelerometer data in the same manner as XGYRO_OFF functions in Figure 20. Table 52. XACCL_OFF (Base Address = 0x24), Read/Write Bits [15:14] [13:0] Description (Default = 0x0000) Not used X-axis, accelerometer offset correction factor, twos complement, 0.25 mg/LSB ORIGIN ALIGNMENT REFERENCE POINT SEE MSC_CTRL[6]. Table 53. YACCL_OFF (Base Address = 0x26), Read/Write Bits [15:14] [13:0] Description (Default = 0x0000) Not used Y-axis, accelerometer offset correction factor, twos complement, 0.25 mg/LSB Figure 21. Point of Percussion Physical Reference MAGNETOMETER CALIBRATION The ADIS16407 provides registers that contribute to both hard iron and soft iron correction factors, as shown in Figure 22 XMAGN_SIC Table 54. ZACCL_OFF (Base Address = 0x28), Read/Write Bits [15:14] [13:0] Description (Default = 0x0000) Not used Z-axis, accelerometer offset correction factor, twos complement, 0.25 mg/LSB MAGNETIC SENSOR ADC FACTORY CALIBRATION AND FILTERING + XMAGN_HIC × XMAGN_OUT 09797-021 Accelerometer Bias Error Estimation Under static conditions, orient each accelerometer in positions where the response to gravity is predictable. A common approach to this is to measure the response of each accelerometer when they are oriented in peak response positions, that is, where ±1 g is the ideal measurement position. Next, average the +1 g and −1 g accelerometer measurements together to estimate the residual bias error. Using more points in the rotation can improve the accuracy of the response. Figure 22. Hard Iron and Soft Iron Factor Correction Hard Iron Correction The XMAGN_HIC (Table 55), YMAGN_HIC (Table 56), and ZMAGN_HIC (Table 57) registers provide the user programmable bias adjustment function for the x-, y-, and z-axis magnetometers, respectively. Hard iron effects result in an offset of the magnetometer response. Table 55. XMAGN_HIC (Base Address = 0x2A), Read/Write Bits [15:14] [13:0] Description (Default = 0x0800) Not used X-axis hard iron correction factor, twos complement, 0.5 mgauss/LSB Accelerometer Bias Correction Factors When the bias estimate is complete, multiply the estimate by −1 to change its polarity, convert it to the digital format for the offset correction registers (Table 52), and write the correction factors to the correction registers. For example, lower the x-axis bias by 10 LSB (33.3 mg) by setting XACCL_OFF = 0x1FF6 (DIN = 0xA51F, 0xA4F6). Table 56. YMAGN_HIC (Base Address = 0x2C), Read/Write Bits [15:14] [13:0] Description (Default = 0x0800) Not used Y-axis hard iron correction factor, twos complement, 0.5 mgauss/LSB Point of Percussion Alignment Set MSC_CTRL[6] = 1 (DIN = 0xB846) to enable this feature and maintain the factory default settings for DIO1. This feature performs a point of percussion translation to the point identified in Figure 21. See Table 39 for more information on MSC_CTRL. Table 57. ZMAGN_HIC (Base Address = 0x2E), Read/Write Bits [15:14] [13:0] Description (Default = 0x0800) Not used Z-axis hard iron correction factor, twos complement, 0.5 mgauss/LSB Rev. A | Page 20 of 24 09797-022 ADIS16407 Hard Iron Factors When the hard iron error estimation is complete, take the following steps: 1. 2. 3. Multiply the estimate by −1 to change its polarity. Convert it into digital format for the hard iron correction registers (Table 55). Write the correction factors to the correction registers. For example, lower the x-axis bias by 10 LSB (5 mgauss) by setting XMAGN_HIC = 0x1FF6 (DIN = 0xAB1F, 0xAAF6). Soft Iron Factors When the soft iron error estimation is complete, convert the sensitivity into the digital format for the soft iron correction registers (Table 58) and write the correction factors to the correction registers. A simple method for converting the correction factor is to divide it by 2 and multiply it by 4095. For example, increasing the default soft iron factor to approximately 1.15 uses a binary code for 2355, or 0x933. Increase the soft iron correction factor for the y-axis to approximately 1.15 by setting YMAGN_SIC = 0x0933 (DIN = 0xB309, 0xB233). Soft Iron Effects The XMAGN_SIC (Table 58), YMAGN_SIC (Table 59), and ZMAGN_SIC (Table 60) registers provide an adjustment variable for the magnetometer sensitivity adjustment in each magnetometer response to simplify the process of performing a system level soft iron correction. Table 58. XMAGN_SIC (Base Address = 0x30), Read/Write Bits [15:12] [11:0] Description (Default = 0x0000) Not used X-axis soft iron correction factor, binary format, 2 = 0xFFF, 1 = 0x800, 0 = 0x000, ~0.0488%/LSB FLASH UPDATES When using the user calibration registers to optimize system level accuracy, keep in mind that the register values are volatile until their contents are saved in the nonvolatile flash memory. After writing all of the correction factors into the user correction registers, set GLOB_CMD[3] = 1 (DIN = 0xC204) to save these settings in nonvolatile flash memory. Be sure to consider the endurance rating of the flash memory when determining how often to update the user correction factors in the flash memory. RESTORING FACTORY CALIBRATION Set GLOB_CMD[1] = 1 (DIN = 0xC202) to execute the factory calibration restore function. This is a single command function, which resets the gyroscope and accelerometer offset registers to 0x0000 and all sensor data to 0. Then, it automatically updates the flash memory within 75 ms and restarts sampling and processing data. See Table 32 for more information on GLOB_CMD. Table 59. YMAGN_SIC (Base Address = 0x32), Read/Write Bits [15:12] [11:0] Description (Default = 0x0000) Not used Y-axis soft iron correction factor, binary format, 2 = 0xFFF, 1 = 0x800, 0 = 0x000, ~0.0488%/LSB Table 60. ZMAGN_SIC (Base Address = 0x34), Read/Write Bits [15:12] [11:0] Description (Default = 0x0000) Not used Z-axis soft iron correction factor, binary format, 2 = 0xFFF, 1 = 0x800, 0 = 0x000, ~0.0488%/LSB Rev. A | Page 21 of 24 ADIS16407 ALARMS Alarm 1 and Alarm 2 provide two independent alarms. Table 61 lists the alarm control registers, including ALM_CTRL (Table 66), which provides control bits for data source selection, static/ dynamic comparison, filtering, and alarm indicator. Table 61. Registers for Alarm Configuration Register ALM_MAG1 ALM_MAG2 ALM_SMPL1 ALM_SMPL2 ALM_CTRL Address 0x44 0x46 0x48 0x4A 0x4C Description Alarm 1 trigger setting Alarm 2 trigger setting Alarm 1 sample period Alarm 2 sample period Alarm configuration ALARM REPORTING The DIAG_STAT[9:8] bits provide error flags that indicate an alarm condition. The ALM_CTRL[2:0] bits provide controls for a hardware indicator using DIO1 or DIO2. Table 66. ALM_CTRL (Base Address = 0x4C), Read/Write Bits [15:12] Description (Default = 0x0000) Alarm 2 data source selection 0000 = disable 0001 = SUPPLY_OUT 0010 = XGYRO_OUT 0011 = YGYRO_OUT 0100 = ZGYRO_OUT 0101 = XACCL_OUT 0110 = YACCL_OUT 0111 = ZACCL_OUT 1001 =XMAGN_OUT 1010 = YMAGN_OUT 1011 = ZMAGN_OUT 1100 = AUX_ADC Alarm 1 data source selection (same as Alarm 2) Alarm 2, dynamic/static (1 = dynamic, 0 = static) Alarm 1, dynamic/static (1 = dynamic, 0 = static) Not used Data source filtering (1 = filtered, 0 = unfiltered) Not used Alarm indicator (1 = enabled, 0 = disabled) Alarm indicator active polarity (1 = high, 0 = low) Alarm output line select (1 = DIO2, 0 = DIO1) STATIC ALARM USE The static alarms setting compares the data source selection (ALM_CTRL[15:8]) with the values in the ALM_MAGx registers listed in Table 62 and Table 63, using ALM_MAGx[15] to determine the trigger polarity. The data format in these registers matches the format of the data selection in ALM_CTRL[15:8]. See Table 67, Alarm 1, for a static alarm configuration example. Table 62. ALM_MAG1 (Base Address = 0x44), Read/Write Bits [15] [14] [13:0] Description (Default = 0x0000) Trigger polarity 1 = greater than, 0 = less than Not used Threshold setting; matches for format of ALM_CTRL[11:8] output register selection [11:8] [7] [6] [5] [4] [3] [2] [1] [0] Table 63. ALM_MAG2 (Base Address = 0x46), Read/Write Bits [15] [14] [13:0] Description (Default = 0x0000) Trigger polarity 1 = greater than, 0 = less than Not used Threshold setting; matches for format of ALM_CTRL[15:12] output register selection Alarm Example Table 67 offers an example that configures Alarm 1 to trigger when filtered ZACCL_OUT data drops below 0.7 g, and Alarm 2 to trigger when filtered ZGYRO_OUT data changes by more than 50°/sec over a 100 ms period, or 500°/sec2. The filter setting helps reduce false triggers from noise and refine the accuracy of the trigger points. The ALM_SMPL2 setting of 82 samples provides a comparison period that is approximately equal to 100 ms for an internal sample rate of 819.2 SPS. Table 67. Alarm Configuration Example 1 DIN 0xCD47, 0xCC97 Description ALM_CTRL = 0x4797 Alarm 2: dynamic, Δ-ZGYRO_OUT (Δ-time, ALM_SMPL2) > ALM_MAG2 Alarm 1: static, ZACCL_OUT < ALM_MAG1, filtered data DIO2 output indicator, positive polarity ALM_MAG2 = 0x03E8 = 1,000 LSB = 50°/sec ALM_MAG1 = 0x00D2 = 210 LSB = +0.7 g ALM_SMPL2[7:0] = 0x52 = 82 samples 82 samples ÷ 819.2 SPS = ~100 ms DYNAMIC ALARM USE The dynamic alarm setting monitors the data selection for a rate-of-change comparison. The rate-of-change comparison is represented by the magnitude in the ALM_MAGx registers over the time represented by the number-of-samples setting in the ALM_SMPLx registers, located in Table 64. See Table 67, Alarm 2, for a dynamic alarm configuration example. Table 64. ALM_SMPL1 (Base Address = 0x48), Read/Write Bits [15:8] [7:0] Description (Default = 0x0000) Not used Binary, number of samples (both 0x00 and 0x01 = 1) Table 65. ALM_SMPL2 (Base Address = 0x4A), Read/Write Bits [15:8] [7:0] Description (Default = 0x0000) Not used Binary, number of samples (both 0x00 and 0x01 = 1) 0xC703, 0xC6E8 0xC500, 0xC4D2 0xC866 Rev. A | Page 22 of 24 ADIS16407 APPLICATIONS INFORMATION INSTALLATION/HANDLING For ADIS16407 installation, use the following two step process: 1. 2. Secure the base plate using machine screws. Press the connector into its mate. INTERFACE PRINTED CIRCUIT BOARD (PCB) The ADIS16407/PCBZ includes one ADIS16407BMLZ and one interface PCB. The interface PCB simplifies the process of integrating these products into an existing processor system. J1 and J2 are dual row, 2 mm (pitch) connectors that work with a number of ribbon cable systems, including 3M Part 1522120100-GB (ribbon crimp connector) and 3M Part 3625/12 (ribbon cable). Figure 23 provides a hole pattern design for installing the ADIS16407BMLZ and the interface PCB onto the same surface. Figure 24 provides the pin assignments for each connector, which match the pin descriptions for the ADIS16407BMLZ. The ADIS16407does not require any external capacitors for normal operation; therefore, the interface PCB does not use the C1/C2 pads (not shown in Figure 23). 23.75 21.24 For removal 1. 2. Gently pry the connector from its mate using a small slot screwdriver. Remove the screws and lift up the device. Never attempt to unplug the connector by pulling on the plastic case or base plate. Although the flexible connector is very reliable in normal operation, it can break when subjected to unreasonable handling. When broken, the flexible connector cannot be repaired. The AN-1045 Application Note, iSensor® IMU Mounting Tips, provides more information about developing an appropriate mechanical interface design. GYROSCOPE BIAS OPTIMIZATION The factory calibration corrects for initial and temperature dependent bias errors in the gyroscopes. Use the autonull command (GLOB_CMD[0]) and decimation filter (SMPL_PRD[12:8]) to address rate random walk (RRW) behaviors. Control physical, power supply, and temperature stability during the averaging times to help ensure optimal accuracy during this process. Refer to the AN-1041 Application Note, iSensor® IMU Quick Start Guide and Bias Optimization Tips, for more information about optimizing performance. J2 1 2 30.10 11 J1 1 12 27.70 2 1.20 11 12 09797-023 NOTES 1. DIMENSIONS IN MILLIMETERS. Figure 23. Physical Diagram for the ADIS16407/PCBZ J1 RST CS DNC GND GND VCC 1 3 5 7 9 11 2 4 6 8 10 12 SCLK DOUT DIN GND VCC VCC AUX_ADC AUX_DAC GND DNC DNC DIO2 1 3 5 7 9 11 J2 2 4 6 8 10 12 GND DIO3 DIO4 DNC DNC DIO1 09797-024 Figure 24. J1/J2 Pin Assignments Rev. A | Page 23 of 24 ADIS16407 OUTLINE DIMENSIONS 31.900 31.700 31.500 23.454 23.200 22.946 2.382 BSC 9.464 9.210 8.956 (2×) 17.41 17.21 17.01 (2×) 4.20 4.00 3.80 (2×) BOTTOM VIEW 21.410 21.210 21.010 1.588 BSC TOP VIEW 1.588 BSC 22.964 22.710 22.456 10.60 BSC PIN 24 14.950 14.550 14.150 10.50 BSC FRONT VIEW 5.20 5.00 4.80 (2×) 1.00 BSC 7.18 BSC CASTING FEATURE PIN 1 0.05 BSC 12.10 BSC 2.00 BSC 23.504 23.250 22.996 2.660 2.500 2.340 SIDE VIEW DETAIL A 4.330 BSC DETAIL A 4.162 BSC 0.305 BSC (24×) 1.00 BSC (22×) 14.00 BSC 1.65 BSC 122208-C Figure 25. 24-Lead Module with Connector Interface (ML-24-2) Dimensions shown in millimeters ORDERING GUIDE Model 1 ADIS16407BMLZ ADIS16407/PCBZ 1 Temperature Range −40°C to +105°C Package Description 24-Lead Module with Connector Interface Interface PCB Package Option ML-24-2 Z = RoHS Compliant Part. ©2011 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D09797-0-6/11(A) Rev. A | Page 24 of 24
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