AOSP66923

AOSP66923 100V N-Channel AlphaSGT TM General Description Product Summary • Trench Power MOSFET - AlphaSGTTM technology • Low RDS(ON) • Logic Level Driving • Excellent QG x RDS(ON) Product (FOM) • RoHS and Halogen-Free Compliant Applications VDS ID (at VGS=10V) 100V 12A RDS(ON) (at VGS=10V) < 11mΩ RDS(ON) (at VGS=4.5V) < 15mΩ 100% UIS Tested 100% Rg Tested • High Frequency Switching and Synchronous Rectification SO-8 Top View D D D Bottom View D D G G S S S S Pin 1 Orderable Part Number Package Type Form Minimum Order Quantity AOSP66923 SO-8 Tape & Reel 3000 Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Drain-Source Voltage Symbol VDS Gate-Source Voltage VGS TA=25°C Continuous Drain Current Pulsed Drain Current C Avalanche Current C Avalanche energy L=0.1mH TA=25°C Power Dissipation B TA=70°C C Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Lead Rev.2.0: September 2019 Steady-State Steady-State V A IDM 48 IAS 30 A EAS 45 mJ 3.1 RqJA RqJL W 2.0 TJ, TSTG Symbol t ≤ 10s ±20 9.5 PD Junction and Storage Temperature Range Units V 12 ID TA=70°C Maximum 100 -55 to 150 Typ 31 59 16 www.aosmd.com °C Max 40 75 24 Units °C/W °C/W °C/W Page 1 of 5 AOSP66923 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage Conditions Min ID=250mA, VGS=0V 100 Typ Zero Gate Voltage Drain Current IGSS VGS(th) Gate-Body leakage current VDS=0V, VGS=±20V Gate Threshold Voltage VDS=VGS, ID=250mA 1 TJ=55°C 1.6 ±100 nA 2.1 2.6 V 9.2 11 16 19.5 11.7 15 RDS(ON) Static Drain-Source On-Resistance gFS Forward Transconductance VDS=5V, ID=12A 50 VSD Diode Forward Voltage IS=1A, VGS=0V 0.72 IS Maximum Body-Diode Continuous Current TJ=125°C VGS=4.5V, ID=10A DYNAMIC PARAMETERS Ciss Input Capacitance Output Capacitance Crss Reverse Transfer Capacitance Rg Gate resistance VGS=0V, VDS=50V, f=1MHz f=1MHz SWITCHING PARAMETERS Qg(10V) Total Gate Charge Qg(4.5V) Total Gate Charge Qgs Gate Source Charge Qgd Gate Drain Charge Qoss Output Charge tD(on) Turn-On DelayTime tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf trr Turn-Off Fall Time Qrr VGS=10V, VDS=50V, ID=12A VGS=0V, VDS=50V mΩ mΩ S 1 V 4 A 1300 1725 2100 pF 250 360 480 pF 2 7.5 15 pF 0.3 0.8 1.3 Ω 25 35 nC 12.5 18 nC 6 nC 3.5 nC 30 8.5 nC ns 3 ns 23 ns 3.5 ns IF=12A, di/dt=500A/ms 33 Body Diode Reverse Recovery Charge IF=12A, di/dt=500A/ms 120 ns nC Body Diode Reverse Recovery Time VGS=10V, VDS=50V, RL=4.15W, RGEN=3W μA 5 VGS=10V, ID=12A Coss Units V VDS=100V, VGS=0V IDSS Max A. The value of RqJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using ≤ 10s junction-to-ambient thermal resistance. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initialTJ=25°C. D. The RqJA is the sum of the thermal impedance from junction to lead RqJL and lead to ambient. E. The static characteristics in Figures 1 to 6 are obtained using or equal to 4.5V ZqJA Normalized Transient Thermal Resistance 1 0.1 1 10 100 1000 Pulse Width (s) Figure 10: Single Pulse Power Rating Junction-toAmbient (Note F) Figure 9: Maximum Forward Biased Safe Operating Area (Note F) 10 0.01 In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse D=Ton/T TJ,PK=TA+PDM.ZqJA.RqJA RqJA=75°C/W 0.1 PDM 0.01 0.001 1E-05 Single Pulse Ton T 0.0001 0.001 0.01 0.1 1 10 100 Pulse Width (s) Figure 11: Normalized Maximum Transient Thermal Impedance (Note F) Rev.2.0: September 2019 www.aosmd.com Page 4 of 5 AOSP66923 Figure A:Charge Gate Charge Test Circuit & Waveforms Gate Test Circuit & Waveform Vgs Qg 10V + + Vds VDC - Qgs Qgd VDC - DUT Vgs Ig Charge Figure B: ResistiveSwitching Switching Test Test Circuit Resistive Circuit &&Waveforms Waveforms RL Vds Vds DUT Vgs 90% + Vdd VDC - Rg 10% Vgs Vgs td(on) tr td(off) ton tf toff Figure C: Unclamped InductiveSwitching Switching (UIS) (UIS) Test Unclamped Inductive Test Circuit Circuit&&Waveforms Waveforms L 2 EAR= 1/2 LIAR Vds BVDSS Vds Id + Vdd Vgs Vgs I AR VDC - Rg Id DUT Vgs Vgs Figure D:Recovery Diode Recovery Test Circuit & Waveforms Diode Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vds - Isd Vgs Ig Rev.2.0: September 2019 Vgs L Isd + Vdd t rr dI/dt I RM Vdd VDC - IF Vds www.aosmd.com Page 5 of 5