PI74AVC+16345A

PI74AVC+16345 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 2.5V, Registered 1-Bit to 4-Bit Address Driver w/3-State Outputs Product Features Product Description • PI74AVC+16345 is designed for low-voltage operation, VCC = 1.65V to 3.6V Pericom Semiconductor’s PI74AVC+ series of logic circuits are produced using the Company’s advanced submicron CMOS technology, achieving industry leading speed. • True ±24mA Balanced Drive @3.3V The PI74AVC+16345 is ideal for driving memory modules in systems where multiple memory modules are used. One each of the four output banks drive a different module; modules can be added or removed without affecting the signal integrity of the other modules in the system. Dual clock enables (CEx) allow use of the device in high-speed memory interleaving applications where the clock can be alternately enabled and disabled, allowing the address to be held for additional cycles during memory access. • IOFF supports partial power down operation • I/O Tolerant to 3.6V • All outputs contain a patented DDC (Dynamic DriveControl) circuit that reduces noise without degrading propagation delay. • Industrial operation: –40°C to +85°C • Available Packages: – 56-pin 240 mil wide plastic TSSOP (A) – 56-pin 173 mil wide plastic TVSOP (K) To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current sinking capability of the driver. Logic Block Diagram 1 56 CE1 CE2 29 OE 1Q1 D1 8 1Q5 CE D5 D 36 CE D 4Q1 4Q5 1Q2 D2 14 1Q6 CE D6 D 42 CE D 4Q2 4Q6 1Q3 D3 15 1Q7 CE D7 D 43 CE D 4Q3 4Q7 1Q4 D4 21 1Q8 CE D8 D 4Q4 CLK 49 CE D 4Q8 28 1 PS8442A 08/06/01 PI74AVC+16345 2.5V, Registered 1-Bit to 4-Bit Address Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Truth Table(1) Pin Description Pin Name OE Inputs D e s cription 3- State O utput Enable Inputs (Active LO W) Outputs CEx OE CLK Dx xQx CLK Clock Input H L X X B0 CEX Clock Enable Inputs (Active Low) X L L X B0 DX Data Inputs L L ↑ L L XQ X 3- State O utputs L L ↑ H H GND Ground X H X X Z VCC Power Note: 1. H = L = X = Z = ↑ = B0 = Pin Configuration CE1 1 56 CE2 1Q1 2 55 1Q8 2Q1 3 54 2Q8 GND 4 53 GND 3Q1 5 52 3Q8 4Q1 6 51 4Q8 VCC 7 50 VCC D1 8 49 D8 1Q2 9 48 1Q7 2Q2 10 47 2Q7 GND 11 46 GND 3Q2 12 45 3Q7 4Q2 13 D2 14 43 D7 D3 15 42 D6 1Q3 16 41 1Q6 56-Pin 44 A, K 4Q7 2Q3 17 40 2Q6 GND 18 39 GND 3Q3 19 38 3Q6 4Q3 20 37 4Q6 D4 21 36 D5 VCC 22 35 VCC 1Q4 23 34 1Q5 2Q4 24 33 2Q5 GND 25 32 GND 3Q4 26 31 3Q5 4Q4 27 28 30 29 4Q5 CLK High Signal Level Low Signal Level Irrelevant High Impedance LOW-to-HIGH Transition Previous State OE 2 PS8442A 08/06/01 PI74AVC+16345 2.5V, Registered 1-Bit to 4-Bit Address Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which useful life may be impaired. For user guidelines, not tested.) Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Supply voltage range, VCC .................................................... –0.5V to +4.6V Input voltage range, VI ............................................................ –0.5V to +4.6V Voltage range applied to any output in the high-impedance or power-off state, VO(1) .................... –0.5V to +4.6V Voltage range applied to any output in the high or low state, VO(1,2) ............................................... –0.5V to VCC +0.5V Input clamp current, IIK (VI