BQ34Z100PWR

BQ34Z100 SLUSAU1C – MAY 2012 – REVISED MAY 2021 BQ34Z100 Wide Range Fuel Gauge with Impedance Track™ Technology 1 Features 2 Applications • • • • • • • • • • • • • • • • Supports Li-ion and LiFePO4 chemistries Capacity estimation using patented Impedance Track™ technology for batteries from 3 V to 65 V – Aging compensation – Self-discharge compensation Supports battery capacities above 65 Ah Supports charge and discharge currents above 32 A External NTC thermistor support Supports two-wire I2C and HDQ single-wire communication interfaces with host system SHA-1/HMAC Authentication One- or four-LED direct display control Five-LED and higher display through port expander Reduced power modes (typical battery pack operating range conditions) – NORMAL operation: < 140-µA average – SLEEP: < 64-µA average – FULL SLEEP: < 19 -µA average Package: 14-pin TSSOP Light electric vehicles Medical instrumentation Mobile radios Power tools Uninterruptible power supplies (UPS) 3 Description The Texas Instruments BQ34Z100 is a fuel gauge solution that works independently of battery series-cell configurations, and supports a wide range of Li-ion and LiFePO4 battery chemistries. Batteries from 3 V to 65 V can be supported through an external voltage translation circuit that can be controlled automatically to reduce system power consumption. The BQ34Z100 device provides several interface options, including an I2C slave, an HDQ slave, one or four direct LEDs, and an ALERT output pin. Additionally, the BQ34Z100 provides support for an external port expander for more than four LEDs. Device Information PART NUMBER BQ34Z100 (1) (1) PACKAGE BODY SIZE (NOM) TSSOP (14) 5.00 mm × 4.40 mm For all available packages, see the orderable addendum at the end of the data sheet. Simplified Schematic An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA. BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 Table of Contents 1 Features............................................................................1 2 Applications..................................................................... 1 3 Description.......................................................................1 4 Revision History.............................................................. 2 5 Pin Configuration and Functions...................................3 6 Specifications.................................................................. 4 6.1 Absolute Maximum Ratings........................................ 4 6.2 ESD Ratings............................................................... 4 6.3 Recommended Operating Conditions.........................4 6.4 Thermal Information....................................................5 6.5 Electrical Characteristics: Power-On Reset................ 5 6.6 Electrical Characteristics: LDO Regulator...................5 6.7 Electrical Characteristics: Internal Temperature Sensor Characteristics.................................................. 5 6.8 Electrical Characteristics: Low-Frequency Oscillator....................................................................... 6 6.9 Electrical Characteristics: High-Frequency Oscillator....................................................................... 6 6.10 Electrical Characteristics: Integrating ADC (Coulomb Counter) Characteristics............................... 6 6.11 Electrical Characteristics: ADC (Temperature and Cell Measurement) Characteristics........................ 6 6.12 Electrical Characteristics: Data Flash Memory Characteristics...............................................................7 6.13 Timing Requirements: HDQ Communication............ 7 6.14 Timing Requirements: I2C-Compatible Interface...... 8 6.15 Typical Characteristics.............................................. 9 7 Detailed Description......................................................10 7.1 Overview................................................................... 10 7.2 Feature Description...................................................11 7.3 Device Functional Modes..........................................39 8 Application and Implementation.................................. 40 8.1 Typical Applications.................................................. 40 9 Power Supply Recommendations................................49 10 Layout...........................................................................50 10.1 Layout Guidelines................................................... 50 10.2 Layout Example...................................................... 50 11 Device and Documentation Support..........................53 11.1 Documentation Support.......................................... 53 11.2 Receiving Notification of Documentation Updates.. 53 11.3 Support Resources................................................. 53 11.4 Trademarks............................................................. 53 11.5 Electrostatic Discharge Caution.............................. 53 11.6 Glossary.................................................................. 53 12 Mechanical, Packaging, and Orderable Information.................................................................... 53 4 Revision History NOTE: Page numbers for previous revisions may differ from page numbers in the current version. Changes from Revision B (December 2012) to Revision C (May 2021) Page • Changed document format per updated Texas Instruments standards, as well as updated SRP and SRN pins throughout the document....................................................................................................................................1 • Changed Ground System ................................................................................................................................ 50 • Changed Board Offset Considerations ............................................................................................................ 51 Changes from Revision A (September 2012) to Revision B (December 2012) Page • Changed Absolute Maximum Ratings ............................................................................................................... 4 • Changed Section 6.3 ......................................................................................................................................... 4 • Changed Section 7.2.15.3 ............................................................................................................................... 38 • Changed SLEEP Mode ....................................................................................................................................39 • Changed FULL SLEEP Mode ..........................................................................................................................39 • Changed STEP 3..............................................................................................................................................44 2 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 5 Pin Configuration and Functions P2 1 14 P3/SDA VEN 2 13 P4/SCL P1 3 12 P5/HDQ BAT 4 11 P6/TS CE 5 10 SRN REGIN 6 9 SRP REG25 7 8 VSS Not to scale Table 5-1. Pin Functions PIN NAME NUMBER I/O DESCRIPTION P2 1 O LED 2 or Not Used (connect to Vss) VEN 2 O Active High Voltage Translation Enable. This signal is optionally used to switch the input voltage divider on/off to reduce the power consumption (typ 45 µA) of the divider network. If not used, then this pin can be left floating or tied to Vss. P1 3 O LED 1 or Not Used (connect to Vss). This pin is also used to drive an LED for single-LED mode. Use a small signal N-FET (Q1) in series with the LED as shown on Figure 8-4. BAT 4 I Translated Battery Voltage Input CE 5 I Chip Enable. Internal LDO is disconnected from REGIN when driven low. REGIN 6 P Internal integrated LDO input. Decouple with a 0.1-µF ceramic capacitor to Vss. REG25 7 P 2.5-V Output voltage of the internal integrated LDO. Decouple with 1-µF ceramic capacitor to Vss. VSS 8 P Device ground SRP 9 I Analog input pin connected to the internal coulomb-counter peripheral for integrating a small voltage between SRP and SRN where SRP is nearest the BAT– connection. SRN 10 I Analog input pin connected to the internal coulomb-counter peripheral for integrating a small voltage between SRP and SRN where SRN is nearest the PACK– connection. P6/TS 11 I Pack thermistor voltage sense (use 103AT-type thermistor) P5/HDQ 12 I/O Open drain HDQ Serial communication line (slave). If not used, then this pin can be left floating or tied to Vss. P4/SCL 13 I Slave I2C serial communication clock input. Use with a 10-KΩ pull-up resistor (typical). This pin is also used for LED 4 in the four-LED mode. If not used, then this pin can be left floating or tied to Vss. P3/SDA 14 I/O Open drain slave I2C serial communication data line. Use with a 10-kΩ pull-up resistor (typical). This pin is also used for LED 3 in the four-LED mode. If not used, then this pin can be left floating or tied to Vss. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 3 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 6 Specifications 6.1 Absolute Maximum Ratings Over operating free-air temperature range (unless otherwise noted)(1) MIN MAX UNIT Regulator Input Range –0.3 5.5 V VCC Supply Voltage Range –0.3 2.75 V VIOD Open-drain I/O pins (SDA, SCL, HDQ, VEN) –0.3 5.5 V VREGIN VBAT Bat Input pin –0.3 5.5 V VI Input Voltage range to all other pins (P1, P2, SRP, SRN) –0.3 VCC + 0.3 V 1.5 kV 2 kV Human-body model (HBM), BAT pin ESD Human-body model (HBM), all other pins TA Operating free-air temperature range –40 85 °C TF Functional temperature range –40 100 °C Storage temperature range –65 150 °C Lead temperature (soldering, 10 s) –40 100 °C TSTG (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. 6.2 ESD Ratings VALUE V(ESD) (1) (2) Electrostatic discharge Human body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) UNIT ±2000 Charged device model (CDM), per JEDEC specification JESD22-C101(2) V ±500 JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.3 Recommended Operating Conditions TA =–40°C to 85°C; Typical Values at TA = 25°C CLDO25 = 1.0 µF, and VREGIN = 3.6 V (unless otherwise noted) MIN 4 No operating restrictions NOM MAX UNIT 2.7 4.5 V 2.45 2.7 V VREGIN Supply Voltage CREGIN External input capacitor for internal LDO between REGIN and VSS CLDO25 External output capacitor for internal LDO between VCC and VSS ICC NORMAL operating-mode current Gas Gauge in NORMAL mode, ILOAD > Sleep Current ISLP SLEEP operating-mode current Gas Gauge in SLEEP mode, ILOAD < Sleep Current 64 μA ISLP+ FULLSLEEP operating-mode current Gas Gauge in FULL SLEEP mode, ILOAD < Sleep Current 19 μA VOL Output voltage, low (SCL, SDA, HDQ, VEN) IOL = 3 mA VOH(PP) Output voltage, high IOH = –1 mA VOH(OD) Output voltage, high (SDA, SCL, External pull-up resistor connected to VCC HDQ, VEN) VIL Input voltage, low No FLASH writes Nominal capacitor values specified. Recommend a 10% ceramic X5R type capacitor located close to the device. μF 1 μF 0.47 140 μA 0.4 V VCC – 0.5 V VCC – 0.5 V –0.3 Submit Document Feedback 0.1 0.6 V Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 6.3 Recommended Operating Conditions (continued) TA =–40°C to 85°C; Typical Values at TA = 25°C CLDO25 = 1.0 µF, and VREGIN = 3.6 V (unless otherwise noted) MIN VIH(OD) Input voltage, high (SDA, SCL, HDQ) VA1 NOM MAX UNIT 1.2 6 V Input voltage range (TS) VSS – 0.05 1 V VA2 Input voltage range (BAT) VSS – 0.125 5 V VA3 Input voltage range (SRP, SRN) VSS – 0.125 0.125 V ILKG Input leakage current (I/O pins) tPUCD Power-up communication delay 0.3 μA 250 ms 6.4 Thermal Information BQ34Z100 THERMAL METRIC(1) TSSOP (PW) UNIT 14 PINS RθJA, High K Junction-to-ambient thermal resistance 103.8 RθJC(top) Junction-to-case(top) thermal resistance 31.9 RθJB Junction-to-board thermal resistance 46.6 ψJT Junction-to-top characterization parameter 2.0 ψJB Junction-to-board characterization parameter 45.9 RθJC(bottom) Junction-to-case(bottom) thermal resistance N/A (1) °C/W For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics Application Report, SPRA953. 6.5 Electrical Characteristics: Power-On Reset TA = –40°C to 85°C; Typical Values at TA = 25°C and VREGIN = 3.6 V (unless otherwise noted) PARAMETER TEST CONDITIONS VIT+ Positive-going battery voltage input at REG25 VHYS Power-on reset hysteresis MIN TYP MAX UNIT 2.05 2.20 2.31 V 45 115 185 mV MIN TYP 2.5 6.6 Electrical Characteristics: LDO Regulator TA = 25°C, CLDO25 = 1.0 µF, VREGIN = 3.6 V (unless otherwise noted)(1) PARAMETER VREG25 ISHORT (2) (1) (2) TEST CONDITIONS Regulator output voltage Short Circuit Current Limit 2.7 V ≤ VREGIN ≤ 4.5 V, IOUT ≤ 16 mA TA= –40°C to 85°C 2.3 2.45 V ≤ VREGIN < 2.7 V (low battery), IOUT ≤ 3 mA TA = –40°C to 85°C 2.3 VREG25 = 0 V TA = –40°C to 85°C MAX UNIT 2.7 V 250 mA LDO output current, IOUT, is the sum of internal and external load currents. Specified by design. Not production tested. 6.7 Electrical Characteristics: Internal Temperature Sensor Characteristics TA = –40°C to 85°C, 2.4 V < REG25 < 2.6 V; Typical Values at TA = 25°C and REG25 = 2.5 V (unless otherwise noted) PARAMETER GTEMP TEST CONDITIONS Temperature sensor voltage gain MIN TYP –2 MAX UNIT mV/°C Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 5 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 6.8 Electrical Characteristics: Low-Frequency Oscillator TA = –40°C to 85°C, 2.4 V < REG25 < 2.6 V; Typical Values at TA = 25°C and REG25 = 2.5 V (unless otherwise noted) PARAMETER f(LOSC) t(LSXO) MIN Operating frequency Start-up TYP MAX UNIT 32.768 Frequency error(1) (2) f(LEIO) (1) (2) (3) TEST CONDITIONS kHz TA = 0°C to 60°C –1.5% 0.25% 1.5% TA = –20°C to 70°C –2.5% 0.25% 2.5% TA = –40°C to 85°C –4% 0.25% 4% time(3) 500 μs The frequency drift is included and measured from the trimmed frequency at VCC = 2.5 V, TA = 25°C. The frequency error is measured from 32.768 kHz. The startup time is defined as the time it takes for the oscillator output frequency to be ±3%. 6.9 Electrical Characteristics: High-Frequency Oscillator TA = –40°C to 85°C, 2.4 V < REG25 < 2.6 V; Typical Values at TA = 25°C and REG25 = 2.5 V (unless otherwise noted) PARAMETER TEST CONDITIONS f(OSC) Operating frequency f(EIO) Frequency error(1) (2) TYP MAX UNIT 8.389 MHz TA = 0°C to 60°C –2% 0.38% TA = –20°C to 70°C –3% 0.38% 3% TA = –40°C to 85°C –4.5% 0.38% 4.5% 2.5 5 Start-up time(2) t(SXO) (1) (2) MIN 2% ms The frequency error is measured from 2.097 MHz. The startup time is defined as the time it takes for the oscillator output frequency to be ±3%. 6.10 Electrical Characteristics: Integrating ADC (Coulomb Counter) Characteristics TA = –40°C to 85°C, 2.4 V < REG25 < 2.6 V; Typical Values at TA = 25°C and REG25 = 2.5 V (unless otherwise noted) PARAMETER V(SR) tSR_CONV TEST CONDITIONS Input voltage range, V(SRN) and V(SRP) V(SR) = V(SRN) – V(SRP) Conversion time Single conversion Resolution Input offset INL Integral nonlinearity error ZIN(SR) Effective input resistance(1) (1) (2) Input leakage TYP MAX UNIT 0.125 V 1 14 VOS(SR) Ilkg(SR) MIN –0.125 s 15 bits 10 ±0.007% µV ±0.034% FSR(2) 2.5 MΩ current(1) 0.3 µA Specified by design. Not tested in production. Full-scale reference 6.11 Electrical Characteristics: ADC (Temperature and Cell Measurement) Characteristics TA = –40°C to 85°C, 2.4 V < REG25 < 2.6 V; Typical Values at TA = 25°C and REG25 = 2.5 V (unless otherwise noted) PARAMETER VIN(ADC) tADC_CONV VOS(ADC) ZADC1 ZADC2 TEST CONDITIONS Input voltage range TYP Resolution 14 Input offset Effective input resistance 1 (TS)(1) Effective input resistance (BAT)(1) BQ34Z100 not measuring cell voltage Submit Document Feedback MAX UNIT 1 Conversion time BQ34Z100 measuring cell voltage 6 MIN 0.05 V 125 ms 15 bits mV 8 MΩ 8 MΩ 100 KΩ Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 6.11 Electrical Characteristics: ADC (Temperature and Cell Measurement) Characteristics (continued) TA = –40°C to 85°C, 2.4 V < REG25 < 2.6 V; Typical Values at TA = 25°C and REG25 = 2.5 V (unless otherwise noted) PARAMETER Ilkg(ADC) (1) TEST CONDITIONS Input leakage MIN TYP current(1) MAX UNIT 0.3 µA Specified by design. Not tested in production. 6.12 Electrical Characteristics: Data Flash Memory Characteristics TA = –40°C to 85°C, 2.4 V < REG25 < 2.6 V; Typical Values at TA = 25°C and REG25 = 2.5 V (unless otherwise noted) PARAMETER tDR ICCPROG MIN TYP cycles(1) Years 20,000 Cycles Word programming time(1) Flash-write supply MAX UNIT 10 Flash-programming write tWORDPROG (1) TEST CONDITIONS Data retention(1) current(1) 5 2 ms 10 mA Specified by design. Not tested in production. 6.13 Timing Requirements: HDQ Communication TA = –40°C to 85°C, CREG = 1.0 μF, 2.45 V < VREGIN = VBAT < 5.5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise noted) PARAMETER t(CYCH) TEST CONDITIONS MIN Cycle time, host to BQ34Z100 190 t(CYCD) Cycle time, BQ34Z100 to host 190 t(HW1) Host sends 1 to BQ34Z100 0.5 NOM MAX UNIT μs 205 250 μs 50 μs t(DW1) BQ34Z100 sends 1 to host 32 50 μs t(HW0) Host sends 0 to BQ34Z100 86 145 μs t(DW0) BQ34Z100 sends 0 to host 80 145 μs t(RSPS) Response time, BQ34Z100 to host 190 950 μs t(B) Break time 190 μs t(BR) Break recovery time 40 μs t(RISE) HDQ line rising time to logic 1 (1.2 V) t(RST) HDQ Reset 1.8 950 ns 2.2 s Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 7 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 1.2V t(BR) t(B) t(RISE) (b) HDQ line rise time (a) Break and Break Recovery t(DW1) t(HW1) t(DW0) t(CYCD) t(HW0) t(CYCH) (d) Gauge Transmitted Bit (c) Host Transmitted Bit 1-bit R/W 7-bit address Break 8-bit data t(RSPS) (e) Gauge to Host Response Figure 6-1. Timing Diagrams 6.14 Timing Requirements: I2C-Compatible Interface TA = –40°C to 85°C, CREG = 0.47 μF, 2.45 V < VREGIN = VBAT < 5.5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise noted) PARAMETER tr TEST CONDITIONS MIN NOM SCL/SDA rise time tf SCL/SDA fall time tw(H) SCL pulse width (high) tw(L) tsu(STA) MAX UNIT 300 ns 300 ns 600 ns SCL pulse width (low) 1.3 μs Setup for repeated start 600 ns td(STA) Start to first falling edge of SCL 600 ns tsu(DAT) Data setup time 100 ns th(DAT) Data hold time tsu(STOP) Setup time for stop tBUF Bus free time between stop and start fSCL Clock frequency 0 ns 600 ns 66 μs 400 tSU(STA) tw(H) tf tw(L) tr kHz t(BUF) SCL SDA td(STA) tsu(STOP) tf tr th(DAT) tsu(DAT) REPEATED START STOP START Figure 6-2. I2C-Compatible Interface Timing Diagrams 8 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 6.15 Typical Characteristics 15 200 160 120 Voltage Error (mV) Total Battery Voltage Voltage Error (mV) 10 5 0 -5 -10 80 40 0 -40 -80 -120 -15 -40qC -20qC -20 2800 3000 25qC 65qC 3200 -200 25.2 3400 3600 3800 Battery Voltage (mV) 4000 4200 2 20 1 30.6 32.4 34.2 Battery Voltage (V) 36 37.8 39.6 D002 0 Temperature Error (qC) 15 Current Error (mA) 28.8 85°C Figure 6-4. V(Err) Across VIN (0 mA) 9 s D001 25 10 5 0 -5 -10 -15 -25 -3000 27 25°C 65°C 4400 Figure 6-3. V(Err) Across VIN (0 mA) -20 -40°C -20°C -160 85qC -1 -2 -3 -4 -5 -6 -7 -40qC -20qC -2000 25qC 65qC -1000 85qC 0 1000 Current (mA) -8 2000 3000 -9 -40 -20 D003 Figure 6-5. I(Err) 0 20 40 Temperature (qC) 60 80 100 D004 Figure 6-6. T(Err) Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 9 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 7 Detailed Description 7.1 Overview The BQ34Z100 device accurately predicts the battery capacity and other operational characteristics of a single cell or multiple rechargeable cell blocks, which are voltage balanced when resting. The device supports various Li-ion and LiFePO4 chemistries, and can be interrogated by a host processor to provide cell information, such as remaining capacity, full charge capacity, and average current. Information is accessed through a series of commands called Standard Data Commands (see Section 7.2.1.1). Further capabilities are provided by the additional Extended Data Commands set (see Section 7.2.2). Both sets of commands, indicated by the general format Command(), are used to read and write information contained within the BQ34Z100 device’s control and status registers, as well as its data flash locations. Commands are sent from host to gauge using the BQ34Z100 serial communications engines, HDQ and I2C, and can be executed during application development, pack manufacture, or end-equipment operation. Cell information is stored in the BQ34Z100 in non-volatile flash memory. Many of these data flash locations are accessible during application development and pack manufacture. They cannot, generally, be accessed directly during end-equipment operation. Access to these locations is achieved by using the BQ34Z100 device’s companion evaluation software, through individual commands, or through a sequence of data-flash-access commands. To access a desired data flash location, the correct data flash subclass and offset must be known. The BQ34Z100 provides 32 bytes of user-programmable data flash memory. This data space is accessed through a data flash interface. For specifics on accessing the data flash, refer to Section 7.2.3. The key to the BQ34Z100 device’s high-accuracy gas gauging prediction is Texas Instrument’s proprietary Impedance Track algorithm. This algorithm uses voltage measurements, characteristics, and properties to create state-of-charge predictions that can achieve accuracy with as little as 1% error across a wide variety of operating conditions. The BQ34Z100 measures charge/discharge activity by monitoring the voltage across a small-value series sense resistor connected in the low side of the battery circuit. When an application’s load is applied, cell impedance is measured by comparing its Open Circuit Voltage (OCV) with its measured voltage under loading conditions. The BQ34Z100 can use an NTC thermistor (default is Semitec 103AT or Mitsubishi BN35-3H103FB-50) for temperature measurement, or can also be configured to use its internal temperature sensor. The BQ34Z100 uses temperature to monitor the battery-pack environment, which is used for fuel gauging and cell protection functionality. To minimize power consumption, the BQ34Z100 has three power modes: NORMAL, SLEEP, and FULL SLEEP. The BQ34Z100 passes automatically between these modes, depending upon the occurrence of specific events. Multiple modes are available for configuring from one to 16 LEDs as an indicator of remaining state of charge. More than four LEDs require the use of one or two inexpensive SN74HC164 shift register expanders. A SHA-1/HMAC-based battery pack authentication feature is also implemented on the BQ34Z100. When the IC is in UNSEALED mode, authentication keys can be (re)assigned. A scratch pad area is used to receive challenge information from a host and to export SHA-1/HMAC encrypted responses. See Section 7.2.14.1 for further details. 10 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 Note Formatting conventions in this document: Commands: italics with parentheses and no breaking spaces; for example, RemainingCapacity(). Data Flash: italics, bold, and breaking spaces; for example, Design Capacity. Register Bits and Flags: brackets only; for example, [TDA] Data Flash Bits: italic and bold; for example, [LED1] Modes and states: ALL CAPITALS; for example, UNSEALED mode. 7.2 Feature Description 7.2.1 Data Commands 7.2.1.1 Standard Data Commands The BQ34Z100 uses a series of 2-byte standard commands to enable host reading and writing of battery information. Each standard command has an associated command-code pair, as indicated in Table 7-1. Because each command consists of two bytes of data, two consecutive HDQ/I2C transmissions must be executed to initiate the command function and to read or write the corresponding two bytes of data. Standard commands are accessible in NORMAL operation. Also, two block commands are available to read Manufacturer Name and Device Chemistry. Read/Write permissions depend on the active access mode. Table 7-1. Commands NAME COMMAND CODE Control() CNTL 0x00/0x01 StateOfCharge() SOC RemainingCapacity() RM FullChargeCapacity() Voltage() UNIT SEALED ACCESS UNSEALED ACCESS N/A R/W R/W 0x02/0x03 % R R 0x04/0x05 mAh R R FCC 0x06/0x07 mAh R R VOLT 0x08/0x09 mV R R AverageCurrent() AI 0x0A/0x0B mA R R Temperature() TEMP 0x0C/0x0D 0.1 K R R Flags() FLAGS 0x0E/0x0F N/A R R Mfr Date DATE 0x6B/0x6C N/A R R Mfr Name Length NAMEL 0x6D N/A R R Mfr Name NAME 0x6E – 0x78 N/A R R Device Chemistry Length CHEML 0x79 N/A R R Device Chemistry CHEM 0x7A – 0x7D N/A R R Serial Number SERNUM 0x7E/0x7F N/A R R 7.2.1.2 Control(): 0x00/0x01 Issuing a Control() command requires a subsequent two-byte subcommand. These additional bytes specify the particular control function desired. The Control() command allows the host to control specific features of the BQ34Z100 during normal operation, and additional features when the BQ34Z100 is in different access modes, as described in Table 7-2. Table 7-2. Control() Subcommands CNTL FUNCTION CNTL DATA SEALED ACCESS DESCRIPTION CONTROL_STATUS 0x0000 Yes Reports the status of DF Checksum, IT, for example. DEVICE_TYPE 0x0001 Yes Reports the device type of 0x0541 (indicating BQ34Z100) FW_VERSION 0x0002 Yes Reports the firmware version on the device type Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 11 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 Table 7-2. Control() Subcommands (continued) CNTL FUNCTION CNTL DATA HW_VERSION 0x0003 SEALED ACCESS Yes DESCRIPTION Reports the hardware version of the device type RESET_DATA 0x0005 No Returns reset data PREV_MACWRITE 0x0007 No Returns previous MAC command code CHEM_ID 0x0008 Yes Reports the chemical identifier of the Impedance Track configuration BOARD_OFFSET 0x0009 No Forces the device to measure and store the board offset CC_OFFSET 0x000A No Forces the device to measure the internal CC offset CC_OFFSET_SAVE 0x000B No Forces the device to store the internal CC offset DF_VERSION 0x000C Yes Reports the data flash version on the device SET_FULLSLEEP 0x0010 No Set the [FULLSLEEP] bit in the control register to 1 STATIC_CHEM_CHKSUM 0x0017 Yes Calculates chemistry checksum CURRENT 0x0018 Yes Returns the instantaneous current measured by the gauge SEALED 0x0020 No Places the device in SEALED access mode IT_ENABLE 0x0021 No Enables the Impedance Track algorithm CAL_ENABLE 0x002D No Toggle CALIBRATION mode RESET 0x0041 No Forces a full reset of the BQ34Z100 EXIT_CAL 0x0080 No Exit CALIBRATION mode ENTER_CAL 0x0081 No Enter CALIBRATION mode OFFSET_CAL 0x0082 No Reports internal CC offset in CALIBRATION mode 7.2.1.2.1 CONTROL_STATUS: 0x0000 Instructs the fuel gauge to return status information to Control addresses 0x00/0x01. The status word includes the following information. Table 7-3. CONTROL_STATUS Flags Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 High Byte — FAS SS CALMODE CCA BCA CSV — Low Byte — — FULLSLEEP SLEEP LDMD RUP_DIS VOK QEN Legend: RSVD = Reserved FAS: Status bit that indicates the BQ34Z100 is in FULL ACCESS SEALED state. Active when set. SS: Status bit that indicates the BQ34Z100 is in the SEALED state. Active when set. CALMODE: Status bit that indicates the BQ34Z100 calibration function is active. True when set. Default is 0. CCA: Status bit that indicates the BQ34Z100 Coulomb Counter Calibration routine is active. Active when set. BCA: Status bit that indicates the BQ34Z100 Board Calibration routine is active. Active when set. CSV: Status bit that indicates a valid data flash checksum has been generated. Active when set. FULLSLEEP: Status bit that indicates the BQ34Z100 is in FULL SLEEP mode. True when set. The state can only be detected by monitoring the power used by the BQ34Z100 because any communication will automatically clear it. SLEEP: Status bit that indicates the BQ34Z100 is in SLEEP mode. True when set. LDMD: Status bit that indicates the BQ34Z100 Impedance Track algorithm using constant-power mode. True when set. Default is 0 (CONSTANT CURRENT mode). RUP_DIS: Status bit that indicates the BQ34Z100 Ra table updates are disabled. True when set. VOK: Status bit that indicates cell voltages are OK for Qmax updates. True when set. QEN: Status bit that indicates the BQ34Z100 Qmax updates are enabled. True when set. 7.2.1.2.2 DEVICE TYPE: 0x0001 Instructs the fuel gauge to return the device type to addresses 0x00/0x01. 12 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 7.2.1.2.3 FW_VERSION: 0x0002 Instructs the fuel gauge to return the firmware version to addresses 0x00/0x01. 7.2.1.2.4 HW_VERSION: 0x0003 Instructs the fuel gauge to return the hardware version to addresses 0x00/0x01. 7.2.1.2.5 RESET_DATA: 0x0005 Instructs the fuel gauge to return the number of resets performed to addresses 0x00/0x01. 7.2.1.2.6 PREV_MACWRITE: 0x0007 Instructs the fuel gauge to return the previous command written to addresses 0x00/0x01. The value returned is limited to less than 0x0020. 7.2.1.2.7 CHEM ID: 0x0008 Instructs the fuel gauge to return the chemical identifier for the Impedance Track configuration to addresses 0x00/0x01. 7.2.1.2.8 BOARD_OFFSET: 0x0009 Instructs the fuel gauge to calibrate board offset. During board offset calibration the [BCA] bit is set. 7.2.1.2.9 CC_OFFSET: 0x000A Instructs the fuel gauge to calibrate the coulomb counter offset. During calibration the [CCA] bit is set. 7.2.1.2.10 CC_OFFSET_SAVE: 0x000B Instructs the fuel gauge to save the coulomb counter offset after calibration. 7.2.1.2.11 DF_VERSION: 0x000C Instructs the fuel gauge to return the data flash version to addresses 0x00/0x01. 7.2.1.2.12 SET_FULLSLEEP: 0x0010 Instructs the fuel gauge to set the FULLSLEEP bit in the Control Status register to 1. This allows the gauge to enter the FULL SLEEP power mode after the transition to SLEEP power state is detected. In FULL SLEEP mode, less power is consumed by disabling an oscillator circuit used by the communication engines. For HDQ communication, one host message will be dropped. For I2C communications, the first I2C message will incur a 6-ms–8-ms clock stretch while the oscillator is started and stabilized. A communication to the device in FULL SLEEP will force the part back to the SLEEP mode. 7.2.1.2.13 STATIC_CHEM_DF_CHKSUM: 0x0017 Instructs the fuel gauge to calculate chemistry checksum as a 16-bit unsigned integer sum of all static chemistry data. The most significant bit (MSB) of the checksum is masked yielding a 15-bit checksum. This checksum is compared with the value stored in the data flash Static Chem DF Checksum. If the value matches, the MSB will be cleared to indicate a pass. If it does not match, the MSB will be set to indicate a failure. 7.2.1.2.14 SEALED: 0x0020 Instructs the fuel gauge to transition from UNSEALED state to SEALED state. The fuel gauge should always be set to SEALED state for use in customer’s end equipment. 7.2.1.2.15 IT ENABLE: 0x0021 Forces the fuel gauge to begin the Impedance Track algorithm, sets Bit 2 of UpdateStatus and causes the [VOK] and [QEN] flags to be set in the CONTROL STATUS register. [VOK] is cleared if the voltages are not suitable for a Qmax update. Once set, [QEN] cannot be cleared. This command is only available when the fuel gauge is UNSEALED and is typically enabled at the last step of production after the system test is completed. 7.2.1.2.16 RESET: 0x0041 Instructs the fuel gauge to perform a full reset. This command is only available when the fuel gauge is UNSEALED. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 13 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 7.2.1.2.17 EXIT_CAL: 0x0080 Instructs the fuel gauge to exit CALIBRATION mode. 7.2.1.2.18 ENTER_CAL: 0x0081 Instructs the fuel gauge to enter CALIBRATION mode. 7.2.1.2.19 OFFSET_CAL: 0x0082 Instructs the fuel gauge to perform offset calibration. 7.2.1.3 StateOfCharge(): 0x02/0x03 This read-only function returns an unsigned integer value of the predicted remaining battery capacity expressed as a percentage of FullChargeCapacity() with a range of 0 to 100%. 7.2.1.4 RemainingCapacity(): 0x04/0x05 This read-only command pair returns the compensated battery capacity remaining. Unit is 1 mAh per bit. 7.2.1.5 FullChargeCapacity(): 0x06/07 This read-only command pair returns the compensated capacity of the battery when fully charged. Unit is 1 mAh per bit except if X10 mode is selected. In X10 mode, units are 10 mAh per bit. with units of 1 mAh per bit. . FullChargeCapacity() is updated at regular intervals, as specified by the Impedance Track algorithm. 7.2.1.6 Voltage(): 0x08/0x09 This read-word function returns an unsigned integer value of the measured cell-pack voltage in mV with a range of 0 V to 65535 mV. 7.2.1.7 AverageCurrent(): 0x0A/0x0B This read-only command pair returns a signed integer value that is the average current flowing through the sense resistor. It is updated every 1 second. Unit is 1 mA per bit except if X10 mode is selected. In X10 mode, units are 10 mA per bit. with units of 1 mA per bit. 7.2.1.8 Temperature(): 0x0C/0x0D This read-word function returns an unsigned integer value of the temperature, in units of 0.1 K, measured by the gas gauge and has a range of 0 to 6553.5 K. The source of the measured temperature is configured by the [TEMPS] bit in the Pack Configuration register (see Section 7.2.2). Table 7-4. Temperature Sensor Selection TEMPS TEMPERATURE() SOURCE 0 Internal Temperature Sensor 1 TS Input (default) 7.2.1.9 Flags(): 0x0E/0x0F This read-word function returns the contents of the Gas Gauge Status register, depicting current operation status. Table 7-5. Flags Bit Definitions Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 High Byte OTC OTD BATHI BATLOW CHG_INH RSVD FC CHG Low Byte OCVTAKEN ISD TDD RSVD RSVD SOC1 SOCF DSG Legend: RSVD = Reserved OTC: Overtemperature in Charge condition is detected. True when set OTD: Overtemperature in Discharge condition is detected. True when set 14 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 BATHI: Battery High bit that indicates a high battery voltage condition. Refer to the data flash BATTERY HIGH parameters for threshold settings. BATLOW: Battery Low bit that indicates a low battery voltage condition. Refer to the data flash BATTERY LOW parameters for threshold settings. CHG_INH: Charge Inhibit: unable to begin charging. Refer to the data flash [Charge Inhibit Temp Low, Charge Inhibit Temp High] . True when set XCHG: Charging not allowed RSVD: Reserved FC: Full charge is detected. FC is set when charge termination is reached and FC Set% = –1 (see Section 7.2.10 for details) or StateOfCharge() is larger than FC Set% and FC Set% is not –1. True when set CHG: (Fast) charging allowed. True when set OCVTAKEN: Cleared on entry to RELAX mode and set to 1 when OCV measurement is performed in RELAX mode. ISD: Internal Short is detected. True when set. TDD = Tab Disconnect is detected. True when set SOC1: State-of-Charge Threshold 1 reached. True when set SOCF: State-of-Charge Threshold Final reached. True when set DSG: Discharging detected. True when set 7.2.2 Extended Data Commands Extended commands offer additional functionality beyond the standard set of commands. They are used in the same manner; however, unlike standard commands, extended commands are not limited to 2-byte words. The number of command bytes for a given extended command ranges in size from single to multiple bytes, as specified in Table 7-6. For details on the SEALED and UNSEALED states, refer to Section 7.2.3.3. Table 7-6. Extended Commands COMMAND CODE UNIT SEALED ACCESS(1) (2) UNSEALED ACCESS(1) (2) AR 0X10/0x11 mA R/W R/W NAME AtRate() Current() I 0X10/0x11 mA R R AtRateTimeToEmpty() ARTTE 0x12/0x13 Minutes R R NominalAvailableCapacity() NAC 0x14/0x15 mAh R R FullAvailableCapacity() FAC 0x16/0x17 mAh R R TimeToEmpty() TTE 0x18/0x19 Minutes R R TimeToFull() TTF 0x1A/0x1B Minutes R R StandbyCurrent() SI 0x1C/0x1D mA R R StandbyTimeToEmpty() STTE 0x1E/0x1F Minutes R R MaxLoadCurrent() MLI 0x20/0x21 mA R R MaxLoadTimeToEmpty() MLTTE 0x22/0x23 Minutes R R AvailableEnergy() AE 0x24/0x25 10 mW/h R R AveragePower() AP 0x26/0x27 10 mW R R TTEatConstantPower() TTECP 0x28/0x29 Minutes R R Internal_Temp() INTTEMP 0x2A/0x2B 0.1 K R R CycleCount() CC 0x2C/0x2D Counts R R StateOfHealth() SOH 0x2E/0x2F % R R ChargeVoltage() CHGV 0x30/0x31 mV R R ChargeCurrent() CHGI 0x32/0x33 mA R R PassedCharge() PCHG 0x34/0x35 mAh R R DOD0() DOD0 0x36/0x37 HEX# R R SelfDischargeCurrent SDSG 0x38/0x39 mA R R PackConfiguration() PKCFG 0x3A/0x3B N/A R R DesignCapacity() DCAP 0x3C/0x3D mAh R R Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 15 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 Table 7-6. Extended Commands (continued) NAME COMMAND CODE UNIT SEALED ACCESS(1) (2) UNSEALED ACCESS(1) (2) DataFlashClass() (2) DFCLS 0x3E N/A N/A R/W DataFlashBlock() (2) DFBLK 0x3F N/A R/W R/W Authenticate()/BlockData() A/DF 0x40…0x53 N/A R/W R/W AuthenticateCheckSum()/BlockData() ACKS/DFD 0x54 N/A R/W R/W BlockData() DFD 0x55…0x5F N/A R R/W BlockDataCheckSum() DFDCKS 0x60 N/A R/W R/W (1) (2) BlockDataControl() DFDCNTL 0x61 N/A N/A R/W DeviceNameLength() DNAMELEN 0x62 N/A R R DeviceName() DNAME 0x63...0x69 N/A R R Reserved RSVD 0x6A...0x7F N/A R R SEALED and UNSEALED states are entered via commands to CNTL 0x00/0x01. In SEALED mode, data flash cannot be accessed through commands 0x3E and 0x3F. 7.2.2.1 AtRate(): 0X10/0x11 The AtRate() read-/write-word function is the first half of a two-function call-set used to set the AtRate value used in calculations made by the AtRateTimeToEmpty() function. The AtRate() units are in mA. The AtRate() value is a signed integer and both positive and negative values will be interpreted as a discharge current value. The AtRateTimeToEmpty() function returns the predicted operating time at the AtRate value of discharge. The default value for AtRate() is zero and will force AtRate() to return 65535. 7.2.2.2 AtRateTimeToEmpty(): 0x12/0x13 This read-word function returns an unsigned integer value of the predicted remaining operating time if the battery is discharged at the AtRate() value in minutes with a range of 0 to 65534. A value of 65535 indicates AtRate() = 0. The gas gauge updates AtRateTimeToEmpty() within 1s after the host sets the AtRate() value. The gas gauge automatically updates AtRateTimeToEmpty() based on the AtRate() value every 1 s. 7.2.2.3 Current(): 0x10/0x11 This read-only command pair returns a signed integer value that is the current flow through the sense resistor. It is updated every 1 second. Units are 1 mA per bit except if X10 mode is selected. In X10 mode, units are 10 mA per bit.with units of 1mA. However, if PackConfiguration [SCALED] is set then the units have been scaled through the calibration process. The actual scale is not set in the device and SCALED is just an indicator flag. 7.2.2.4 NominalAvailableCapacity(): 0x14/0x15 This read-only command pair returns the uncompensated (no or light load) battery capacity remaining. Unit is 1 mAh per bit. 7.2.2.5 FullAvailableCapacity(): 0x16/0x17 This read-only command pair returns the uncompensated (no or light load) capacity of the battery when fully charged. Unit is 1 mAh per bit. FullAvailableCapacity() is updated at regular intervals, as specified by the Impedance Track algorithm. 7.2.2.6 TimeToEmpty(): 0x18/0x19 This read-only function returns an unsigned integer value of the predicted remaining battery life at the present rate of discharge , in minutes. A value of 65535 indicates that the battery is not being discharged. 7.2.2.7 TimeToFull(): 0x1A/0x1B This read-only function returns an unsigned integer value of predicted remaining time until the battery reaches full charge, in minutes, based upon AverageCurrent(). The computation should account for the taper current time 16 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 extension from the linear TTF computation based on a fixed AverageCurrent() rate of charge accumulation. A value of 65535 indicates the battery is not being charged. 7.2.2.8 StandbyCurrent(): 0x1C/0x1D This read-only function returns a signed integer value of the measured standby current through the sense resistor. The StandbyCurrent() is an adaptive measurement. Initially, it reports the standby current programmed in Initial Standby, and after spending some time in standby, reports the measured standby current. The register value is updated every 1 second when the measured current is above the Deadband (3 mA default) and is less than or equal to 2 x Initial Standby. The first and last values that meet this criterion should not be averaged in, since they may not be stable values. To approximate a 1 minute time constant, each new StandbyCurrent() value is computed as follows: StandbyCurrent()NEW = (239/256) × StandbyCurrent()OLD + (17/256) × AverageCurrent() 7.2.2.9 StandbyTimeToEmpty(): 0x1E/0x1F This read-only function returns an unsigned integer value of the predicted remaining battery life at the standby rate of discharge, in minutes. The computation should use Nominal Available Capacity (NAC), the uncompensated remaining capacity, for this computation. A value of 65535 indicates battery is not being discharged. 7.2.2.10 MaxLoadCurrent(): 0x20/0x21 This read-only function returns a signed integer value, in units of mA, of the maximum load conditions. The MaxLoadCurrent() is an adaptive measurement which is initially it reports the maximum load current programmed in Initial Max Load Current. If the measured current is ever greater than Initial Max Load Current, then MaxLoadCurrent() updates to the new current. MaxLoadCurrent() is reduced to the average of the previous value and Initial Max Load Current whenever the battery is charged to full after a previous discharge to an SOC less than 50%. This prevents the reported value from maintaining an unusually high value. 7.2.2.11 MaxLoadTimeToEmpty(): 0x22/0x23 This read-only function returns an unsigned integer value of the predicted remaining battery life at the maximum load current discharge rate, in minutes. A value of 65535 indicates that the battery is not being discharged. 7.2.2.12 AvailableEnergy(): 0x24/0x25 This read-only function returns an unsigned integer value of the predicted charge or energy remaining in the battery. The value is reported in units of mWh. 7.2.2.13 AveragePower(): 0x26/0x27 This read-word function returns an unsigned integer value of the average power of the current discharge. A value of 0 indicates that the battery is not being discharged. The value is reported in units of mW. 7.2.2.14 TimeToEmptyAtConstantPower(): 0x28/0x29 This read-only function returns an unsigned integer value of the predicted remaining operating time if the battery is discharged at the AveragePower() value in minutes. A value of 65535 indicates AveragePower() = 0. The gas gauge automatically updates TimeToEmptyatContantPower() based on the AveragePower() value every 1s. 7.2.2.15 InternalTemp(): 0x2A/0x2B This read-only function returns an unsigned integer value of the measured internal temperature of the device, in units of 0.1 K, measured by the fuel gauge. 7.2.2.16 CycleCount(): 0x2C/0x2D This read-only function returns an unsigned integer value of the number of cycles the battery has experienced with a range of 0 to 65535. One cycle occurs when accumulated discharge ≥ CC Threshold. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 17 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 7.2.2.17 StateOfHealth(): 0x2E/0x2F This read-only function returns an unsigned integer value, expressed as a percentage of the ratio of predicted FCC (25°C, SOH current rate) over the DesignCapacity(). The FCC (25°C, SOH current rate) is the calculated full charge capacity at 25°C and the SOH current rate that is specified in the data flash (State of Health Load). The range of the returned SOH percentage is 0x00 to 0x64, indicating 0% to 100%, correspondingly. 7.2.2.18 ChargeVoltage(): 0x30/0x31 This unsigned integer indicates the recommended charging voltage. 7.2.2.19 ChargeCurrent(): 0x32/0x33 This signed integer indicates the recommended charging current. 7.2.2.20 PassedCharge(): 0x34/0x35 This signed integer indicates the amount of charge passed through the sense resistor since the last IT simulation in mAh. 7.2.2.21 DOD0(): 0x36/0x37 This unsigned integer indicates the depth of discharge during the most recent OCV reading. 7.2.2.22 SelfDischargeCurrent(): 0x38/0x39 This read-only command pair returns a signed integer value that estimates the battery self discharge current. 7.2.2.23 PackConfiguration(): 0x3A/0x3B This read-word function allows the host to read the configuration of selected features of the device pertaining to various features. Refer to Section 7.2.6.15. 7.2.2.24 DesignCapacity(): 0x3C/0x3D SEALED and UNSEALED Access: This command returns theoretical or nominal capacity of a new pack. The value is stored in Design Capacity and is expressed in mAh. 7.2.2.25 DataFlashClass(): 0x3E UNSEALED Access: This command sets the data flash class to be accessed. The class to be accessed should be entered in hexadecimal. SEALED Access: This command is not available in SEALED mode. 7.2.2.26 DataFlashBlock(): 0x3F UNSEALED Access: If BlockDataControl has been set to 0x00, this command directs which data flash block will be accessed by the BlockData() command. Writing a 0x00 to DataFlashBlock() specifies the BlockData() command will transfer authentication data. Issuing a 0x01 instructs the BlockData() command to transfer Manufacturer Data. SEALED Access: This command directs which data flash block will be accessed by the BlockData() command. Writing a 0x00 to DataFlashBlock() specifies that the BlockData() command will transfer authentication data. Issuing a 0x01 instructs the BlockData() command to transfer Manufacturer Data. 7.2.2.27 AuthenticateData/BlockData(): 0x40…0x53 UNSEALED Access: This data block has a dual function: It is used for the authentication challenge and response and is part of the 32-byte data block when accessing data flash. SEALED Access: This data block has a dual function: It is used for authentication challenge and response, and is part of the 32-byte data block when accessing the Manufacturer Data. 7.2.2.28 AuthenticateChecksum/BlockData(): 0x54 UNSEALED Access: This byte holds the authentication checksum when writing the authentication challenge to the device, and is part of the 32-byte data block when accessing data flash. 18 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 SEALED Access: This byte holds the authentication checksum when writing the authentication challenge to the device, and is part of the 32-byte data block when accessing Manufacturer Data. 7.2.2.29 BlockData(): 0x55…0x5F UNSEALED Access: This data block is the remainder of the 32-byte data block when accessing data flash. SEALED Access: This data block is the remainder of the 32-byte data block when accessing Manufacturer Data. 7.2.2.30 BlockDataChecksum(): 0x60 UNSEALED Access: This byte contains the checksum on the 32 bytes of block data read or written to data flash. SEALED Access: This byte contains the checksum for the 32 bytes of block data written to Manufacturer Data. 7.2.2.31 BlockDataControl(): 0x61 UNSEALED Access: This command is used to control data flash ACCESS mode. Writing 0x00 to this command enables BlockData() to access general data flash. Writing a 0x01 to this command enables the SEALED mode operation of DataFlashBlock(). 7.2.2.32 DeviceNameLength(): 0x62 UNSEALED and SEALED Access: This byte contains the length of the Device Name. 7.2.2.33 DeviceName(): 0x63…0x6A UNSEALED and SEALED Access: This block contains the device name that is programmed in Device Name. 7.2.3 Data Flash Interface 7.2.3.1 Accessing Data Flash The BQ34Z100 data flash is a non-volatile memory that contains BQ34Z100 initialization, default, cell status, calibration, configuration, and user information. The data flash can be accessed in several different ways, depending on in what mode the BQ34Z100 is operating and what data is being accessed. Commonly accessed data flash memory locations, frequently read by a host, are conveniently accessed through specific instructions described in Section 7.2.1. These commands are available when the BQ34Z100 is either in UNSEALED or SEALED modes. Most data flash locations, however, can only be accessible in UNSEALED mode by use of the BQ34Z100 evaluation software or by data flash block transfers. These locations should be optimized and/or fixed during the development and manufacture processes. They become part of a Golden Image File and can then be written to multiple battery packs. Once established, the values generally remain unchanged during end-equipment operation. To access data flash locations individually, the block containing the desired data flash location(s) must be transferred to the command register locations where they can be read to the host or changed directly. This is accomplished by sending the set-up command BlockDataControl() (code 0x61) with data 0x00. Up to 32 bytes of data can be read directly from the BlockData() command locations 0x40…0x5F, externally altered, then re-written to the BlockData() command space. Alternatively, specific locations can be read, altered, and re-written if their corresponding offsets are used to index into the BlockData() command space. Finally, the data residing in the command space is transferred to data flash, once the correct checksum for the whole block is written to BlockDataChecksum() (command number 0x60). Occasionally, a data flash CLASS will be larger than the 32-byte block size. In this case, the DataFlashBlock() command is used to designate which 32-byte block in which the desired locations reside. The correct command address is then given by 0x40 + offset modulo 32. For example, to access Terminate Voltage in the Gas Gauging class, DataFlashClass() is issued 80 (0x50) to set the class. Because the offset is 48, it must reside in the second 32-byte block. Hence, DataFlashBlock() is issued 0x01 to set the block offset, and the offset used to index into the BlockData() memory area is 0x40 + 48 modulo 32 = 0x40 + 16 = 0x40 + 0x10 = 0x50. For example to modify [VOLTSEL] in Pack Configuration from 0 to 1 to enable the external voltage measurement option. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 19 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 Reading and writing subclass data are block operations 32 bytes in length. Data can be written in shorter block sizes, however. Blocks can be shorter than 32 bytes in length. Writing these blocks back to data flash will not overwrite data that extend beyond the actual block length. Note None of the data written to memory is bounded by the BQ34Z100: The values are not rejected by the gas gauge. Writing an incorrect value may result in hardware failure due to firmware program interpretation of the invalid data. The data written is persistent, so a power-on reset resolves the fault. 7.2.3.2 Manufacturer Information Block The BQ34Z100 contains 32 bytes of user-programmable data flash storage: Manufacturer Info Block. The method for accessing these memory locations is slightly different, depending on if the device is in UNSEALED or SEALED modes. When in UNSEALED mode and when an “0x00” has been written to BlockDataControl(), accessing the Manufacturer Info Block is identical to accessing general data flash locations. First, a DataFlashClass() command is used to set the subclass, then a DataFlashBlock() command sets the offset for the first data flash address within the subclass. The BlockData() command codes contain the referenced data flash data. When writing the data flash, a checksum is expected to be received by BlockDataChecksum(). Only when the checksum is received and verified is the data actually written to data flash. As an example, the data flash location for Manufacturer Info Block is defined as having a Subclass = 58 and an Offset = 0 through 31 (32 byte block). The specification of Class = System Data is not needed to address Manufacturer Info Block, but is used instead for grouping purposes when viewing data flash info in the BQ34Z100 evaluation software. When in SEALED mode or when “0x01” BlockDataControl() does not contain “0x00”, data flash is no longer available in the manner used in UNSEALED mode. Rather than issuing subclass information, a designated Manufacturer Information Block is selected with the DataFlashBlock() command. Issuing a 0x01, 0x02, or 0x03 with this command causes the corresponding information block (A, B, or C, respectively) to be transferred to the command space 0x40…0x5F for editing or reading by the host. Upon successful writing of checksum information to BlockDataChecksum(), the modified block is returned to data flash. Note Manufacturer Info Block A is “read only” when in SEALED mode. 7.2.3.3 Access Modes The BQ34Z100 provides three security modes that control data flash access permissions according to Table 7-7. Public Access refers to those data flash locations specified in Table 7-8 that are accessible to the user. Private Access refers to reserved data flash locations used by the BQ34Z100 system. Care should be taken to avoid writing to Private data flash locations when performing block writes in FULL ACCESS mode by following the procedure outlined in Section 7.2.3.1. Table 7-7. Data Flash Access SECURITY MODE DF—PUBLIC ACCESS DF—PRIVATE ACCESS BOOTROM N/A N/A FULL ACCESS R/W R/W UNSEALED R/W R/W SEALED R N/A Although FULL ACCESS and UNSEALED modes appear identical, FULL ACCESS mode allows the BQ34Z100 to directly transition to BOOTROM mode and also write access keys. UNSEALED mode does not have these abilities. 20 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 7.2.3.4 Sealing/Unsealing Data Flash Access The BQ34Z100 implements a key-access scheme to transition between SEALED, UNSEALED, and FULL ACCESS modes. Each transition requires that a unique set of two keys be sent to the BQ34Z100 via the Control() command (these keys are unrelated to the keys used for SHA-1/HMAC authentication). The keys must be sent consecutively, with no other data being written to the Control() register in between. Note that to avoid conflict, the keys must be different from the codes presented in the CNTL DATA column of Table 7-2 subcommands. When in SEALED mode, the [SS] bit of Control Status() is set, but when the UNSEAL keys are correctly received by the BQ34Z100, the [SS] bit is cleared. When the full access keys are correctly received, then the Flags() [FAS] bit is cleared. Both sets of keys for each level are 2 bytes each in length and are stored in data flash. The UNSEAL key (stored at Unseal Key 0 and Unseal Key 1) and the FULL ACCESS key (stored at Full Access Key 0 and Full Access Key 1) can only be updated when in FULL ACCESS mode. The order of the bytes entered through the Control() command is the reverse of what is read from the part. For example, if the 1st and 2nd word of the UnSeal Key 0 returns 0x1234 and 0x5678, then Control() should supply 0x3412 and 0x7856 to unseal the part. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 21 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 7.2.4 Data Flash Summary Table 7-8 summarizes the data flash locations available to the user, including the default, minimum, and maximum values. Table 7-8. Data Flash Summary 22 CLASS SUBCLASS SUBCLASS ID Configuration Safety 2 0 Configuration Safety 2 2 Configuration Safety 2 3 I2 Configuration Safety 2 5 I2 Configuration Safety 2 7 U1 Configuration Safety 2 8 I2 Configuration Charge Inhibit Cfg 32 0 Configuration Charge Inhibit Cfg 32 Configuration Charge Inhibit Cfg Configuration Configuration Configuration NAME MIN MAX DEFAULT UNIT I2 OT Chg 0 1200 550 0.1°C U1 OT Chg Time 0 60 2 s OT Chg Recovery 0 1200 500 0.1°C OT Dsg 0 1200 600 0.1°C OT Dsg Time 0 60 2 s OT Dsg Recovery 0 1200 550 0.1°C I2 Chg Inhibit Temp Low –400 1200 0 0.1°C 2 I2 Chg Inhibit Temp High –400 1200 450 0.1°C 32 4 I2 Temp Hys 0 100 50 0.1°C Charge 34 0 I2 Suspend Low Temp –400 1200 –50 0.1°C Charge 34 2 I2 Suspend High Temp –400 1200 550 0.1°C Charge 34 4 U1 Pb EFF Efficiency 0 100 100 % 0.078125 0.0195312 5 % Configuration Charge 34 Configuration Charge Configuration Charge OFFSET TYPE 5 F4 Pb Temp Comp 0 34 9 U1 Pb Drop Off Percent 0 100 96 % 34 10 F4 Pb Reduction Rate 0 1.25 0.125 % Configuration Charge Termination 36 0 I2 Taper Current 0 1000 100 mA Configuration Charge Termination 36 2 I2 Min Taper Capacity 0 1000 25 mAh Configuration Charge Termination 36 4 I2 Cell Taper Voltage 0 1000 100 mV Configuration Charge Termination 36 6 U1 Current Taper Window 0 60 40 s Configuration Charge Termination 36 7 I1 TCA Set % –1 100 99 % Configuration Charge Termination 36 8 I1 TCA Clear % –1 100 95 % Configuration Charge Termination 36 9 I1 FC Set % –1 100 100 % Configuration Charge Termination 36 10 I1 FC Clear % –1 100 98 % Configuration Charge Termination 36 11 I2 DODatEOC Delta T 0 1000 100 0.1°C Configuration Charge Termination 36 13 I2 NiMH Delta Temp 0 255 30 0.1°C Configuration Charge Termination 36 15 U2 NiMH Delta Temp Time 0 1000 180 s Configuration Charge Termination 36 17 U2 NiMH Hold Off Time 0 1000 100 s Configuration Charge Termination 36 19 I2 NiMH Hold Off Current 0 32000 240 mA Configuration Charge Termination 36 21 I2 NiMH Hold Off Temp 0 1000 250 0.1°C Configuration Charge Termination 36 23 U1 NiMH Cell Negative Delta Volt 0 100 17 mV Configuration Charge Termination 36 24 U1 NiMH Cell Negative Delta Time 0 255 16 s Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 Table 7-8. Data Flash Summary (continued) CLASS SUBCLASS SUBCLASS ID Configuration Charge Termination 36 25 I2 NiMH Cell Neg Delta Qual Volt 0 32767 4200 mV Configuration Data 48 2 U2 Manufacture Date 0 65535 0 Day + Mo*32 + (Yr -1980)*256 Configuration Data 48 4 H2 Serial Number 0 ffff 1 hex Configuration Data 48 6 U2 Cycle Count 0 65535 0 Counts Configuration Data 48 8 I2 CC Threshold 100 32767 900 mAh Configuration Data 48 10 U1 Max Error Limit 0 100 100 % Configuration Data 48 11 I2 Design Capacity 0 32767 1000 mAh Configuration Data 48 13 I2 Design Energy 0 32767 5400 mWh Configuration Data 48 15 I2 SOH Load I –32767 0 –400 mA Configuration Data 48 17 U2 Cell Charge Voltage T1-T2 0 4600 4200 mV Configuration Data 48 19 U2 Cell Charge Voltage T2-T3 0 4600 4200 mV Configuration Data 48 21 U2 Cell Charge Voltage T3-T4 0 4600 4100 mV Configuration Data 48 23 U1 Charge Current T1-T2 0 100 10 % Configuration Data 48 24 U1 Charge Current T2-T3 0 100 50 % Configuration Data 48 25 U1 Charge Current T3-T4 0 100 30 % Configuration Data 48 26 I1 JEITA T1 –128 127 –10 °C Configuration Data 48 27 I1 JEITA T2 –128 127 10 °C Configuration Data 48 28 I1 JEITA T3 –128 127 45 °C Configuration Data 48 29 I1 JEITA T4 –128 127 55 °C Configuration Data 48 30 U1 Design Energy Scale 0 255 1 Num Configuration Data 48 31 S12 Device Name x x BQ34Z100 — Configuration Data 48 43 S12 Manufacturer Name x x Texas Inst. — Configuration Data 48 55 S5 Device Chemistry x x LION — Configuration Discharge 49 0 U2 SOC1 Set Threshold 0 65535 150 mAh Configuration Discharge 49 2 U2 SOC1 Clear Threshold 0 65535 175 mAh Configuration Discharge 49 4 U2 SOCF Set Threshold 0 65535 75 mAh Configuration Discharge 49 6 U2 SOCF Clear Threshold 0 65535 100 mAh Configuration Discharge 49 8 I2 Cell BL Set Volt Threshold 0 5000 0 mV Configuration Discharge 49 10 U1 Cell BL Set Volt Time 0 60 0 s Configuration Discharge 49 11 I2 Cell BL Clear Volt Threshold 0 5000 5 mV Configuration Discharge 49 13 I2 Cell BH Set Volt Threshold 0 5000 4300 mV Configuration Discharge 49 15 U1 Cell BH Volt Time 0 60 2 s Configuration Discharge 49 16 I2 Cell BH Clear Volt Threshold 0 5000 5 mV Configuration Discharge 49 21 U1 Cycle Delta 0 255 5 0.01% Configuration Manufacturer Data 56 0 H2 Pack Lot Code 0 ffff 0 hex Configuration Manufacturer Data 56 2 H2 PCB Lot Code 0 ffff 0 hex Configuration Manufacturer Data 56 4 H2 Firmware Version 0 ffff 0 hex Configuration Manufacturer Data 56 6 H2 Hardware Revision 0 ffff 0 hex Configuration Manufacturer Data 56 8 H2 Cell Revision 0 ffff 0 hex Configuration Manufacturer Data 56 10 H2 DF Config Version 0 ffff 0 hex Configuration Lifetime Data 59 0 I2 Lifetime Max Temp 0 1400 300 0.1°C Configuration Lifetime Data 59 2 I2 Lifetime Min Temp –600 1400 200 0.1°C Configuration Lifetime Data 59 4 I2 Lifetime Max Chg Current –32767 32767 0 mA OFFSET TYPE NAME MIN MAX DEFAULT UNIT Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 23 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 Table 7-8. Data Flash Summary (continued) 24 CLASS SUBCLASS SUBCLASS ID Configuration Lifetime Data 59 6 Configuration Lifetime Data 59 8 Configuration Lifetime Data 59 10 Configuration Lifetime Temp Samples 60 Configuration Registers Configuration Registers Configuration OFFSET TYPE NAME MIN MAX I2 Lifetime Max Dsg Current –32767 32767 0 mA U2 Lifetime Max Pack Voltage 0 65535 320 20 mV U2 Lifetime Min Pack Voltage 0 65535 350 20 mV 0 U2 LT Flash Cnt 0 65535 0 Counts 64 0 H2 Pack Configuration 0 ffff 161 flags 64 2 H1 Pack Configuration B 0 ff ff flags Registers 64 3 H1 Pack Configuration C 0 ff 30 flags Configuration Registers 64 4 H1 LED_Comm Configuration 0 ff 0 flags Configuration Registers 64 5 H2 Alert Configuration 0 ffff 0 flags Configuration Registers 64 7 U1 Number of series cell 0 100 1 Num Configuration Lifetime Resolution 66 0 U1 LT Temp Res 0 255 10 0.1°C Configuration Lifetime Resolution 66 1 U1 LT Cur Res 0 255 100 mA Configuration Lifetime Resolution 66 2 U1 LT V Res 0 255 1 20 mV Configuration Lifetime Resolution 66 3 U2 LT Update Time 0 65535 60 s Configuration LED Display 67 0 U1 LED Hold Time 0 255 4 Num Configuration Power 68 0 I2 Flash Update OK Cell Volt 0 4200 2800 mV Configuration Power 68 2 I2 Sleep Current 0 100 10 mA Configuration Power 68 11 U1 FS Wait 0 255 0 s System Data Manufacturer Info 58 0 H1 Block A 0 0 ff 0 hex System Data Manufacturer Info 58 1 H1 Block A 1 0 ff 0 hex System Data Manufacturer Info 58 2 H1 Block A 2 0 ff 0 hex System Data Manufacturer Info 58 3 H1 Block A 3 0 ff 0 hex System Data Manufacturer Info 58 4 H1 Block A 4 0 ff 0 hex System Data Manufacturer Info 58 5 H1 Block A 5 0 ff 0 hex System Data Manufacturer Info 58 6 H1 Block A 6 0 ff 0 hex System Data Manufacturer Info 58 7 H1 Block A 7 0 ff 0 hex System Data Manufacturer Info 58 8 H1 Block A 8 0 ff 0 hex System Data Manufacturer Info 58 9 H1 Block A 9 0 ff 0 hex System Data Manufacturer Info 58 10 H1 Block A 10 0 ff 0 hex System Data Manufacturer Info 58 11 H1 Block A 11 0 ff 0 hex System Data Manufacturer Info 58 12 H1 Block A 12 0 ff 0 hex System Data Manufacturer Info 58 13 H1 Block A 13 0 ff 0 hex System Data Manufacturer Info 58 14 H1 Block A 14 0 ff 0 hex System Data Manufacturer Info 58 15 H1 Block A 15 0 ff 0 hex System Data Manufacturer Info 58 16 H1 Block A 16 0 ff 0 hex Submit Document Feedback DEFAULT UNIT Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 Table 7-8. Data Flash Summary (continued) CLASS SUBCLASS SUBCLASS ID System Data Manufacturer Info 58 17 H1 Block A 17 0 ff 0 hex System Data Manufacturer Info 58 18 H1 Block A 18 0 ff 0 hex System Data Manufacturer Info 58 19 H1 Block A 19 0 ff 0 hex System Data Manufacturer Info 58 20 H1 Block A 20 0 ff 0 hex System Data Manufacturer Info 58 21 H1 Block A 21 0 ff 0 hex System Data Manufacturer Info 58 22 H1 Block A 22 0 ff 0 hex System Data Manufacturer Info 58 23 H1 Block A 23 0 ff 0 hex System Data Manufacturer Info 58 24 H1 Block A 24 0 ff 0 hex System Data Manufacturer Info 58 25 H1 Block A 25 0 ff 0 hex System Data Manufacturer Info 58 26 H1 Block A 26 0 ff 0 hex System Data Manufacturer Info 58 27 H1 Block A 27 0 ff 0 hex System Data Manufacturer Info 58 28 H1 Block A 28 0 ff 0 hex System Data Manufacturer Info 58 29 H1 Block A 29 0 ff 0 hex System Data Manufacturer Info 58 30 H1 Block A 30 0 ff 0 hex System Data Manufacturer Info 58 31 H1 Block A 31 0 ff 0 hex Gas Gauging IT Cfg 80 0 U1 Load Select 0 255 1 Num Gas Gauging IT Cfg 80 1 U1 Load Mode 0 255 0 Num Gas Gauging IT Cfg 80 10 I2 Res Current 0 1000 10 mA Gas Gauging IT Cfg 80 14 U1 Max Res Factor 0 255 50 Num Gas Gauging IT Cfg 80 15 U1 Min Res Factor 0 255 1 Num Gas Gauging IT Cfg 80 17 U2 Ra Filter 0 1000 500 Num 1 100 50 % OFFSET TYPE NAME MIN MAX DEFAULT UNIT Gas Gauging IT Cfg 80 47 U1 Min PassedChg NiMH-LA 1st Qmax Gas Gauging IT Cfg 80 49 U1 Maximum Qmax Change 0 255 100 % Gas Gauging IT Cfg 80 53 I2 Cell Terminate Voltage 1000 3700 3000 mV Gas Gauging IT Cfg 80 55 I2 Cell Term V Delta 0 4200 200 mV Gas Gauging IT Cfg 80 58 U2 ResRelax Time 0 65534 500 s Gas Gauging IT Cfg 80 62 I2 User Rate-mA –32767 32767 0 mA Gas Gauging IT Cfg 80 64 I2 User Rate-Pwr –32767 32767 0 mW/cW Gas Gauging IT Cfg 80 66 I2 Reserve Cap-mAh 0 9000 0 mAh Gas Gauging IT Cfg 80 68 I2 Reserve Energy 0 14000 0 mWh/cWh Gas Gauging IT Cfg 80 72 U1 Max Scale Back Grid 0 15 4 Num Gas Gauging IT Cfg 80 73 U2 Cell Min DeltaV 0 65535 0 mV Gas Gauging IT Cfg 80 75 U1 Ra Max Delta 0 255 15 % Gas Gauging IT Cfg 80 76 I2 Design Resistance 1 32767 42 mΩ Gas Gauging IT Cfg 80 78 U1 Reference Grid 0 14 4 — Gas Gauging IT Cfg 80 79 U1 Qmax Max Delta % 0 100 10 mAh Gas Gauging IT Cfg 80 80 U2 Max Res Scale 0 32767 32000 Num Gas Gauging IT Cfg 80 82 U2 Min Res Scale 0 32767 1 Num Gas Gauging IT Cfg 80 84 U1 Fast Scale Start SOC 0 100 10 % Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 25 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 Table 7-8. Data Flash Summary (continued) CLASS 26 SUBCLASS SUBCLASS ID OFFSET TYPE NAME MIN MAX DEFAULT UNIT Gas Gauging IT Cfg 80 89 I2 Charge Hys V Shift 0 2000 40 mV Gas Gauging IT Cfg 80 91 I2 Smooth Relax Time 1 32767 1000 s Gas Gauging Current Thresholds 81 0 I2 Dsg Current Threshold 0 2000 60 mA Gas Gauging Current Thresholds 81 2 I2 Chg Current Threshold 0 2000 75 mA Gas Gauging Current Thresholds 81 4 I2 Quit Current 0 1000 40 mA Gas Gauging Current Thresholds 81 6 U2 Dsg Relax Time 0 8191 60 s Gas Gauging Current Thresholds 81 8 U1 Chg Relax Time 0 255 60 s Gas Gauging Current Thresholds 81 9 U2 Cell Max IR Correct 0 1000 400 mV Gas Gauging State 82 0 I2 Qmax Cell 0 0 32767 1000 mAh Gas Gauging State 82 2 U2 Cycle Count 0 65535 0 Num Gas Gauging State 82 4 H1 Update Status 0 6 0 Num Gas Gauging State 82 5 I2 Cell V at Chg Term 0 5000 4200 mV Gas Gauging State 82 7 I2 Avg I Last Run –32768 32767 –299 mA Gas Gauging State 82 9 I2 Avg P Last Run –32768 32767 –1131 mWh Gas Gauging State 82 11 I2 Cell Delta Voltage –32768 32767 2 mV Gas Gauging State 82 13 I2 T Rise 0 32767 20 Num Gas Gauging State 82 15 I2 T Time Constant 0 32767 1000 Num Ra Table R_a0 88 0 H2 R_a0 Flag 0 ffff ff55 Hex Ra Table R_a0 88 2 I2 R_a0 0 0 32767 105 Num Ra Table R_a0 88 4 I2 R_a0 1 0 32767 100 Num Ra Table R_a0 88 6 I2 R_a0 2 0 32767 113 Num Ra Table R_a0 88 8 I2 R_a0 3 0 32767 143 Num Ra Table R_a0 88 10 I2 R_a0 4 0 32767 98 Num Ra Table R_a0 88 12 I2 R_a0 5 0 32767 97 Num Ra Table R_a0 88 14 I2 R_a0 6 0 32767 108 Num Ra Table R_a0 88 16 I2 R_a0 7 0 32767 89 Num Ra Table R_a0 88 18 I2 R_a0 8 0 32767 86 Num Ra Table R_a0 88 20 I2 R_a0 9 0 32767 85 Num Ra Table R_a0 88 22 I2 R_a0 10 0 32767 87 Num Ra Table R_a0 88 24 I2 R_a0 11 0 32767 90 Num Ra Table R_a0 88 26 I2 R_a0 12 0 32767 110 Num Ra Table R_a0 88 28 I2 R_a0 13 0 32767 647 Num Ra Table R_a0 88 30 I2 R_a0 14 0 32767 1500 Num Ra Table R_a0x 89 0 H2 R_a0x Flag 0 ffff ffff Hex Ra Table R_a0x 89 2 I2 R_a0x 0 0 32767 105 Num Ra Table R_a0x 89 4 I2 R_a0x 1 0 32767 100 Num Ra Table R_a0x 89 6 I2 R_a0x 2 0 32767 113 Num Ra Table R_a0x 89 8 I2 R_a0x 3 0 32767 143 Num Ra Table R_a0x 89 10 I2 R_a0x 4 0 32767 98 Num Ra Table R_a0x 89 12 I2 R_a0x 5 0 32767 97 Num Ra Table R_a0x 89 14 I2 R_a0x 6 0 32767 108 Num Ra Table R_a0x 89 16 I2 R_a0x 7 0 32767 89 Num Ra Table R_a0x 89 18 I2 R_a0x 8 0 32767 86 Num Ra Table R_a0x 89 20 I2 R_a0x 9 0 32767 85 Num Ra Table R_a0x 89 22 I2 R_a0x 10 0 32767 87 Num Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 Table 7-8. Data Flash Summary (continued) CLASS SUBCLASS SUBCLASS ID Ra Table R_a0x 89 24 Ra Table R_a0x 89 26 Ra Table R_a0x 89 Ra Table R_a0x OFFSET TYPE NAME MIN MAX DEFAULT UNIT I2 R_a0x 11 0 I2 R_a0x 12 0 32767 90 Num 32767 110 28 I2 R_a0x 13 Num 0 32767 647 89 30 I2 R_a0x 14 Num 0 32767 1500 Num 4.00E+01 0.4768 mΩ Calibration Data 104 0 F4 CC Gain 1.00E-01 Calibration Data 104 4 F4 CC Delta 2.98E+04 1.19E+06 567744.56 Calibration Data 104 8 I2 CC Offset –32768 32767 –1200 Calibration Data 104 10 I1 Board Offset –128 127 0 Num Calibration Data 104 11 I1 Int Temp Offset –128 127 0 0.1°C Calibration Data 104 12 I1 Ext Temp Offset –128 127 0 0.1°C Calibration Data 104 14 U2 Voltage Divider 0 65535 5000 mV Calibration Current 107 1 U1 Deadband 0 255 5 mA Security Codes 112 0 H4 Sealed to Unsealed 0 ffffffff 36720414 hex Security Codes 112 4 H4 Unsealed to Full 0 ffffffff ffffffff hex Security Codes 112 8 H4 Authen Key3 0 ffffffff 1234567 hex Security Codes 112 12 H4 Authen Key2 0 ffffffff 89abcdef hex Security Codes 112 16 H4 Authen Key1 0 ffffffff fedcba98 hex Security Codes 112 20 H4 Authen Key0 0 ffffffff 76543210 hex mΩ Num Table 7-9. Data Flash (DF) to EVSW Conversion CLASS SUBCLASS SUBCLASS OFFSET ID NAME DATA DATA TYPE FLASH DEFAULT DATA FLASH UNIT EVSW DEFAULT EVSW UNIT DF to EVSW CONVERSION Data 48 Data 13 Manufacture Date U2 0 code 1-Jan-1980 Day+Mo*32+ (Yr-1980)*256 Gas Gauging 80 IT Cfg 59 User RatemW I2 0 cW 0 mW DF × 10 Gas Gauging 80 IT Cfg 63 Reserve Cap-mWh I2 0 cWh 0 mWh DF × 10 Calibration 104 Data 0 CC Gain F4 0.47095 Num 10.124 mΩ 4.768/DF Calibration 104 Data 4 CC Delta F4 5.595E5 Num 10.147 mΩ 5677445/DF 7.2.5 Fuel Gauging The BQ34Z100 measures the cell voltage, temperature, and current to determine the battery SOC based in the Impedance Track algorithm (refer to Theory and Implementation of Impedance Track Battery Fuel-Gauging Algorithm Application Report [SLUA450] for more information). The BQ34Z100 monitors charge and discharge activity by sensing the voltage across a small-value resistor (5 mΩ to 20 mΩ typ.) between the SRP and SRN pins and in-series with the cell. By integrating charge passing through the battery, the cell’s SOC is adjusted during battery charge or discharge. The total battery capacity is found by comparing states of charge before and after applying the load with the amount of charge passed. When an application load is applied, the impedance of the cell is measured by comparing the OCV obtained from a predefined function for the present SOC with the measured voltage under load. Measurements of OCV and charge integration determine chemical state-of-charge and Chemical Capacity (Qmax). The initial Qmax value is taken from a cell manufacturers' data sheet multiplied by the number of parallel cells. The parallel value is also used for the value programmed in Design Capacity. The BQ34Z100 acquires and updates the battery-impedance profile during normal battery usage. It uses this profile, along with SOC and the Qmax value, to determine FullChargeCapacity() and StateOfCharge() specifically for the present load and temperature. FullChargeCapacity() is reported as capacity available from a fully charged battery under the present load and temperature until Voltage() reaches the Terminate Voltage. NominalAvailableCapacity() and FullAvailableCapacity() are the uncompensated (no or light load) versions of RemainingCapacity() and FullChargeCapacity(), respectively. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 27 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 The BQ34Z100 has two flags accessed by the Flags() function that warn when the battery’s SOC has fallen to critical levels. When RemainingCapacity() falls below the first capacity threshold, specified in SOC1 Set Threshold, the [SOC1] (State of Charge Initial) flag is set. The flag is cleared once RemainingCapacity() rises above SOC1 Clear Threshold. All units are in mAh. When RemainingCapacity() falls below the second capacity threshold, SOCF Set Threshold, the [SOCF] (State of Charge Final) flag is set, serving as a final discharge warning. If SOCF Set Threshold = –1, the flag is inoperative during discharge. Similarly, when RemainingCapacity() rises above SOCF Clear Threshold and the [SOCF] flag has already been set, the [SOCF] flag is cleared. All units are in mAh. The BQ34Z100 has two additional flags accessed by the Flags() function that warn of internal battery conditions. The fuel gauge monitors the cell voltage during relaxed conditions to determine if an internal short has been detected When this condition occurs, [ISD] will be set. The BQ34Z100 also has the capability of detecting when a tab has been disconnected in a 2-cell parallel system by actively monitoring the state of health. When this condition occurs, [TDD] will be set. 7.2.6 Impedance Track Variables The BQ34Z100 has several data flash variables that permit the user to customize the Impedance Track algorithm for optimized performance. These variables are dependent upon the power characteristics of the application as well as the cell itself. 7.2.6.1 Load Mode Load Mode is used to select either the constant current or constant power model for the Impedance Track algorithm as used in Load Select. See the Section 7.2.6.2 section. When Load Mode is 0, the Constant Current Model is used (default). When Load Mode is 1, the Constant Power Model is used. The [LDMD] bit of CONTROL_STATUS reflects the status of Load Mode. 7.2.6.2 Load Select Load Select defines the type of power or current model to be used to compute load-compensated capacity in the Impedance Track algorithm. If Load Mode = 0 (Constant Current), then the options presented in Table 7-10 are available. Table 7-10. Current Model Used When Load Mode = 0 LOAD SELECT VALUE 0 1 (default) CURRENT MODEL USED Average discharge current from previous cycle: There is an internal register that records the average discharge current through each entire discharge cycle. The previous average is stored in this register. Present average discharge current: This is the average discharge current from the beginning of this discharge cycle until present time. 2 Average Current: based on the AverageCurrent() 3 Current: based on a low-pass-filtered version of AverageCurrent() (τ=14s) 4 Design Capacity/5: C Rate based off of Design Capacity /5 or a C/5 rate in mA. 5 Use the value specified by AtRate() 6 Use the value in User_Rate-mA: This gives a completely user configurable method. If Load Mode = 1 (Constant Power), then the following options are available: Table 7-11. Constant-Power Model Used When Load Mode = 1 LOAD SELECT VALUE 0 (default) 1 28 POWER MODEL USED Average discharge power from previous cycle: There is an internal register that records the average discharge power through each entire discharge cycle. The previous average is stored in this register. Present average discharge power: This is the average discharge power from the beginning of this discharge cycle until present time. 2 Average Current × Voltage: based off the AverageCurrent() and Voltage(). 3 Current × Voltage: based on a low-pass-filtered version of AverageCurrent() (τ=14s) and Voltage() 4 Design Energy/5: C Rate based off of Design Energy /5 or a C/5 rate in mA. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 Table 7-11. Constant-Power Model Used When Load Mode = 1 (continued) LOAD SELECT VALUE POWER MODEL USED 5 Use whatever value specified by AtRate(). 6 Use the value in User_Rate-mW/cW. This gives a completely user-configurable method. 7.2.6.3 Reserve Cap-mAh Reserve Cap-mAh determines how much actual remaining capacity exists after reaching 0 RemainingCapacity() before Terminate Voltage is reached. A loaded rate or no-load rate of compensation can be selected for Reserve Cap by setting the [RESCAP] bit in the Pack Configuration register. 7.2.6.4 Reserve Cap-mWh/cWh Reserve Cap-mWh determines how much actual remaining capacity exists after reaching 0 AvailableEnergy() before Terminate Voltage is reached. A loaded rate or no-load rate of compensation can be selected for Reserve Cap by setting the [RESCAP] bit in the Pack Configuration register. 7.2.6.5 Design Energy Scale Design Energy Scale is used to select the scale/unit of a set of data flash parameters. The value of Design Energy Scale can be either 1 or 10 only. When using Design Energy Scale = 10, the value for each of the parameters in Table 7-12 must be adjusted to reflect the new units. See Section 7.2.11. Table 7-12. Data Flash Parameter Scale/Unit-Based on Design Energy Scale DATA FLASH PARAMETER DESIGN ENERGY SCALE = 1 (default) DESIGN ENERGY SCALE = 10 Design Energy mWh cWh Reserve Energy-mWh/cWh mWh cWh Avg Power Last Run mW cW User Rate-mW/cW mWh cWh T Rise No Scale Scaled by [SCALED] 7.2.6.6 Dsg Current Threshold This register is used as a threshold by many functions in the BQ34Z100 to determine if actual discharge current is flowing into or out of the cell. The default for this register should be sufficient for most applications. This threshold should be set low enough to be below any normal application load current but high enough to prevent noise or drift from affecting the measurement. 7.2.6.7 Chg Current Threshold This register is used as a threshold by many functions in the BQ34Z100 to determine if actual charge current is flowing into or out of the cell. The default for this register should be sufficient for most applications. This threshold should be set low enough to be below any normal charge current but high enough to prevent noise or drift from affecting the measurement. 7.2.6.8 Quit Current, Dsg Relax Time, Chg Relax Time, and Quit Relax Time The Quit Current is used as part of the Impedance Track algorithm to determine when the BQ34Z100 enters RELAX mode from a current flowing mode in either the charge direction or the discharge direction. The value of Quit Current is set to a default value that should be above the standby current of the host system. Either of the following criteria must be met to enter RELAX mode: 1. |AverageCurrent()| < |Quit Current| for Dsg Relax Time 2. |AverageCurrent()| > |Quit Current| for Chg Relax Time After about 6 minutes in RELAX mode, the device attempts to take accurate OCV readings. An additional requirement of dV/dt < 4 μV/s is required for the device to perform Qmax updates. These updates are used in Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 29 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 the Impedance Track algorithms. It is critical that the battery voltage be relaxed during OCV readings, and that the current is not higher than C/20 when attempting to go into RELAX mode. Quit Relax Time specifies the minimum time required for AverageCurrent() to remain above the Quit Current threshold before exiting RELAX mode. 7.2.6.9 Qmax Qmax Cell 0 contains the maximum chemical capacity of the cell and is determined by comparing states of charge before and after applying the load with the amount of charge passed. It also corresponds to capacity at low rate of discharge, such as C/20 rate. For high accuracy, this value is periodically updated by the device during operation. Based on the battery cell capacity information, the initial value of chemical capacity should be entered in the Qmax Cell 0 data flash parameter. The Impedance Track algorithm will update this value and maintain it internally in the gauge. 7.2.6.10 Update Status The Update Status register indicates the status of the Impedance Track algorithm. Table 7-13. Update Status Definitions UPDATE STATUS 0x02 STATUS Qmax and Ra data are learned, but Impedance Track is not enabled. This should be the standard setting for a Golden Image File. 0x04 Impedance Track is enabled but Qmax and Ra data are not yet learned. 0x05 Impedance Track is enabled and only Qmax has been updated during a learning cycle. 0x06 Impedance Track is enabled. Qmax and Ra data are learned after a successful learning cycle. This should be the operation setting for end equipment. This register should only be updated by the device during a learning cycle or when the IT_ENABLE() subcommand is received. Refer to the Preparing Optimized Default Flash Constants for Specific Battery Types Application Report (SLUA334B). 7.2.6.11 Avg I Last Run The device logs the current averaged from the beginning to the end of each discharge cycle. It stores this average current from the previous discharge cycle in this register. This register should never be modified. It is only updated by the device when required. 7.2.6.12 Avg P Last Run The device logs the power averaged from the beginning to the end of each discharge cycle. It stores this average power from the previous discharge cycle in this register. To get a correct average power reading, the device continuously multiplies instantaneous current times Voltage() to get power. It then logs this data to derive the average power. This register should never need to be modified. It is only updated by the device when the required. 7.2.6.13 Delta Voltage The device stores the maximum difference of Voltage() during short load spikes and normal load, so the Impedance Track algorithm can calculate remaining capacity for pulsed loads. It is not recommended to change this value. 7.2.6.14 Ra Tables This data is automatically updated during device operation. No user changes should be made except for reading the values from another pre-learned pack for creating Golden Image Files. Profiles have format Cell0 R_a M, where M is the number that indicates state-of-charge to which the value corresponds. 30 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 7.2.6.15 Pack Configuration Register Some BQ34Z100 pins are configured via the Pack Configuration data flash register, as indicated in Table 7-14. This register is programmed/read via the methods described in Section 7.2.3.1. The register is located at subclass = 64, offset = 0. Table 7-14. Pack Configuration Register Bits Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 High Byte RESCAP CAL_EN RSVD RSVD VOLTSEL IWAKE RSNS1 RSNS0 Low Byte X10 RESFACTST EP SLEEP RMFCC RSVD RSVD RSVD TEMPS Legend: RSVD = Reserved RESCAP: No-load rate of compensation is applied to the reserve capacity calculation. True when set. Default is 0. CAL_EN: When enabled, entering CALIBRATION mode is permitted. For special use only. Default = 0. VOLTSEL: This bit selects between use of internal or external battery voltage divider. The internal divider is for single cell use only. 1 = external. 0 = internal. Default is 0. IWAKE/RSNS1/RSNS0: These bits configure the current wake function (see Table 7-20). Default is 0/0/1. X10: X10 Capacity and/or Current bit. The mA, mAh, and cWh settings and reports will take on a value of ten times normal. This setting has no actual effect within the gauge. It is the responsibility of the host to reinterpret the reported values. X10 current measurement is achieved by calibrating the current measurement to a value X10 lower than actual. SLEEP: The fuel gauge can enter sleep, if operating conditions allow. True when set. Default is 1. RMFCC: RM is updated with the value from FCC, on valid charge termination. True when set. Default is 1. RSVD: Reserved. Do not use. TEMPS: Selects external thermistor for Temperature() measurements. True when set. Uses internal temp when clear. Default is 1 7.2.6.15.1 Pack Configuration B Register Some BQ34Z100 pins are configured via the Pack Configuration data flash register, as indicated in Table 7-14. This register is programmed/read via the methods described in Section 7.2.3.1. The register is located at subclass = 64, offset = 0. Table 7-15. Pack Configuration B Register Bits Bit 7 CHGDoDEoC Bit 6 Bit 5 RSVD VconsEN Bit 4 Bit 3 RSVD Bit 2 JEITA LFPRelax Bit 1 DoDWT Bit 0 FConvEN CHGDoDEoC: Enable DoD at EoC during charging only. True when set. Default is 1. Default setting is recommended. VconsEN: Enable voltage consistency check. True when set. Default is 1. Default setting is recommended. LFPRelax: Enables Lithium Iron Phosphate Relax DoDWT: Enable Dod weighting for LiFePO4 support when chemical ID 400 series is selected. True when set. Default is 1 FConvEN: Enable fast convergence algorithm. Default is 1. Default setting is recommended. RMFCC: TBD 7.2.6.15.2 Pack Configuration C Register Some BQ34Z100 pins are configured via the Pack Configuration data flash register, as indicated in Table 7-14. This register is programmed/read via the methods described in Section 7.2.3.1. The register is located at subclass = 64, offset = 0. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 31 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 Table 7-16. Pack Configuration C Register Bits Bit 7 Bit 6 SOH_DISP Bit 5 RSOC_HOLD FF_NEAR_EDV Bit 4 Bit 3 SleepWakeCHG LOCK_0 Bit 2 Bit 1 RELAX_JUMP_ RELAX_SMOOTH OK _OK Bit 0 SMOOTH SOH_DISP: Enables State-of-Health Display RSOC_HOLD: Enables RSOC Hold Feature preventing RSOC from increasing during discharge SleepWakeCHG: Enable for faster sampling in SLEEP mode. Default setting is recommended. LOCK_0: Keep RemainingCapacity() and RelativeStateOfCharge() jumping back during relaxation after 0 was reached during discharge. RELAX_JUMP_OK: Allows RSOC jump during RELAX mode RELAX_SMOOTH_OK: Smooth RSOC during RELAX mode SMOOTH: Enabled RSOC Smoothing 7.2.7 Voltage Division and Calibration The device is shipped with a factory configuration for the default case of the 1-series Li-ion cell. This can be changed by setting the VOLTSEL bit in the Pack Configuration register and by setting the number of series cells in the data flash configuration section. Multi-cell applications, with voltages up to 65535 mV, may be gauged by using the appropriate input scaling resistors such that the maximum battery voltage, under all conditions, appears at the BAT input as approximately 900 mV. The actual gain function is determined by a calibration process and the resulting voltage calibration factor is stored in the data flash location Voltage Divider. For single-cell applications, an external divider network is not required. Inside the IC, behind the BAT pin is a nominal 5:1 voltage divider with 88 KΩ in the top leg and 22 KΩ in the bottom leg. This internal divider network is enabled by clearing the VOLTSEL bit in the Pack Configuration register. This ratio is optimum for directly measuring a single Li-ion cell where charge voltage is limited to 4.5 V. For higher voltage applications, an external resistor divider network should be implemented as per the reference designs in this document. The quality of the divider resistors is very important to avoid gauging errors over time and temperature. It is recommended to use 0.1% resistors with 25-ppm temperature coefficient. Alternately, a matched network could be used that tracks its dividing ratio with temperature and age due to the similar geometry of each element. Calculation of the series resistor can be made per the equation below. Note Exceeding Vin max mV results in a measurement with degraded linearity. The bottom leg of the divider resistor should be in the range of 15 KΩ to 25 K, using 16.5 KΩ: Rseries = 16500 Ω (Vin max mV – 900 mV)/900 mV For all applications, the Voltage Divider value in data flash will be used by the firmware to calibrate the total divider ratio. The nominal value for this parameter is the maximum expected value for the stack voltage. The calibration routine adjusts the value to force the reported voltage to equal the actual applied voltage. 7.2.7.1 1S Example For stack voltages under 4.5 V max, it is not necessary to provide an external voltage divider network. The internal 5:1 divider should be selected by clearing the VOLTSEL bit in the Pack Configuration register. The default value for Voltage Divider is 5000 (representing the internal 5000:1000 mV divider) when no external divider resistor is used, and the default number of series cells = 1. In the 1-S case, there is usually no requirement to calibrate the voltage measurement, since the internal divider is calibrated during factory test to within 2 mV. 32 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 7.2.7.2 7S Example In the multi-cell case, the hardware configuration is different. An external voltage divider network is calculated using the Rseries formula above. The bottom leg of the divider should be in the range of 15 KΩ to 25 KΩ. For more details on configuration, see Section 8.1.2.1. 7.2.7.3 Autocalibration The device provides an autocalibration feature that will measure the voltage offset error across SRP and SRN from time-to-time as operating conditions change. It subtracts the resulting offset error from normal sense resistor voltage, VSR, for maximum measurement accuracy. The gas gauge performs a single offset calibration when: 1. The interface lines stay low for a minimum of Bus Low Time and 2. VSR > Deadband. The gas gauge also performs a single offset when: 1. The condition of AverageCurrent() ≤ Autocal Min Current and 2. {Voltage change since last offset calibration ≥ Delta Voltage} or {temperature change since last offset calibration is greater than Delta Temperature for ≥ Autocal Time}. Capacity and current measurements should continue at the last measured rate during the offset calibration when these measurements cannot be performed. If the battery voltage drops more than Cal Abort during the offset calibration, the load current has likely increased considerably; hence, the offset calibration will be aborted. 7.2.8 Temperature Measurement The BQ34Z100 can measure temperature via the on-chip temperature sensor or via the TS input, depending on the setting of the [TEMPS] bit PackConfiguration(). The bit is set by using the PackConfiguration() function, described in Section 7.2.2. Temperature measurements are made by calling the Temperature() function (see Section 7.2.1.1 for specific information). When an external thermistor is used, REG25 (pin 7) is used to bias the thermistor and TS (pin 11) is used to measure the thermistor voltage (a pull-down circuit is implemented inside the device). The device then correlates the voltage to temperature, assuming the thermistor is a Semitec 103AT or similar device. 7.2.9 Overtemperature Indication 7.2.9.1 Overtemperature: Charge If during charging, Temperature() reaches the threshold of DF:OT Chg for a period of OT Chg Time and AverageCurrent() > Chg Current Threshold, then the [OTC] bit of Flags() is set. Note: If OT Chg Time = 0, then the feature is completely disabled. When Temperature() falls to OT Chg Recovery, the [OTC] of Flags() is reset. 7.2.9.2 Overtemperature: Discharge If during discharging Temperature() reaches the threshold of OT Dsg for a period of OT Dsg Time, and AverageCurrent() ≤ –Dsg Current Threshold, then the [OTD] bit of Flags() is set. If OT Dsg Time = 0, then the feature is completely disabled. When Temperature() falls to OT Dsg Recovery, the [OTD] bit of Flags() is reset. 7.2.10 Charging and Charge Termination Indication For proper BQ34Z100 operation, the battery per cell charging voltage must be specified by the user . The default value for this variable is Charging Voltage = 4200 mV. This parameter should be set to the recommended charging voltage for the entire battery stack . The device detects charge termination when (1) during two consecutive periods of Current Taper Window, the AverageCurrent() is < Taper Current and (2) during the same periods, the accumulated change in capacity > 0.25 mAh /Taper Current Window and (3) Voltage() > Charging Voltage - Charging Taper Voltage. When Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 33 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 this occurs, the [CHG] bit of Flags() is cleared. Also, if the [RMFCC] bit of Pack Configuration is set, and RemainingCapacity() is set equal to FullChargeCapacity(). 7.2.11 X10 Mode The device supports high current and high capacity batteries above 32.76 Amperes and 32.76 Ampere-Hours by switching to a times-ten mode where currents and capacities are internally handled correctly, but various reported units and configuration quantities are rescaled to tens of milliamps and tens of milliamp-hours. The need for this is due to the standardization of a two byte data command having a maximum representation of +/–32767. When the X10 bit (Bit 7) is set in the Pack Configuration register, all of the mAh, cWh, and mWh settings will take on a value of ten times normal. When this bit is set, the actual units for all capacity and energy parameters will be 10 mAh or Wh. This includes reporting of Remaining Capacity. This bit will also be used to rescale the current reporting to 10 times normal, up to +/–327 A. The actual resolution in that case becomes 10 mA. It is important to know that setting the X10 flag does not actually change anything in the operation of the gauge. It serves as a notice to the host that the various reported values should be reinterpreted ten times higher. X10 Current measurement is achieved by calibrating the current gain to a value X10 lower than actually applied. Because the flag has no actual effect, it can be used to represent other scaling values. See Section 7.2.6.5. 7.2.12 Remaining State of Charge LED Indication The device supports multiple options for using one to 16 LEDs as an output device to display the remaining state of charge. The LED/COMM Configuration register determines the behavior. Table 7-17. LED/COMM Configuration Bits Bit 7 Bit 6 XLED3 XLED2 Bit 5 XLED1 Bit 4 XLED0 Bit 3 LEDON Bit 2 Bit 1 Mode2 Mode1 Bit 0 Mode0 Bits 0, 1, 2 are a code for one of five modes. 0 = No LED, 1 = Single LED, 2 = Four LEDs, 3 = External LEDs with I2C comm, 4 = External LEDs with HDQ comm. Setting Bit 3, LEDON, will cause the LED display to be always on, except in Single LED mode . When clear (default), the LED pattern will only be displayed after holding an LED display button for one to two seconds. The button applies 2.5 V from REG25 pin 7 to VEN pin 2 (refer to Section 8.1). The LED Hold Time parameter may be used to configure how long the LED display remains on if LEDON is clear. LED Hold Time configures the update interval for the LED display if LEDON is set. Bits 4, 5, 6, and 7 are a binary code for number of external LEDs. Code 0 is reserved. Codes 1 through 15 represents 2~16 external LEDs. So, number of External LEDs is 1 + Value of the 4-bit binary code. Display of Remaining Capacity will be evenly divided among the selected number of LEDs. Single LED mode—Upon detecting an A/D value representing 2.5 V on the VEN pin, Single LED mode will toggle the LED as duty cycle on within a period of 1 s . So, for example, 10% RSOC will have the LED on for 100 ms and off for 900 ms. 90% RSOC will have the LED on for 900 ms and off for 100 ms. Any value > 90% will display as 90%. Four-LED mode—Upon detecting an A/D value representing 2.5 V on the VEN pin, Four-LED mode will display the RSOC by driving pins RC2(LED1), RC0(LED2), RA1(LED3),RA2(LED4) in a proportional manner where each LED represents 25% of the remaining state-of-charge. For example, if RSOC = 67%, three LEDs will be illuminated. External LED mode—Upon detecting an A/D value representing 2.5 V on the VEN pin, External LED mode will transmit the RSOC into an SN74HC164 (for 2–8 LEDs) or two SN74HC164 devices (for 9–16 LEDs) using a bit-banged approach with RC2 as Clock and RC0 as Data (see Figure 8-4). LEDs will be lit for a number of seconds as defined in a data flash parameter. Refer to the SN54HC164, SN74HC164 8-Bit Parallel-Out Serial Shift Registers Data Sheet (SCLS115E) for details on these devices. Extended commands are available to turn the LEDs on and off for test purposes. 34 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 7.2.13 Alert Signal Based on the selected LED mode, various options are available for the hardware implementation of an Alert signal. Software configuration of the Alert Configuration register determines which alert conditions will assert the ALERT pin. Table 7-18. ALERT Signal Pins MODE DESCRIPTION ALERT PIN ALERT PIN NAME CONFIG REGISTER COMMENT HEX CODE 0 No LED 1 P2 0 1 Single LED 1 P2 1 2 4 LED 11 P6 2 3 5-LED Expander with I2C Host Comm 12 P5 43 3 10-LED Expander with I2C Host Comm 12 P5 93 4 5-LED Expander with HDQ Host Comm 13 P4 44 4 10-LED Expander with HDQ Host Comm 13 P4 94 Filter and FETs are required to eliminate temperature sense pulses. See Section 8.1. The port used for the Alert output will depend on the mode setting in LED/Comm Configuration as defined in Table 7-18. The default mode is 0. The ALERT pin will be asserted by driving LOW. However, note that in LED/COM mode 2, pin TS/P6, which has a dual purpose as temperature sense pin, will be driven low except when temperature measurements are made each second. See the reference schematic (Figure 8-4) for filter implementation details if host alert sensing requires a continuous signal. The ALERT pin will be a logical OR of the selected bits in the new configuration register when asserted in the Flags register. The default value for Alert Configuration register is 0. Table 7-19. Alert Configuration Register Bit Definitions Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 High Byte OTC OTD BATHIGH BATLOW CHG_INH RSVD FC CHG Low Byte OCVTAKEN ISD TDD RSVD RSVD SOC1 SOCF DSG Legend: RSVD = Reserved OTC: Over-Temperature in Charge condition is detected. ALERT is enabled when set. OTD: Over-Temperature in Discharge condition is detected. ALERT is enabled when set. BATHIGH: Battery High bit that indicates a high battery voltage condition. Refer to the data flash BATTERY HIGH parameters for threshold settings. ALERT is enabled when set. BATLOW: Battery Low bit that indicates a low battery voltage condition. Refer to the data flash BATTERY LOW parameters for threshold settings. ALERT is enabled when set. CHG_INH: Charge Inhibit: unable to begin charging. Refer to the data flash [Charge Inhibit Temp Low, Charge Inhibit Temp High] . ALERT is enabled when set. RSVD: Reserved. Do not use. FC: Full charge is detected. FC is set when charge termination is reached and FC Set% = –1 (see Section 7.2.10 for details) or StateOfCharge() is larger than FC Set% and FC Set% is not –1. ALERT is enabled when set. CHG: (Fast) charging allowed. ALERT is enabled when set. OCVTAKEN: Cleared on entry to RELAX mode and set to 1 when OCV measurement is performed in RELAX mode. ALERT is enabled when set. ISD: Internal Short is detected. ALERT is enabled when set. TDD: Tab Disconnect is detected. ALERT is enabled when set. SOC1: State-of-Charge Threshold 1 reached. ALERT is enabled when set. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 35 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 SOCF: State-of-Charge Threshold Final reached. ALERT is enabled when set. DSG: Discharging detected. ALERT is enabled when set. 7.2.14 Communications 7.2.14.1 Authentication The BQ34Z100 can act as a SHA-1/HMAC authentication slave by using its internal engine. Sending a 160-bit SHA-1 challenge message to the device will cause the IC to return a 160-bit digest, based upon the challenge message and hidden plain-text authentication keys. When this digest matches an identical one generated by a host or dedicated authentication master (operating on the same challenge message and using the same plain text keys), the authentication process is successful. The device contains a default plain-text authentication key of 0x0123456789ABCDEFFEDCBA987654321. If using the device's internal authentication engine, the default key can be used for development purposes, but should be changed to a secret key and the part immediately sealed before putting a pack into operation. 7.2.14.2 Key Programming When the device's SHA-1/HMAC internal engine is used, authentication keys are stored as plain-text in memory. A plain-text authentication key can only be written to the device while the IC is in UNSEALED mode. Once the IC is UNSEALED, a 0x00 is written to BlockDataControl() to enable the authentication data commands. Next, subclass ID and offset are specified by writing 0x70 and 0x00 to DataFlashClass() and DataFlashBlock(), respectively. The device is now prepared to receive the 16-byte plain-text key, which must begin at command location 0x4C. The key is accepted once a successful checksum has been written to BlockDataChecksum() for the entire 32-byte block (0x40 through 0x5F), not just the 16-byte key. 7.2.14.3 Executing an Authentication Query To execute an authentication query in UNSEALED mode, a host must first write 0x01 to the BlockDataControl() command to enable the authentication data commands. If in SEALED mode, 0x00 must be written to DataFlashBlock(). Next, the host writes a 20-byte authentication challenge to the AuthenticateData() address locations (0x40 through 0x53). After a valid checksum for the challenge is written to AuthenticateChecksum(), the device uses the challenge to perform its own SHA-1/HMAC computation in conjunction with its programmed keys. The resulting digest is written to AuthenticateData(), overwriting the pre-existing challenge. The host may then read this response and compare it against the result created by its own parallel computation. 7.2.14.4 HDQ Single-Pin Serial Interface The HDQ interface is an asynchronous return-to-one protocol where a processor sends the command code to the device. With HDQ, the least significant bit (LSB) of a data byte (command) or word (data) is transmitted first. Note that the DATA signal on pin 12 is open-drain and requires an external pull-up resistor. The 8-bit command code consists of two fields: the 7-bit HDQ command code (bits 0–6) and the 1-bit R/W field (MSB Bit 7). The R/W field directs the device either to: • • Store the next 8 or 16 bits of data to a specified register or Output 8 or 16 bits of data from the specified register. The HDQ peripheral can transmit and receive data as either an HDQ master or slave. The return-to-one data bit frame of HDQ consists of three distinct sections. The first section is used to start the transmission by either the host or by the device taking the DATA pin to a logic-low state for a time tSTRH,B. The next section is for data transmission where the data is valid for a time tDSU after the negative edge used to start communication. The data is held until a time tDV, allowing the host or device time to sample the data bit. The final section is used to stop the transmission by returning the DATA pin to a logic-high state by at least a time tSSU after the negative edge used to start communication. The final logic-high state is held until the end of tCYCH,B, allowing time to ensure the transmission was stopped correctly. The timing for data and break communication is shown in Section 6.13. 36 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 HDQ serial communication is normally initiated by the host processor sending a break command to the device. A break is detected when the DATA pin is driven to a logic-low state for a time tB or greater. The DATA pin should then be returned to its normal ready high logic state for a time tBR. The device is now ready to receive information from the host processor. The device is shipped in the I2C mode. TI provides tools to enable the HDQ peripheral. 7.2.14.5 I2C Interface The gas gauge supports the standard I2C read, incremental read, one-byte write quick read, and functions. The 7-bit device address (ADDR) is the most significant 7 bits of the hex address and is fixed as 1010101. The 8-bit device address is therefore 0xAA or 0xAB for write or read, respectively. Host Generated S 0 A ADDR[6:0] Fuel Gauge Generated A CMD[7:0] A P DATA[7:0] S 1 ADDR[6:0] (a) 1-byte write S ADDR[6:0] 0 A A DATA[7:0] N P (b) quick read CMD[7:0] A Sr 1 ADDR[6:0] A DATA[7:0] N P ... DATA[7:0] (c) 1-byte read S ADDR[6:0] 0 A CMD[7:0] A Sr ADDR[6:0] 1 A DATA[7:0] A N P (d) incremental read Figure 7-1. Supported I2C formats: (a) 1-byte write, (b) quick read, (c) 1 byte-read, and (d) incremental read (S = Start, Sr = Repeated Start, A = Acknowledge, N = No Acknowledge, and P = Stop). The “quick read” returns data at the address indicated by the address pointer. The address pointer, a register internal to the I2C communication engine, increments whenever data is acknowledged by the device or the I2C master. “Quick writes” function in the same manner and are a convenient means of sending multiple bytes to consecutive command locations (such as 2-byte commands that require two bytes of data). S ADDR[6:0] 0 A A CMD[7:0] A DATA[7:0] P Figure 7-2. Attempt To Write a Read-Only Address (Nack After Data Sent By Master) S 0 ADDR[6:0] CMD[7:0] A N P Figure 7-3. Attempt To Read An Address Above 0x7F (Nack Command) S ADDR[6:0] 0 A CMD[7:0] A DATA[7:0] A DATA[7:0] N ... N P Figure 7-4. Attempt At Incremental Writes (nack All Extra Data Bytes Sent) S ADDR[6:0] 0 A CMD[7:0] A Sr ADDR[6:0] 1 A DATA[7:0] Address 0x7F A ... DATA[7:0] Data From addr 0x7F N P Data From addr 0x00 Figure 7-5. Incremental Read at the Maximum Allowed Read Address The I2C engine releases both SDA and SCL if the I2C bus is held low for tBUSERR. If the gas gauge was holding the lines, releasing them frees the master to drive the lines. If an external condition is holding either of the lines low, the I2C engine enters the low-power SLEEP mode. 7.2.15 Power Control 7.2.15.1 Reset Functions When the device detects either a hardware or software reset ( MRST pin is driven low or the [RESET] bit of Control() is initiated, respectively), it determines the type of reset and increments the corresponding counter. This information is accessible by issuing the command Control() function with the RESET_DATA subcommand. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 37 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 As shown in Figure 7-6, if a partial reset was detected, a RAM checksum is generated and compared against the previously stored checksum. If the checksum values do not match, the RAM is reinitialized (a “Full Reset”). The stored checksum is updated every time RAM is altered. DEVICE RESET Generate Active RAM checksum value NO Do the Checksum Values Match? Stored checksum Re-initialize all RAM YES NORMAL OPERATION NO Active RAM changed ? YES Store checksum Generate new checksum value Figure 7-6. Partial Reset Flow Diagram 7.2.15.2 Wake-Up Comparator The wake up comparator is used to indicate a change in cell current while the device is in SLEEP mode. PackConfiguration() uses bits [RSNS1–RSNS0] to set the sense resistor selection. PackConfiguration() uses the [IWAKE] bit to select one of two possible voltage threshold ranges for the given sense resistor selection. An internal interrupt is generated when the threshold is breached in either charge or discharge directions. A setting of 0x00 of RSNS1..0 disables this feature. Table 7-20. IWAKE t=Threshold Settings RSNS1 (1) (1) RSNS0 IWAKE Vth(SRP–SRN) 0 0 0 Disabled 0 0 1 Disabled 0 1 0 +1.25 mV or –1.25 mV 0 1 1 +2.5 mV or –2.5 mV 1 0 0 +2.5 mV or –2.5 mV 1 0 1 +5 mV or –5 mV 1 1 0 +5 mV or –5 mV 1 1 1 +10 mV or –10 mV The actual resistance value vs. the setting of the sense resistor is not important. Only the actual voltage threshold when calculating the configuration is important. 7.2.15.3 Flash Updates Data flash can only be updated if Voltage() ≥ Flash Update OK Voltage. Flash programming current can cause an increase in LDO dropout. The value of Flash Update OK Voltage should be selected such that the 38 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 device VCC voltage does not fall below its minimum of 2.4 V during Flash write operations. The default value of 2800 mV is appropriate; however, for more information, refer to Step 3. 7.3 Device Functional Modes The device has three power modes: NORMAL mode, SLEEP mode, and FULL SLEEP mode. • In NORMAL mode, the device is fully powered and can execute any allowable task. • In SLEEP mode, the gas gauge exists in a reduced-power state, periodically taking measurements and performing calculations. • In FULL SLEEP mode, the high frequency oscillator is turned off, and power consumption is further reduced compared to SLEEP mode. 7.3.1 NORMAL Mode The gas gauge is in NORMAL mode when not in any other power mode. During this mode, AverageCurrent(), Voltage(), and Temperature() measurements are taken, and the interface data set is updated. Determinations to change states are also made. This mode is exited by activating a different power mode. 7.3.2 SLEEP Mode SLEEP mode is entered automatically if the feature is enabled (Pack Configuration [SLEEP] = 1) and Average Current() is below the programmable level Sleep Current. Once entry to sleep has been qualified but prior to entry to SLEEP mode, the device performs an ADC autocalibration to minimize offset. Entry to SLEEP mode can be disabled by the [SLEEP] bit of Pack Configuration(), where 0 = disabled and 1 = enabled. During SLEEP mode, the device periodically wakes to take data measurements and updates the data set, after which it then returns directly to SLEEP. The device exits SLEEP if any entry condition is broken, a change in protection status occurs, or a current in excess of IWAKE through RSENSE is detected. 7.3.3 FULL SLEEP Mode FULL SLEEP mode is entered automatically when the device is in SLEEP mode and the timer counts down to 0 (Full Sleep Wait Time > 0). FULL SLEEP mode is disabled when Full Sleep Wait Time is set to 0. During FULL SLEEP mode, the device periodically takes data measurements and updates its data set. However, a majority of its time is spent in an idle condition. The gauge exits the FULL SLEEP mode when there is any communication activity. Therefore, the execution of SET_FULLSLEEP sets [FULLSLEEP] bit, but the EVSW might still display the bit clear. The FULL SLEEP mode can be verified by measuring the current consumption of the gauge. In this mode, the high frequency oscillator is turned off. The power consumption is further reduced compared to the SLEEP mode. While in FULL SLEEP mode, the fuel gauge can suspend serial communications as much as 4 ms by holding the communication line(s) low. This delay is necessary to correctly process host communication since the fuel gauge processor is mostly halted. For HDQ communication one host message will be dropped. Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 39 BQ34Z100 www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 8 Application and Implementation Note Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes, as well as validating and testing their design implementation to confirm system functionality. 8.1 Typical Applications Figure 8-1. BQ34Z100 Simplified Implementation 40 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 TB3 2 3 BAT - 1 PACK - BAT + GND AGND REGIN AGND R30 .010 75ppm C2 0.1uF AGND R5 Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 100 R6 100 1K R1 C6 C5 LED Display SW1 P1 U2 0.1uF C8 REG25 REGIN CE BAT P1 VEN P2 1uF C7 8 9 10 11 12 13 14 0.1uF VSS SRP SRN P6/TS P5/HDQ P4/SCL P3/SDA BQ34Z100PW 0.1uF 7 6 5 4 2 3 P2 C1 0.1uF 1 AGND LED0 LED1 LED2 LED3 LED4 REGIN R14 100 GND D3 QTLP610C-4 GRN R12 R11 R10 D11 QTLP610C-4 GRN D12 QTLP610C-4 GRN R9 R8 P1 470 470 470 470 470 GND GND GND J9 4 7 6 5 4 3 2 1 1 2 3 U3 GND GND QD QC QB QA B A CLK ~CLR QE QF QG QH VCC SN74HC164PW J10 8 9 10 11 12 13 14 REGIN HDQ or ALERT GND SDA SCLor ALERT 1 2 4 3 P2 C3 0.1uF Copyright © 2016 , Texas Instruments Incorporated R13 100 AZ23C5V6-7 D2 GND R55 100 R53 100 D10 QTLP610C-4 GRN D9 QTLP610C-4 GRN RT1 10K D1 AZ23C5V6-7 R56 100 R54 100 GND www.ti.com SLUSAU1C – MAY 2012 – REVISED MAY 2021 BQ34Z100 Figure 8-2. 1-Cell Li-ion and 5-LED Display Submit Document Feedback 41 SH1 SH2 Submit Document Feedback Product Folder Links: BQ34Z100 SH1 SH2 GND AGND R30 .010 75ppm * * Optimize for required voltage and current 3 PACK TB3 1 2 BAT + BAT - 10k * R3 R1 Q3 2N7002 0.1uF C2 AGND GND BZT52C5V6T R7 D AGND 3 REGIN 16.5 K .1% 25PPM * VOLTAGE DIVIDER .1% 25PPM * D7 Q5 BSS84 R4 165K * AGND R6 R5 LED Display SW1 3300 pF C1 GND Q4 2N7002 2 S 42 G 1 R2 100K * 100 100 P2 1k R15 P1 C6 C5 REG25 2 1 VEN P2 0.1uF C8 REG25 REGIN CE BAT P1 0.1uF 7 6 5 4 3 U2 1uF 14 13 C7 8 9 10 11 12 0.1uF VSS SRP SRN P6/TS P5/HDQ P4/SCL P3/SDA BQ34Z100PW AGND REG25 RT1 10K LED0 LED1 LED2 LED3 LED4 REGIN D1 GND GND R11 R12 QTLP610C-4 GRN D3 D12 QTLP610C-4 GRN R9 R10 D11 QTLP610C-4 GRN R8 P1 AZ23C5V6-7 D2 D10 QTLP610C-4 GRN D9 QTLP610C-4 GRN R14 100 R13 100 1k 1k 1k 1k 1k GND 7 6 5 4 3 2 1 GND QD QC QB QA B A U3 CLK ~CLR QE QF QG QH VCC SN74HC164PW 8 9 10 11 12 13 14 GND GND J9 4 3 REGIN 1 2 P2 C3 J10 0.1uF GND GND HDQ or ALERT GND SDA 1 SCLor ALERT 4 3 2 Copyright © 2016, Texas Instruments Incorporated R55 100 R56 100 AZ23C5V6-7 R53 100 R54 100 BQ34Z100 SLUSAU1C – MAY 2012 – REVISED MAY 2021 www.ti.com Figure 8-3. Multi-Cell and 5-LED Display Copyright © 2021 Texas Instruments Incorporated BAT - BAT + PACK - TB3 1 2 3 GND R30 .010 75ppm AGND Copyright © 2021 Texas Instruments Incorporated Product Folder Links: BQ34Z100 R22 D16 QTLP610C-4 GRN 6 TP4 U3 U1 CLK ~CLR QE QF QG QH VCC GND QD QC QB QA B A CLK ~CLR QE QF QG QH VCC SN74HC164PW GND QD QC QB QA B A 4 3 48V 0.1uF TP6 TP5 8 9 11 TP7 TP8 P1 P2 GND C5 REGIN 0.1uF C8 REG25 REGIN CE BAT P1 VEN 1uF 8 9 10 11 12 13 14 0.1uF C7 VSS SRP SRN P6/TS P5/HDQ P4/SCL P3/SDA U2 BQ34Z1X0 PW P2 0.1uF 7 6 5 4 3 2 1 Optimize for required LED power dissipation AGND QTLP610C-4 GRN GND R32 1M Q1 2SK3019 LED A Open for I2C J1 2 I2C pullups normally implemented in the host. Duplicated here since EV2300 does not provide C6 R38 1k REG25 GND P2 100 R6 0.1uF 100 C4 GND LED Display R5 C3 AGND 0.1uF SW1 10 12 13 14 8 9 10 11 12 13 14 >5V >5V