SN74AHC244MDWREP

SN74AHC244-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCLS486A – MAY 2003 – REVISED JUNE 2003 D D D D D D D D D DW OR PW PACKAGE (TOP VIEW) Controlled Baseline – One Assembly/Test Site, One Fabrication Site Extended Temperature Performance of –55°C to 125°C Enhanced Diminishing Manufacturing Sources (DMS) Support Enhanced Product-Change Notification Qualification Pedigree† EPIC (Enhanced-Performance Implanted CMOS) Process Operating Range 2-V to 5.5-V VCC Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds 1500 V Per MIL-STD-833, Method 3015; Exceeds 150 V Using Machine Model (C = 200 pF, R = 0) 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 † Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. description/ordering information This octal buffer/driver is designed specifically to improve the performance and density of 3-state memory-address drivers, clock drivers, and bus-oriented receivers and transmitters. The SN74AHC244 is organized as two 4-bit buffers/line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. ORDERING INFORMATION PACKAGE‡ TA –55°C 55°C to 125°C ORDERABLE PART NUMBER TOP-SIDE MARKING SOIC – D Tape and reel SN74AHC244MDWREP AHC244MEP TSSOP – PW Tape and reel SN74AHC244MPWREP AHC244EP ‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments. Copyright  2003, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN74AHC244-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCLS486A – MAY 2003 – REVISED JUNE 2003 FUNCTION TABLE (each 4-bit buffer/driver) INPUTS OE A OUTPUT Y L H H L L L H X Z logic symbol† 1OE 1A1 1A2 1A3 1A4 1 EN 2OE 18 2 4 16 6 14 12 8 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 19 EN 11 9 13 7 15 5 17 3 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) 1OE 1A1 1A2 1A3 1A4 2 1 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 POST OFFICE BOX 655303 19 11 9 13 7 15 5 17 3 • DALLAS, TEXAS 75265 2Y1 2Y2 2Y3 2Y4 2Y1 2Y2 2Y3 2Y4 SN74AHC244-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCLS486A – MAY 2003 – REVISED JUNE 2003 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Package thermal impedance, θJA (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions (see Note 3) VCC VIH Supply voltage VCC = 2 V VCC = 3 V High-level input voltage VCC = 5.5 V VCC = 2 V VIL VI VO IOH Low-level input voltage ∆t/∆v MAX 2 5.5 UNIT V 1.5 V 2.1 3.85 0.5 0.9 VCC = 3 V VCC = 5.5 V V 1.65 Input voltage 0 5.5 V Output voltage 0 VCC –50 mA VCC = 2 V VCC = 3.3 V ± 0.3 V High-level output current VCC = 5 V ± 0.5 V VCC = 2 V IOL MIN Low-level output current Input transition rise or fall rate –4 –8 50 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V 4 VCC = 3.3 V ± 0.3 V VCC = 5 V ± 0.5 V 100 8 20 V mA mA mA ns/V TA Operating free-air temperature –55 125 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN74AHC244-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCLS486A – MAY 2003 – REVISED JUNE 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) MIN TA = 25°C TYP MAX MIN 2V 1.9 2 1.9 3V 2.9 3 2.9 4.5 V 4.4 4.5 4.4 IOH = –4 mA 3V 2.58 2.48 IOH = –8 mA 4.5 V 3.94 3.8 PARAMETER TEST CONDITIONS IOH = –50 mA VOH IOL = 50 mA VOL IOL = 4 mA II IOZ ICC Ci Co IOL = 8 mA VI = 5.5 V or GND VO = VCC or GND, VI = VCC or GND, VI (OE) = VIL or VIH IO = 0 VI = VCC or GND VO = VCC or GND VCC MAX UNIT V 2V 0.1 0.1 3V 0.1 0.1 4.5 V 0.1 0.1 3V 0.36 0.5 V 4.5 V 0.36 0.5 0 V to 5.5 V ±0.1 ±1 mA 5.5 V ±0.25 ±2.5 mA 5.5 V 4 40 mA 5V 2 5V 3.5 10 pF pF switching characteristics over recommended operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1) 4 PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL A Y CL = 15 pF tPZH tPZL OE Y CL = 15 pF tPHZ tPLZ OE Y CL = 15 pF tPLH tPHL A Y CL = 50 pF tPZH tPZL OE Y CL = 50 pF tPHZ tPLZ OE Y CL = 50 pF POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MIN TA = 25°C TYP MAX MIN MAX 5.8 8.4 1 10 5.8 8.4 1 10 6.6 10.6 1 12.5 6.6 10.6 1 12.5 5 9.7 1 11 5 9.7 1 11 8.3 11.9 1 13.5 8.3 11.9 1 13.5 9.1 14.1 1 16 9.1 14.1 1 16 10.3 14 1 16 10.3 14 1 16 UNIT ns ns ns ns ns ns SN74AHC244-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCLS486A – MAY 2003 – REVISED JUNE 2003 switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) LOAD CAPACITANCE tPLH tPHL A Y CL = 15 pF tPZH tPZL OE Y CL = 15 pF tPHZ tPLZ OE Y CL = 15 pF tPLH tPHL A Y CL = 50 pF tPZH tPZL OE Y CL = 50 pF tPHZ tPLZ OE Y CL = 50 pF MIN TA = 25°C TYP MAX MIN MAX 3.9 5.5 1 6.5 3.9 5.5 1 6.5 4.7 7.3 1 8.5 4.7 7.3 1 8.5 5 7.2 1 8.5 5 7.2 1 8.5 5.4 7.5 1 8.5 5.4 7.5 1 8.5 6.2 9.3 1 10.5 6.2 9.3 1 10.5 6.7 9.2 1 10.5 6.7 9.2 1 10.5 MIN TYP MAX UNIT ns ns ns ns ns ns noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 4) PARAMETER UNIT VOL(P) Quiet output, maximum dynamic VOL 0.5 V VOL(V) Quiet output, minimum dynamic VOL –0.2 V VOH(V) Quiet output, minimum dynamic VOH 4.8 V VIH(D) High-level dynamic input voltage VIL(D) Low-level dynamic input voltage 3.5 V 1.5 V TYP UNIT 8.6 pF NOTE 4: Characteristics are for surface-mount packages only. operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance No load, POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 f = 1 MHz 5 SN74AHC244-EP OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCLS486A – MAY 2003 – REVISED JUNE 2003 PARAMETER MEASUREMENT INFORMATION From Output Under Test RL = 1 kΩ From Output Under Test Test Point VCC Open S1 TEST GND CL (see Note A) CL (see Note A) S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain Open VCC GND VCC LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS VCC 50% VCC Timing Input tw tsu VCC Input 50% VCC 50% VCC 0V th VCC 50% VCC Data Input 50% VCC 0V 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VOLTAGE WAVEFORMS PULSE DURATION VCC 50% VCC Input 50% VCC 0V tPLH In-Phase Output tPHL 50% VCC tPHL Out-of-Phase Output VOH 50% VCC VOL VCC Output Control Output Waveform 1 S1 at VCC (see Note B) 50% VCC 0V tPZL VOH 50% VCC VOL tPLZ ≈VCC 50% VCC tPZH tPLH 50% VCC 50% VCC Output Waveform 2 S1 at GND (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOL + 0.3 V VOL tPHZ 50% VCC VOH – 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns. D. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) SN74AHC244MDWREP ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 AHC244MEP SN74AHC244MPWREP ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 AHC244EP SN74AHC244MPWREPG4 ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 AHC244EP V62/03649-01XE ACTIVE TSSOP PW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 AHC244EP V62/03649-01YE ACTIVE SOIC DW 20 2000 RoHS & Green NIPDAU Level-1-260C-UNLIM -55 to 125 AHC244MEP (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of