TPA6141A2YFFR

TPA6141A2 www.ti.com.................................................................................................................................................... SLOS634A – MARCH 2009 – REVISED AUGUST 2009 CLASS-G DIRECTPATH™ STEREO HEADPHONE AMPLIFIER Check for Samples: TPA6141A2 FEATURES DESCRIPTION • The TPA6141A2 (also known as TPA6141) is a Class-G DirectPath™ stereo headphone amplifier with selectable gain. Class-G technology maximizes battery life by adjusting the voltage supplies of the headphone amplifier based on the audio signal level. At low level audio signals, the internal supply voltage is reduced to minimize power dissipation. DirectPathTM technology eliminates external DC-blocking capacitors. 1 2 • • • • • • • • • • • • TI Class-G Technology Significantly Prolongs Battery Life and Music Playback Time – 0.6 mA / Ch Quiescent Current – 50% to 80% Lower Quiescent Current Than Ground-Referenced Class-AB Headphone Amplifiers DirectPathTM Technology Eliminates Large Output DC-Blocking Capacitors – Outputs Biased at 0 V – Improves Low Frequency Audio Fidelity Active Click and Pop Suppression Fully Differential Inputs Reduce System Noise – Also Configurable as Single-Ended Inputs SGND Pin Eliminates Ground Loop Noise Wide Power Supply Range: 2.5 V to 5.5 V 100 dB Power Supply Noise Rejection Built-in Input Low Pass Filter Gain Settings: 0 dB and 6dB Short-Circuit Current Limiter Thermal-Overload Protection ±8 kV HBM ESD Protected Outputs 0,4 mm Pitch, 1,6 mm × 1,6 mm 16-Bump WCSP (YFF) Package APPLICATIONS • • • • Cellular Phones / Music Phones Smart Phones Portable Media / MP3 Players Portable CD / DVD Players The device features fully differential inputs with an integrated low pass filter to reduce system noise pickup between the audio source and the headphone amplifier and to reduce DAC out–of–band noise. The high power supply noise rejection performance and differential architecture provides increased RF noise immunity. For single–ended input signals, connect INL+ and INR+ to ground. The device operates from a 2.5 V to 5.5 V supply voltage. Class-G operation keeps total supply current below 5.0 mA while delivering 500 μW per channel into 32 Ω. Shutdown mode reduces the supply current to less than 3 μA and is activated through the EN pin. The device has built-in pop suppression circuitry to completely eliminate disturbing pop noise during turn-on and turn-off. The amplifier outputs have short-circuit and thermal-overload protection along with ±8 kV HBM ESD protection, simplifying end equipment compliance to the IEC 61000-4-2 ESD standard. 1 mF OUTR+ INR+ OUTR- INR- OUTL+ INL+ OUTL- INL- CODEC OUTR TPA6141A2 OUTL SGND EN EN AGND GAIN GAIN AVDD Vbat 2.2 mH 2.2 mF SW HPVDD HPVSS CPN CPP 2.2 mF 1 mF 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Class-G DirectPath, DirectPath are trademarks of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009, Texas Instruments Incorporated TPA6141A2 SLOS634A – MARCH 2009 – REVISED AUGUST 2009.................................................................................................................................................... www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. FUNCTIONAL BLOCK DIAGRAM AVDD Ramp Generator + SW Gate Drivers – Comparator 2.2 mH AGND Compensation Network + HPVDD – Audio Level Detector AVDD Optimizer Thermal Protection HPVDD INL- 2.2 mF – OUTL + INL+ HPVSS Short-Circuit Protection HPVDD – INR- OUTR + INR+ HPVSS HPVDD HPVDD CPP EN Interface GAIN Click-and-Pop Suppression Charge Pump 1 mF CPN SGND 2 HPVSS 2.2 mF Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com.................................................................................................................................................... SLOS634A – MARCH 2009 – REVISED AUGUST 2009 DEVICE PINOUT WCSP PACKAGE (TOP VIEW) A1 A2 A3 A4 SW AVDD OUTL INL- B1 B2 B3 B4 AGND CPP HPVDD INL+ C1 C2 C3 C4 CPN HPVSS SGND INR+ D1 D2 D3 D4 EN GAIN OUTR INR- TERMINAL FUNCTIONS TERMINAL BALL WCSP INPUT / OUTPUT / POWER (I/O/P) INL– A4 I Inverting left input for differential signals. Connect to left input signal through 1 μF capacitor for single-ended input applications. INL+ B4 I Non-inverting left input for differential signals. Connect to ground through 1 μF capacitor for single-ended input applications. INR+ C4 I Non-inverting right input for differential signals. Connect to ground through 1 μF capacitor for single-ended input applications. INR- D4 I Inverting right input for differential signals. Connect to right input signal through 1 μF capacitor for single-ended input applications. SGND C3 I Sense ground. Connect to shield terminal of headphone jack. EN D1 I Amplifier enable. Connect to logic low to shutdown; connect to logic high to activate. GAIN D2 I Amplifier gain select pin. Connect to logic low to select a gain of 0 dB; connect to logic high to select a gain of 6 dB. OUTL A3 O Left headphone amplifier output. Connect to left terminal of headphone jack. OUTR D3 O Right headphone amplifier output. Connect to right terminal of headphone jack. CPP B2 P Charge pump positive flying cap. Connect to positive side of capacitor between CPP and CPN. CPN C1 P Charge pump negative flying cap. Connect to negative side of capacitor between CPP and CPN. SW A1 P Buck converter switching node. AVDD A2 P Primary power supply for device. HPVDD B3 P Power supply for headphone amplifier (DC/DC output node). AGND B1 P Main Ground for headphone amplifiers, DC/DC converter, and charge pump. HPVSS C2 P Charge pump output. Connect 2.2 μF capacitor to GND. NAME DESCRIPTION ORDERING INFORMATION TA –40°C to 85°C (1) (2) PACKAGED DEVICES (1) PART NUMBER (2) SYMBOL 16-ball, WCSP TPA6141A2YFFR ASBI 16-ball, WCSP TPA6141A2YFFT ASBI For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. YFF packages are only available taped and reeled. The suffix “R” indicates a reel of 3000, the suffix “T” indicates a reel of 250. 3 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 SLOS634A – MARCH 2009 – REVISED AUGUST 2009.................................................................................................................................................... www.ti.com ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range, TA = 25°C (unless otherwise noted) VALUE / UNIT Supply voltage, AVDD –0.3 V to 6.0 V Amplifier supply voltage, HPVDD VI –0.3 V to 2.0 V Input voltage (INR+, INR-, INL+, INL-) –0.3 V to HPVDD +0.3 V Control input voltage (EN, GAIN) –0.3 V to AVDD Output continuous total power dissipation See Dissipation Rating Table TA Operating free-air temperature range –40°C to 85°C TJ Operating junction temperature range –40°C to 150°C Tstg Storage temperature range –65°C to 85°C RL Minimum load resistance ESD Protection – HBM (1) 12 Ω OUTL, OUTR, SGND 8 kV All other pins 2 kV Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability. DISSIPATION RATINGS TABLE (1) (1) (2) (2) PACKAGE TA < 25°C POWER RATING OPERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING YFF (WCSP) 1.25 W 10 mW/°C 800 mW 650 mW Derating factor measured with JEDEC High K board: 1S0P – One signal layer and zero plane layers. See JEDEC Standard 51-3 for Low-K board, JEDEC Standard 51-7 for High-K board, and JEDEC Standard 51-12 for using package thermal information. See JEDEC document page for downloadable copies: http://www.jedec.org/download/default.cfm. RECOMMENDED OPERATING CONDITIONS VDD Supply voltage, AVDD VIH High-level input voltage EN, GAIN VIL Low-level input voltage EN, GAIN TA MIN MAX 2.5 5.5 1.3 V V 0.6 Voltage applied to Output; OUTR, OUTL (when EN = logic low) –0.3 3.6 Operating free-air temperature –40 +85 4 UNIT V °C Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com.................................................................................................................................................... SLOS634A – MARCH 2009 – REVISED AUGUST 2009 ELECTRICAL CHARACTERISTICS TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS PSRR Power supply rejection ratio AVDD = 2.5 V to 5.5 V, inputs grounded, GAIN = 0 dB CMRR Common mode rejection ratio HPVDD = 1.3 V to 1.8 V, GAIN = 0 dB |IIH| High-level input current AVDD = 2.5 V to 5.5 V, VI = AVDD EN, GAIN |IIL| Low-level input current AVDD = 2.5 V to 5.5 V, VI = 0 V EN, GAIN ISD Shutdown current EN = 0 V, AVDD = 2.5 V to 5.5 V MIN TYP 90 105 Total supply current (1) µA 3 μA 1.2 2.0 2.5 AVDD = 3.6 V, POUT = 500 μW into 32 Ω (1) 4.0 AVDD = 3.6 V, POUT = 1 mW into 32 Ω (1), fAUD = 1 kHz µA 1 AVDD = 3.6 V, POUT = 100 μW into 32 Ω , fAUD = 1 kHz dB 1 1 (1) , fAUD = 1 kHz UNIT dB 68 AVDD = 3.6 V HPVDD = 1.3 V, Amplifiers active, no load, no input signal IDD MAX mA 6.8 Per channel output power assuming a 10 dB crest factor OPERATING CHARACTERISTICS AVDD = 3.6 V , TA = 25°C, GAIN = 0 dB, RL = 32 Ω (unless otherwise noted) PARAMETER Output power (1) (Outputs in Phase) PO THD+N Total harmonic distortion plus noise (2) TEST CONDITIONS MIN TYP AVDD = 2.7 V, THD = 1%, f = 1 kHz 26 AVDD = 2.7 V, THD = 10%, f = 1 kHz 32 AVDD = 2.7 V, THD = 1%, f = 1 kHz, RL = 16Ω 25 PO = 10 mW into 16 Ω, f = 1 kHz UNIT mW 0.02% PO = 20 mW into 32 Ω, f = 1 kHz 200 mVpp ripple, f = 217 Hz MAX 0.01% 80 100 kSVR AC-Power supply rejection ratio AV Closed–loop voltage gain (OUT / IN–) GAIN = logic low 0 dB GAIN = logic high 6 dB ΔAV Gain matching Between left and right channels VOS Output offset voltage AVDD = 2.5 V to 5.5 V, inputs grounded EN Noise output voltage A-weighted 5.3 µVRMS fBUCK Buck converter switching frequency PO = 0.5 mW, f = 1 kHz 600 kHz PO = 0.5 mW, f = 1 kHz 315 PO = 15 mW, f = 1 kHz 1260 fPUMP Charge pump switching frequency 200 mVpp ripple, f = 4 kHz dB 90 1% 0.5 Start-up time from shutdown 0 0.5 mV kHz 5 ms RIN,SE Single Ended Input impedance Gain = 6 dB, per input node 13.2 kΩ RIN,DF Differential input impedance Gain = 6 dB, per input node 26.4 kΩ SNR Signal-to-noise ratio VOUT = 1 VRMS, GAIN = 6 dB, no load 105 dB Threshold 165 Hysteresis 35 Thermal shutdown ZO,SD VCM (1) (2) Output impedance in shutdown EN = logic low, DC value Input to Output attenuation in shutdown EN = logic low, f = 1 kHz, VOUT = 1 VRMS Crosstalk PO = 15 mW, f = 1 kHz Input common-mode voltage range °C 8 kΩ 90 dB –80 0 dB 1.4 V Per channel output power A-weighted 5 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 SLOS634A – MARCH 2009 – REVISED AUGUST 2009.................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS TA = 25°C, AVDD (VDD) = 3.6 V, GAIN = 0 dB, CHPVDD = CHPVSS = 2.2 μF, CINPUT = CFLYING = 1 μF, Outputs out of phase TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 9 8 7 6 5 4 3 2 1 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 f = 1 kHz RL = 16 Ω VDD = 3.6 V 10 In Phase 1 Out of Phase 0.1 0.01 0.0001 0.001 0.01 0.1 PO − Output Power − W G002 Figure 1. Figure 2. TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER TOTAL HARMONIC DISTORTION + NOISE vs OUTPUT POWER 100 f = 1 kHz RL = 16 Ω VDD = 2.5 V 10 VDD = 3.6 V 1 VDD = 5 V 0.1 0.01 0.0001 0.001 0.01 0.1 PO − Output Power − W THD+N − Total Harmonic Distortion + Noise − % 100 G001 THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % VDD − Supply Voltage − V 100 f = 1 kHz RL = 32 Ω VDD = 2.5 V 10 VDD = 3.6 V 1 VDD = 5 V 0.1 0.01 0.0001 0.001 0.01 0.1 PO − Output Power − W G003 G004 Figure 3. Figure 4. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 1 RL = 16 Ω VDD = 2.5 V PO = 1 mW per Channel 0.1 0.01 PO = 10 mW per Channel PO = 4 mW per Channel 0.001 20 100 1k f − Frequency − Hz 10k 20k THD+N − Total Harmonic Distortion + Noise − % Quiescent Supply Current − mA 10 THD+N − Total Harmonic Distortion + Noise − % QUIESCENT SUPPLY CURRENT vs SUPPLY VOLTAGE 1 RL = 32 Ω VDD = 2.5 V PO = 1 mW per Channel 0.1 PO = 10 mW per Channel 0.01 PO = 4 mW per Channel 0.001 20 G005 Figure 5. 100 1k f − Frequency − Hz 10k 20k G006 Figure 6. 6 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com.................................................................................................................................................... SLOS634A – MARCH 2009 – REVISED AUGUST 2009 TYPICAL CHARACTERISTICS (continued) TA = 25°C, AVDD (VDD) = 3.6 V, GAIN = 0 dB, CHPVDD = CHPVSS = 2.2 μF, CINPUT = CFLYING = 1 μF, Outputs out of phase RL = 16 Ω VDD = 3.6 V PO = 1 mW per Channel PO = 10 mW per Channel 0.1 0.01 PO = 15 mW per Channel 0.001 20 100 1k 10k 20k 1 RL = 32 Ω VDD = 3.6 V 0.1 PO = 1 mW per Channel PO = 10 mW per Channel 0.01 PO = 20 mW per Channel 0.001 20 100 1k 10k f − Frequency − Hz G007 Figure 8. TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY RL = 16 Ω VDD = 5 V PO = 1 mW per Channel PO = 10 mW per Channel 0.1 0.01 PO = 15 mW per Channel 0.001 20 100 1k 10k f − Frequency − Hz 20k 0.1 PO = 1 mW per Channel PO = 10 mW per Channel 0.01 PO = 20 mW per Channel 0.001 20 100 G009 1k 10k OUTPUT POWER PER CHANNEL vs SUPPLY VOLTAGE OUTPUT POWER PER CHANNEL vs SUPPLY VOLTAGE RL = 16 Ω In Phase THD+N = 10% 30 THD+N = 1% 20 10 3.0 3.5 4.0 4.5 VDD − Supply Voltage − V 5.0 5.5 20k G010 Figure 10. 40 0 2.5 RL = 32 Ω VDD = 5 V f − Frequency − Hz PO − Output Power per Channel − mW 50 1 Figure 9. 60 20k G008 Figure 7. 1 PO − Output Power per Channel − mW THD+N − Total Harmonic Distortion + Noise − % 1 f − Frequency − Hz THD+N − Total Harmonic Distortion + Noise − % TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY THD+N − Total Harmonic Distortion + Noise − % THD+N − Total Harmonic Distortion + Noise − % TOTAL HARMONIC DISTORTION + NOISE vs FREQUENCY 60 50 RL = 32 Ω In Phase THD+N = 10% 40 30 THD+N = 1% 20 10 0 2.5 G011 Figure 11. 3.0 3.5 4.0 4.5 VDD − Supply Voltage − V 5.0 5.5 G012 Figure 12. 7 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 SLOS634A – MARCH 2009 – REVISED AUGUST 2009.................................................................................................................................................... www.ti.com TYPICAL CHARACTERISTICS (continued) TA = 25°C, AVDD (VDD) = 3.6 V, GAIN = 0 dB, CHPVDD = CHPVSS = 2.2 μF, CINPUT = CFLYING = 1 μF, Outputs out of phase OUTPUT POWER vs LOAD RESISTANCE OUTPUT POWER vs LOAD RESISTANCE 50 50 VDD = 3.6 V 35 30 25 20 VDD = 2.5 V 15 10 30 25 20 15 VDD = 3.6 V 10 5 0 10 100 1k VDD = 2.5 V 100 1k RL − Load Resistance − Ω G013 G014 Figure 13. Figure 14. SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY SUPPLY RIPPLE REJECTION RATIO vs FREQUENCY 0 −20 kSVR − Supply Ripple Rejection Ratio− dB kSVR − Supply Ripple Rejection Ratio − dB 35 0 10 RL = 16 Ω Supply Ripple = 0.2 Vpp Sine Wave −40 −60 −80 VDD = 5 V VDD = 3.6 V VDD = 2.5 V −100 −120 20 100 1k 10k f − Frequency − Hz 20k −20 RL = 32 Ω Supply Ripple = 0.2 Vpp Sine Wave −40 −60 −80 VDD = 3.6 V VDD = 5 V −100 −120 20 100 G015 1k 10k Figure 16. SUPPLY CURRENT vs TOTAL OUTPUT POWER SUPPLY CURRENT vs TOTAL OUTPUT POWER 20k G016 100 IDD − Supply Current − mA VDD = 3.6 V VDD = 2.5 V f = 1 kHz RL = 32 Ω VDD = 3.6 V 10 VDD = 2.5 V VDD = 5 V VDD = 5 V 1 0.001 VDD = 2.5 V Figure 15. f = 1 kHz RL = 16 Ω 10 0 f − Frequency − Hz 100 IDD − Supply Current − mA VDD = 5 V 40 5 RL − Load Resistance − Ω THD+N = 1% In Phase 45 40 PO − Output Power − mW PO − Output Power − mW THD+N = 1% Out of Phase VDD = 5 V 45 0.01 0.1 1 PO − Total Output Power − mW 10 100 1 0.001 G017 Figure 17. 0.01 0.1 1 PO − Total Output Power − mW 10 100 G018 Figure 18. 8 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com.................................................................................................................................................... SLOS634A – MARCH 2009 – REVISED AUGUST 2009 TYPICAL CHARACTERISTICS (continued) TA = 25°C, AVDD (VDD) = 3.6 V, GAIN = 0 dB, CHPVDD = CHPVSS = 2.2 μF, CINPUT = CFLYING = 1 μF, Outputs out of phase TOTAL POWER DISSIPATION vs TOTAL OUTPUT POWER OUTPUT VOLTAGE vs SUPPLY VOLTAGE 2.0 100 R L = 16Ω 10 R L = 32Ω RL = 600 Ω 1.6 RL = 1 kΩ 1.4 1.2 1.0 0.8 0.6 RL = 32 Ω 0.4 RL = 16 Ω 0.2 1 0.01 0.1 1 10 0.0 2.5 100 P O − Total Output Power − mW 4.5 5.0 VDD − Supply Voltage − V CROSSTALK vs FREQUENCY OUTPUT AMPLITUDE vs FREQUENCY 5.5 G020 0 VO − Output Amplitude − dBV −60 −80 Single Channel RL = 16 Ω −30 −60 −90 −120 −150 100 1k 10k f − Frequency − Hz 20k 0 5000 10000 15000 f − Frequency − Hz G021 20000 G022 Figure 21. Figure 22. STARTUP WAVEFORM vs TIME SHUTDOWN WAVEFORM vs TIME 5 5 RL = 16 Ω VIN = 0.5 Vrms @ 1 kHz 4 RL = 16 Ω VIN = 0.5 Vrms @ 20 kHz 4 Enable 3 V - Voltage - V V - Voltage - V 4.0 Figure 20. −40 −100 20 3.5 G019 RL = 16 Ω PO = 15 mW −20 3.0 Figure 19. 0 Crosstalk − dB f = 1 kHz THD+N = 1% 1.8 VO − Output Voltage − Vrms P T − Total Power Dissipation − mW 1k 2 1 EN pin 3 2 1 VOUT VOUT 0 0 -1 -1 0 1 2 3 4 5 6 t - Time - ms 7 8 9 10 0 Figure 23. 50 100 t - Time - ms 150 200 Figure 24. 9 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 SLOS634A – MARCH 2009 – REVISED AUGUST 2009.................................................................................................................................................... www.ti.com APPLICATION INFORMATION APPLICATION CIRCUIT 1 mF OUTR+ INR+ OUTR- INR- OUTL+ INL+ OUTL- INL- CODEC OUTR TPA6141A2 OUTL SGND EN GAIN EN AGND GAIN Vbat AVDD 2.2 mH SW HPVDD HPVSS CPP 2.2 mF CPN 2.2 mF 1 mF Figure 25. Typical Application Configuration with Differential Input Signals 1 mF INR+ INR- OUTR CODEC OUTR TPA6141A2 OUTL INL+ INL- OUTL SGND EN GAIN GAIN Vbat AVDD 2.2 mH 2.2 mF EN AGND SW HPVDD HPVSS CPP CPN 2.2 mF 1 mF Figure 26. Typical Application Configuration with Single-Ended Input Signals 10 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com.................................................................................................................................................... SLOS634A – MARCH 2009 – REVISED AUGUST 2009 CLASS-G HEADPHONE AMPLIFIER Class-G amplifiers use adaptive supply rails. The TPA6141A2 includes a built-in step-down converter to create the headphone amplifier positive supply voltage, HPVDD. A charge pump inverts HPVDD and creates the amplifier negative supply voltage, HPVSS. This allows the headphone amplifier output to be centered at 0 V. When audio signal amplitude is low, the step-down converter generates a low HPVDD voltage. This minimizes TPA6141A2 power consumption while playing low noise, high fidelity audio. If audio amplitude increases, either due to louder music or a transient peak, then the step-down converter generates a higher HPVDD voltage. The HPVDD rise rate is faster than the audio peak rise time. This prevents audio distortion or clipping. Audio quality and noise floor are not affected by HPVDD. This adaptive HPVDD minimizes TPA6141A2 supply current while avoiding clipping and distortion. Because normal listening levels are below 200 mVRMS, HPVDD is most often at its lowest voltage. Thus, the TPA6141A2 has higher efficiency than traditional Class-AB headphone amplifiers. The following equations compare a Class-AB amplifier to a Class-G amplifier. Both operate with identical battery voltage, load impedance, and output voltage swing. For this study case, we assume a normal listening level of 200 mVRMS with no DirectPath™ in order to simplify the calculations. • PSUP: Supplied power • VSUP: Supply voltage • ISUP: Supply current • VREG: DC/DC converter output voltage • PREG: DC/DC converter output power • VLOAD: Voltage across the load • RLOAD: Load impedance • PLOAD: Power dissipated at the load • ILOAD: Current supplied to the load Given an amplifier driving 200 mVRMS into a 32 Ω load, the output current to the load is: V 200 mVRMS ILOAD = LOAD = = 6.25 mA RLOAD 32 W (1) Assuming a quiescent current of 1 mA (IDDQ) the total current supplied to the amplifier is: ISUP = ILOAD + IDDQ = 7.25 mA (2) The total power supplied to a Class-AB amplifier is then calculated as: PSUP = VSUP ´ ISUP = 4.2 V ´ 7.25 mA = 30.45 mW (3) For a Class-G amplifier where the voltage rails are generated by a switching DC/DC converter, the supplied power will depend on the DC/DC converter output voltage and efficiency. Assuming the DC/DC converter output voltage is 1.3 V: PREG = VREG ´ ISUP = 1.3 V ´ 7.25 mA = 9.425 mW (4) The total supplied power will be the DC/DC converter output power divided by the efficiency of the DC/DC converter. Assuming 90% step-down efficiency, total power supplied to the Class-G amplifier is: P PSUP = REG = 11.09 mW 90% (5) Class-G headphone amplifiers achieve much higher efficiency than equivalent Class-AB amplifiers. 11 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 SLOS634A – MARCH 2009 – REVISED AUGUST 2009.................................................................................................................................................... www.ti.com INDUCTOR SELECTION The TPA6141A2 requires one inductor for its DC/DC converter. The following table lists recommended inductors. Inductors not shown on this table can be used if they have similar performance characteristics. When selecting an inductor observe the following rules: • Lower DCR increases DC/DC converter efficiency. • The minimum working inductance should never be below 1 μH. • Include temperature and aging derating factors into the inductor value calculations. MANUFACTURER PART NUMBER TOKO MDT2012-CH2R2A LQM21PN2R2MC0D Murata LQH2MCN2R2M02L BRL2012T2R2M Taiyo Yuden BRC1608T2R2M GAIN CONTROL The TPA6141A2 has two gain settings which are controlled with the GAIN pin. The following table gives an overview of the gain function. GAIN VOLTAGE AMPLIFIER GAIN ≤0.6 V 0 dB ≥1.3 V 6 dB GROUND SENSE FUNCTION The ground sense pin, SGND, reduces ground-loop noise when the audio output jack is connected to a different ground reference than codec and amplifier ground. Always connect the SGND pin to the headphone jack. This reduces output offset voltage and eliminates turn-on pop. Figure 27 shows how to connect SGND when an FM radio antenna function is implemented on the headphone wire. The nH coil and capacitor separate the RF signal from the audio GND signal. In this case, SGND is used to eliminate the offset voltage that is generated from the audio signal current and the RF coil low-frequency impedance. The voltage difference between SGND and AGND cannot be greater than ±300 mV. The amplifier performance degrades if the voltage difference between SGND and AGND is greater than ±300 mV. CODEC TPA6141A2 OUTR+ INR+ OUTR- INR- OUTL+ INL+ OUTL- INL- OUTR OUTL SGND EN GAIN Vbat 2.2 mH 2.2 mF EN GAIN AVDD SW HPVDD AGND HPVSS CPP CPN FM Tuner 2.2 mF nH coil 1mF Figure 27. Sense Ground 12 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com.................................................................................................................................................... SLOS634A – MARCH 2009 – REVISED AUGUST 2009 HEADPHONE AMPLIFIERS Single-supply headphone amplifiers typically require dc-blocking capacitors to remove dc bias from their output voltage. The top drawing in Figure 28 illustrates this connection. If dc bias is not removed, large dc current will flow through the headphones which wastes power, clips the output signal, and potentially damages the headphones. These dc-blocking capacitors are often large in value and size. Headphone speakers have a typical resistance between 16 Ω and 32 Ω. This combination creates a high-pass filter with a cutoff frequency as shown in Equation 6, where RL is the load impedance, CO is the dc-block capacitor, and fC is the cutoff frequency. 1 fC = 2pRLCO (6) For a given high-pass cutoff frequency and load impedance, the required dc-blocking capacitor is found as: 1 CO = 2pfCRL (7) Reducing fC improves low frequency fidelity and requires a larger dc-blocking capacitor. To achieve a 20 Hz cutoff with 16 Ω headphones, CO must be at least 500 μF. Large capacitor values require large packages, consuming PCB area, increasing height, and increasing cost of assembly. During start-up or shutdown the dc-blocking capacitor has to be charged or discharged. This causes an audible pop on start-up and power-down. Large dc-blocking capacitors also reduce audio output signal fidelity. Two different headphone amplifier architectures are available to eliminate the need for dc-blocking capacitors. The capless amplifier architecture provides a reference voltage to the headphone connector shield pin as shown in the middle drawing of Figure 28. The audio output signals are centered around this reference voltage, which is typically half of the supply voltage to allow symmetrical output voltage swing. When using a capless amplifier do not connect the headphone jack shield to any ground reference or large currents will result. This makes capless amplifiers ineffective for plugging non-headphone accessories into the headphone connector. capless amplifiers are useful only with floating GND headphones. 13 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 SLOS634A – MARCH 2009 – REVISED AUGUST 2009.................................................................................................................................................... www.ti.com Conventional CO VOUT CO VOUT GND Capless VOUT VOUT GND VBIAS DirectPath™ VDD VOUT GND VSS Figure 28. Amplifier Applications The DirectPath™ amplifier architecture operates from a single supply voltage and uses an internal charge pump to generate a negative supply rail for the headphone amplifier. The output voltages are centered around 0 V and are capable of positive and negative voltage swings as shown in the bottom drawing of Figure 28. DirectPath amplifiers require no output dc-blocking capacitors. The headphone connector shield pin connects to ground and will interface with headphones and non-headphone accessories. The TPA6141A2 is a DirectPath amplifier. ELIMINATING TURN-ON POP AND POWER SUPPLY SEQUENCING The TPA6141A2 has excellent noise and turn-on / turn-off pop performance. It uses an integrated click-and-pop suppression circuit to allow fast start-up and shutdown without generating any voltage transients at the output pins. Typical start-up time from shutdown is 5 ms. DirectPath technology keeps the output dc voltage at 0 V even when the amplifier is powered up. The DirectPath technology together with the active pop-and-click suppression circuit eliminates audible transients during start up and shutdown. Use input coupling capacitors to ensure inaudible turn-on pop. Activate the TPA6141A2 after all audio sources have been activated and their output voltages have settled. On power-down, deactivate the TPA6141A2 before deactivating the audio input source. The EN pin controls device shutdown: Set to EN to VIL or lower to deactivate the TPA6141A2; set to VIH or higher to activate. Refer to the Recommended Operating Conditions table for the VIL and VIH values. 14 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com.................................................................................................................................................... SLOS634A – MARCH 2009 – REVISED AUGUST 2009 RF AND POWER SUPPLY NOISE IMMUNITY The TPA6141A2 employs a new differential amplifier architecture to achieve high power supply noise rejection and RF noise rejection. RF and power supply noise are common in modern electronics. Although RF frequencies are much higher than the 20 kHz audio band, signal modulation often falls in-band. This, in turn, modulates the supply voltage, allowing a coupling path into the audio amplifier. A common example is the 217 Hz GSM frame-rate buzz often heard from an active speaker when a cell phone is placed nearby during a phone call. The TPA6141A2 has excellent rejection of power supply and RF noise, preventing audio signal degradation. INPUT COUPLING CAPACITORS Input coupling capacitors block any dc bias from the audio source and ensure maximum dynamic range. Input coupling capacitors also minimize TPA6141A2 turn-on pop to an inaudible level. The input capacitors are in series with TPA6141A2 internal input resistors, creating a high-pass filter. Equation 8 calculates the high-pass filter corner frequency. The input impedance, RIN, is dependent on device gain. Larger input capacitors decrease the corner frequency. See the Operating Characteristics table for input impedance values. 1 fC = 2pRINCIN (8) For a given high-pass cutoff frequency, the minimum input coupling capacitor is found as: 1 CIN = 2pfCRIN (9) Example: Design for a 20 Hz corner frequency with a TPA6141A2 gain of +6 dB. The Operating Characteristics table gives RIN as 13.2 kΩ. Equation 9 shows the input coupling capacitors must be at least 0.6 μF to achieve a 20 Hz high-pass corner frequency. Choose a 0.68 μF standard value capacitor for each TPA6141A2 input (X5R material or better is required for best performance). Input capacitors can be removed provided the TPA6141A2 inputs are driven differentially with less than ±1 VRMS and the common-mode voltage is within the input common-mode range of the amplifier. Without input capacitors turn-on pop performance may be degraded and should be evaluated in the system. CHARGE PUMP FLYING CAPACITOR AND HPVSS CAPACITOR The TPA6141A2 uses a built-in charge pump to generate a negative voltage supply for the headphone amplifiers. The charge pump flying capacitor connects between CPP and CPN. It transfers charge to generate the negative supply voltage. The HPVSS capacitor must be at least equal in value to the flying capacitor to allow maximum charge transfer. Use low equivalent-series-resistance (ESR) ceramic capacitors (X5R material or better is required for best performance) to maximize charge pump efficiency. Typical values are 1 μF to 2.2 μF for the HPVSS and flying capacitors. Although values down to 0.47 μF can be used, total harmonic distortion (THD) will increase. OPERATION WITH DACs AND CODECs AND INPUT RF NOISE REJECTION When using amplifiers with CODECs and DACs, sometimes there is an increase in the output noise floor from the audio amplifier. This occurs when the output out–of–band noise of the CODEC/DAC folds back into the audio frequency due to the limited gain bandwidth product of the audio amplifier. Single–ended RF noise can also fold back into the audio band thus degrading the audio signal even further The TPA6141A2 has a built-in low-pass filter to reduce CODEC/DAC out–of–band noise and RF noise, that could fold back into the audio frequency. 15 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 SLOS634A – MARCH 2009 – REVISED AUGUST 2009.................................................................................................................................................... www.ti.com POWER SUPPLY AND HPVDD DECOUPLING CAPACITORS AND CONNECTIONS The TPA6141A2 DirectPath headphone amplifier requires adequate power supply decoupling to ensure that output noise and total harmonic distortion (THD) remain low. Use good low equivalent-series-resistance (ESR) ceramic capacitors (X5R material or better is required for best performance). Place a 2.2 μF capacitor within 5 mm of the AVDD pin. Reducing the distance between the decoupling capacitor and AVDD minimizes parasitic inductance and resistance, improving TPA6141A2 supply rejection performance. Use 0402 or smaller size capacitors if possible. Ensure that the ground connection of each of the capacitors has a minimum length return path to the device. Failure to properly decouple the TPA6141A2 may degrade audio or EMC performance. For additional supply rejection, connect an additional 10 μF or higher value capacitor between AVDD and ground. This will help filter lower frequency power supply noise. The high power supply rejection ratio (PSRR) of the TPA6141A2 makes the 10 μF capacitor unnecessary in most applications. Connect a 2.2 μF capacitor between HPVDD and ground. This ensures the amplifier internal bias supply remains stable and maximizes headphone amplifier performance. DO NOT connect HPVDD directly to AVDD or an external supply voltage. The voltage at HPVDD is generated internally. Connecting HPVDD to an external voltage can damage the device. LAYOUT RECOMMENDATIONS GND CONNECTIONS The SGND pin is an input reference and must be connected to the headphone ground connector pin. This ensures no turn-on pop and minimizes output offset voltage. Do not connect more than ±0.3 V to SGND. AGND is a power ground. Connect supply decoupling capacitors for AVDD, HPVDD, and HPVSS to AGND. BOARD LAYOUT In making the pad size for the WCSP balls, it is recommended that the layout use non-solder-mask defined (NSMD) land. With this method, the solder mask opening is made larger than the desired land area, and the opening size is defined by the copper pad width. Figure 29 and Table 1 shows the appropriate diameters for a WCSP layout. 16 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 www.ti.com.................................................................................................................................................... SLOS634A – MARCH 2009 – REVISED AUGUST 2009 Copper Trace Width Solder Pad Width Solder Mask Opening Solder Mask Thickness Copper Trace Thickness Figure 29. Land Pattern Dimensions Table 1. Land Pattern Dimensions (1) SOLDER PAD DEFINITIONS Non-solder-mask defined (NSMD) (1) (2) (3) (4) (5) (6) (7) COPPER PAD SOLDER MASK OPENING (5) 230 μm (+0.0, –25 μm) 310 μm (+0.0, –25 μm) (2) (3) (4) COPPER THICKNESS STENCIL (6) (7) OPENING STENCIL THICKNESS 1 oz max (32 μm) 275 μm × 275 μm Sq. (rounded corners) 100 μm thick Circuit traces from NSMD defined PWB lands should be 75 μm to 100 μm wide in the exposed area inside the solder mask opening. Wider trace widths reduce device stand off and impact reliability. Best reliability results are achieved when the PWB laminate glass transition temperature is above the operating the range of the intended application Recommend solder paste is Type 3 or Type 4. For a PWB using a Ni/Au surface finish, the gold thickness should be less 0,5 mm to avoid a reduction in thermal fatigue performance. Solder mask thickness should be less than 20 μm on top of the copper circuit pattern Best solder stencil performance is achieved using laser cut stencils with electro polishing. Use of chemically etched stencils results in inferior solder paste volume control. Trace routing away from WCSP device should be balanced in X and Y directions to avoid unintentional component movement due to solder wetting forces. 17 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 TPA6141A2 SLOS634A – MARCH 2009 – REVISED AUGUST 2009.................................................................................................................................................... www.ti.com TRACE WIDTH Recommended trace width at the solder balls is 75 μm to 100 μm to prevent solder wicking onto wider PCB traces. For high current pins (VDD, HPVDD, HPVSS, CPP, CPN, OUTL, and OUTR) of the TPA6141A2, use 100 μm trace widths at the solder balls and at least 500 μm PCB traces to ensure proper performance and output power for the device. For the remaining signals of the TPA6141A2, use 75 μm to 100 μm trace widths at the solder balls. The audio input pins (INL–, INL+, INR– and INR+) must run side-by-side to maximize common-mode noise cancellation. Package Dimensions D E Max = 1590µm Max = 1590µm Min = 1530µm Min = 1530µm 18 Copyright © 2009, Texas Instruments Incorporated Product Folder Link(s): TPA6141A2 PACKAGE OPTION ADDENDUM www.ti.com 10-Dec-2020 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan (2) Lead finish/ Ball material MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) (6) TPA6141A2YFFR ACTIVE DSBGA YFF 16 3000 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 ASBI TPA6141A2YFFT ACTIVE DSBGA YFF 16 250 RoHS & Green SNAGCU Level-1-260C-UNLIM -40 to 85 ASBI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may reference these types of products as "Pb-Free". RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption. Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of