TPS2590
www.ti.com
SLUS960G – JULY 2009 – REVISED JANUARY 2014
5-A, 20-V High-Current Load Switch
Check for Samples: TPS2590
FEATURES
DESCRIPTION
•
•
•
•
•
•
•
•
•
•
•
•
The TPS2590 device provides highly integrated hotswap power management and superior protection in
applications where the load is powered by busses up
to 20 V. The maximum UV turn-on threshold of 2.9 V
makes the TPS2590 device well suited to standard
bus voltages as low as 3.3 V. This device is intended
for systems where a voltage bus must be protected to
prevent load shorts from interrupting or damaging
other system components. The TPS2590 device is in
a 16-pin QFN package.
1
2
Integrated Pass MOSFET
Up to 20-V Bus Operation
Programmable Fault Timer
Programmable Fault Current
Programmable Hard Current-Limit
Fast Disable
Thermal Shutdown
Load Fault Alert
Latching and Auto-retry Operation
4-mm x 4-mm QFN
–40°C to 125°C Junction Temperature Range
UL2367 Recognized - File Number E169910
The TPS2590 device has multiple programmable
protection features. Load protection is accomplished
by a non-current-limiting fault threshold, a hard
current-limit threshold, and a fault timer. The dual
current thresholds allow the system to draw high
current for short periods without causing a voltage
droop at the load. An example of this is a disk drive
startup. This technique is ideal for loads that
experience brief high demand, but benefit from
protection levels consistent with average current
draw.
APPLICATIONS
•
•
•
•
•
•
•
•
RAID Arrays
Telecommunications
Plug-In Circuit Boards
Disk Drives
SSDs
PCIE
Fan Control
Notebooks and Netbooks
Hotswap MOSFET protection is provided by power
limit circuitry which protects the internal MOSFET
against SOA related failures.
The TPS2590 device provides a fault indicator output
and allows latch off or retry on fault.
12-V, 3.5-A APPLICATION
IN
OUT
TPS2590
16 EN
RTRY
FLT 15
GND
6
Input
Voltage Bus
ILIM
IFLT
CT
7
8
9
40.2 kW 49.9 kW
CLOAD
Optional: To
System Monitor
Output To Voltage Bus
or DC-to-DC Converter
0.1 mF
UDG-10102
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPad is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2014, Texas Instruments Incorporated
TPS2590
SLUS960G – JULY 2009 – REVISED JANUARY 2014
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1) (2)
MIN
MAX
Input voltage range IN, OUT
–0.3
25
Voltage range FLT
–0.3
20
Output sink current FLT
–0.3
6
V
uA
3
V
Human body model (HBM)
2.5
kV
Charged device model (CDM)
400
V
Voltage range CT (3), IFLT (3) ,ILIM (3), RTRY
ESD rating
–0.3
Operating junction temperature range, TJ
Internally Limited
Storage temperature range, Tstg
(3)
(4)
–65
°C
150
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
All voltage values are with respect to GND.
Do not apply voltage to pin.
DISSIPATION RATINGS (1)
(1)
(2)
mA
35
Input current, RTRY ( RTRY internally clamped to 3 V) RTRY = 0 V
(2)
(3)
V
10
Input voltage range, EN
(1)
UNIT
(2) (3) (4)
PACKAGE
θJA LOW K, °C/W
θJA HIGH K, °C/W
θJA BEST 4, °C/W
RSA
211
55
50
Tested per JEDEC JESD51, natural convection. The definitions of high-k and low-k are per JESD 51-7and JESD 51-3.
Low-k (2 signal - no plane, 3-inch by 3-inch board, 0.062-inch thick, 1-oz copper) test board with the pad soldered, and an additional
0.12 inch. 2 of top-side copper added to the pad.
High-k is a (2 signal – 2 plane) test board with the pad soldered.
The best case thermal resistance is obtained using the recommendations per SLMA002A (2 signal - 2 plane with the pad connected to
the plane).
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
Input voltage range IN, OUT
3
Voltage range EN
0
5
Voltage range FLT
0
20
Output sink current FLT
0
1
Voltage range RTRY
0
3
CCT
0.1
Output current, IOUT
UNIT
20
V
mA
V
nF
0
5.5
A
RRFLT
49.9
200
kΩ
RRLIM
40.2
100
kΩ
Junction temperature
–40
125
°C
2
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
TPS2590
www.ti.com
SLUS960G – JULY 2009 – REVISED JANUARY 2014
ELECTRICAL CHARACTERISTICS
Over operating free-air temperature range, VIN = 3 V – 20 V, EN = 0 V, FLT = open, RTRY = open, CT = open, RRLIM = 40.2
kΩ, RRFLT = 49.9 kΩ, No external capacitor connected to OUT (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
IN
UVLO
VIN ↑
2.6
Hysteresis
Bias current
2.85
2.9
150
V
mV
EN = 2.4 V
25
100
μA
EN = 0 V
3.9
5
mA
29.5
42
mΩ
5
7.5
W
0.77
1
V
OUT
RON
RIN-OUT, IOUT < ILIM, 1 A ≤ IOUT ≤ 4.5 A
IOUT VIN: 12 V, CLOAD = 1000 μF, EN: 3 V → 0 V
Reverse diode voltage
3
VOUT > VIN , EN = 5 V, IIN = –1 A
IFLT
IFAULT
Fault current threshold
IOUT ↑, ICT: sinking → sourcing, pulsed test (RRFLT = 200 kΩ)
0.8
1
1.2
IOUT ↑, ICT: sinking → sourcing, pulsed test (RRFLT = 100 kΩ)
1.8
2
2.2
IOUT ↑, ICT: sinking → sourcing, pulsed test (RRFLT = 49.9 kΩ)
3.6
4
4.4
RRLIM = 100 kΩ
1.6
2
2.4
RRLIM = 66.5 kΩ
2.6
3
3.4
RRLIM = 40.2 kΩ
4.6
5
5.4
ICT sourcing, VCT = 1 V
29
35
41
1
1.4
1.8
VCT ↑
1.3
1.4
1.5
VCT ↓
0.1
0.16
0.3
VVOUT = 0 V
2.8
3.7
4.6
%
VEN↓
0.8
1
1.5
V
mV
A
ILIM
ILIM
Current-limit program
IVOUT –, VVIN–VOUT = 0.3 V,
pulsed test
A
CT
Charge/discharge current
Threshold voltage
ON/OFF fault duty cycle
ICT sinking, VCT = 1 V, RTRY = 0 V
μA
V
EN
Threshold voltage
Input bias current
Hysteresis
VEN = 2.4 V (sinking)
VEN = 0.2 V (sourcing)
50
150
250
–1.5
0
0.5
2
1
0.5
μA
Turn on propagation delay
VIN = 3.3 V, ILOAD = 1 A, VEN : 2.4 V→ 0.2 V, VOUT: ↑ 90% × VIN
350
500
Turn off propagation delay
VIN = 3.3 V, ILOAD = 1 A, VEN : 0.2 V→ 2.4 V, VOUT: ↓10% × VIN
10
20
VOUT LOW
VCT = 1.8 V, IFLT = 1 mA
0.2
0.4
V
Leakage current
VFLT = 18 V
1
μA
Low threshold voltage
Auto Retry Mode
High threshold
Latch mode
2.0
VRTRY = 3 V
–1
0.2
1
VRTRY = 0.2 V
50
25
0
μs
FLT
RTRY
Input bias current
0.8
V
mA
THERMAL SHUTDOWN
Thermal shutdown
TJ
160
Hysteresis
10
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
°C
3
TPS2590
SLUS960G – JULY 2009 – REVISED JANUARY 2014
www.ti.com
DEVICE INFORMATION
TPS2590 FUNCTIONAL BLOCK DIAGRAM
I(D)
Detector
1
IN
IOUT
2
11 OUT
10
V(DS) Detector
3
+
4
-
S
10 µA
Q
Pump
Internal Rail
14
13
GND
12
LCA
+
5
Constant
Power
Engine
+
1.0V
PLIM
Fast Trip
Comparator
ILIM 7
15 FLT
+
1.6 x ILIM
+
IFLT 8
´ 200 kΩ
+
I FAULT
2.85 V / 2.70 V
1V¸RRFLT
+
VIN
IN
10 MΩ
THERMAL
SHUTDOWN
EN 16
S
Q
R
Q
+
16.8 MΩ
1.15 V / 1.00 V
3V
1.4 V
100 kΩ
CT
+
35 µA
50 kΩ
0.16 V
9
+
3V
40 µA
1.4 µA
RTRY 6
4
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
TPS2590
www.ti.com
SLUS960G – JULY 2009 – REVISED JANUARY 2014
IN
1
IN
2
EN
FLT
GND
GND
TPS2590 PINOUT
16
15
14
13
12 OUT
11 OUT
TPS2590
4
9
5
6
7
8
IFLT
IN
ILIM
10 OUT
RTRY
3
GND
IN
CT
TERMINAL FUNCTIONS
FUNCTION
TPS2590
DESCRIPTION
EN
16
Device is enabled when this pin is pulled low.
IN
1-4
Power In and control supply voltage.
RTRY
6
If low, the TPS2590 will attempt to restart after an overcurrent fault. If floating (high) the device will latch
off after an overcurrent fault and will not attempt to restart until EN or Vin is cycled off and on.
ILIM
7
A resistor to ground sets the current-limit level.
IFLT
8
A resistor to ground sets the fault current level.
CT
9
A capacitor to ground sets the fault time.
GND
5, 13, 14
GND
OUT
10, 11, 12
Output to the load.
FLT
15
Fault low indicated the fault time has expired and the FET is switched off.
PIN DESCRIPTION
CT: Connect a capacitor from CT to GND to set the fault time. The fault timer starts when IOUT exceeds IFAULT or
when SOA protection mode is active, charging the capacitor with 35 μA from GND towards an upper threshold of
1.4 V. If the capacitor reaches the upper threshold, the internal pass MOSFET is turned off. If RTRY > 2 V, the
MOSFET remains off until EN is cycled. If RTRY ≤ 0.8 V, the capacitor will discharge at 1.4 μA to 0.16 V and
then re-enable the pass MOSFET. If the upper threshold is not crossed, the capacitor will discharge at 40 μA to
0.16 V and then to 0 V at 1.4 μA. When the device is disabled, CT is pulled to GND through a 50-kΩ resistor.
The timer period must be chosen long enough to allow the external load capacitance to charge. The nominal (not
including component tolerances) fault timer period is selected using Equation 1 where TFAULT is the minimum
timer period in seconds and CCT is in Farads.
T
CCT = FAULT
40 ´ 103
(1)
If RTRY < 0.8 V, the second and subsequent retry timer periods will be slightly shorter than the first retry period.
CT nominal (not including component tolerances) discharge time, tSD from 1.4 V to 0.16 V is shown in
Equation 2, where CCT is in Farads and tSD is in seconds.
t SD = 885.7 ´ 103 ´ CCT
(2)
The nominal ratio of on-to-off times represents about a 3.7% duty cycle when a hard fault is present on the
output.
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
5
TPS2590
SLUS960G – JULY 2009 – REVISED JANUARY 2014
www.ti.com
FLT: Open-drain output that pulls low on any condition that causes the output to open. These conditions are
either an overload with a fault time-out, or a thermal shutdown. FLT becomes operational before UV, when IN is
greater than 1 V. IFAULT may not be set below 1 A to maintain the Fault Current-Limit threshold accuracy listed in
Electrical Characteristics. FLT will pulse low momentarily prior to the onset of OUT ramp up during IN or EN
based start-up.
GND: This is the most negative voltage in the circuit and is used as reference for all voltage measurements
unless otherwise specified.
IFLT: A resistor connected from this pin to ground sets the fault current threshold (IFAULT). Currents between the
fault current threshold and the current-limit are permitted to flow unimpeded for the period set by the fault timer
programmed on CT. This permits loads to draw momentary surges while maintaining the protection provided by a
lower average-current-limit.
The fault timer described in the CT section starts when IOUT exceeds IFAULT. The fault current resistor is set using
Equation 3 where IFAULT is in Amperes and RRFLT is in Ohms.
200 kW
RRFLT =
IFAULT
(3)
ILIM: A resistor connected from this pin to ground sets ILIM. The TPS2590 device limits current to ILIM. If the
current doesn’t drop below the IFAULT level before the timer times out then the output will be shut off. RRLIM is set
by Equation 4:
201 kW
RRLIM =
I LIM
(4)
ILIM must be set sufficiently larger than IFAULT to ensure that lLIM could never be less than IFAULT, even after taking
tolerances into account.
EN: When this pin is pulled low, the IC is enabled. The input threshold is hysteretic, allowing the user to program
a startup delay with an external RC circuit. EN is pulled to IN with a 10 MΩ resistor and to GND with a 16.8 MΩ
resistor. Because high impedance pullup/down resistors are used to reduce current draw, any external FET
controlling this pin should be low leakage.
IN: Input voltage to the TPS2590 device. The recommended operating voltage range is 3 V to 20 V. All IN pins
should be connected together and to the power source.
OUT: Output connection for the TPS2590 device. VOUT in the ON condition considering the ON resistance of the
internal MOSFET, RON is shown in Equation 5.
VOUT = VIN - RON ´ IOUT
(5)
All OUT pins should be connected together and to the load.
RTRY: When pulled low the TPS2590 device attempts to restart after a fault. If left floating or pulled high the
TPS2590 device latches off after a fault. This pin is internally clamped at 3 V and is pulled to the internal 3-V
supply by a diode in series with a 100-kΩ resistor.
6
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
TPS2590
www.ti.com
SLUS960G – JULY 2009 – REVISED JANUARY 2014
TYPICAL CHARACTERISTICS
CURRENT-LIMIT
vs
JUNCTION TEMPERATURE
FAULT CURRENT
vs
JUNCTION TEMPERATURE
2.20
2.20
RMAX = 100 kΩ
2.15
RFLT = 100 k
2.15
IFAULT – Fault Current – A
IL IM – Current Limit – A
2.10
2.50
2.00
1.95
1.90
2.10
2.50
2.00
1.95
1.90
1.85
1.85
1.80
–50
0
50
100
1.80
–50
150
TJ
TJ – Junction Temperature– °C
50
100
– Junction
Temperature – °C
Figure 1.
Figure 2.
POWER LIMIT
vs
JUNCTION TEMPERATURE
SLEEP-MODE SUPPLY CURRENT
(VCC = 12 V)
vs
JUNCTION TEMPERATURE
8.0
7.5
0
150
24
ILOAD = 1 A
Sleep Mode
7.0
ISUPPLY – Supply Current – mA
PLIMIT – Power Limit Level – W
22
6.5
6.0
5.5
5.0
4.5
4.0
20
18
16
14
12
3.5
3.0
–50
0
TJ
50
100
150
10
–50
– Junction Temperature – °C
Figure 3.
TJ
0
50
100
– Junction
Temperature – °C
150
Figure 4.
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
7
TPS2590
SLUS960G – JULY 2009 – REVISED JANUARY 2014
www.ti.com
TYPICAL CHARACTERISTICS (continued)
5V/div
FLT
5V/div
CT
1A/div
ILOAD
2V/div
VOUT
2V/div
FLT
1V/div
CT
1A/div
ILOAD
2V/div
VOUT
2ms/div
5ms/div
Figure 5. 12-V Startup into 15-Ω, 700-μF Load
2V/div
FLT
1V/div
CT
1A/div
ILOAD
2V/div
VOUT
Figure 6. 12-V Input Added to an 8-Ω Load
2V/div
FLT
1V/div
CT
1A/div
ILOAD
2V/div
VOUT
5ms/div
5ms/div
Figure 7. Failed Startup into a 4-Ω Load
2V/div
FLT
1V/div
CT
Figure 8. 12-V Soft Overload, 3-A to 4.2-A, Power Limit Not
Tripped
2V/div
FLT
1V/div
CT
1A/div
ILOAD
1A/div
ILOAD
2V/div
VOUT
2V/div
VOUT
5ms/div
5ms/div
Figure 9. Firm Overload, 3-A to 5.4 A,
Power Limit Tripped
8
Figure 10. 12-V Hard Overload, 3.6-A Load then Short
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
TPS2590
www.ti.com
SLUS960G – JULY 2009 – REVISED JANUARY 2014
TYPICAL CHARACTERISTICS (continued)
10V/div
10V/div
FLT
FLT
~5W PLIM
~5W PLIM
10V/div
1A/div
1V/div
10V/div
VOUT
ILOAD
1A/div
1V/div
CT
VOUT
ILOAD
CT
0.5ms/div
2ms/div
Figure 11. Power Dissipation During 12-V Startup into a 60Ω, 660-μF Load
Figure 12. Power Dissipation During 12-V Startup into a 15Ω, 110-μF Load
2V/div
FLT
2V/div
FLT
1V/div
CT
1V/div
CT
1A/div
ILOAD
1A/div
ILOAD
2V/div
VOUT
2V/div
VOUT
5ms/div
5ms/div
Figure 13. Startup into a 1-Ω Load
2V/div
FLT
1V/div
CT
1A/div
ILOAD
2V/div
VOUT
Figure 14. Firm Overload, Load Stepped
From 3.8 A to 5.5 A
5ms/div
Figure 15. Hard Overload, Load Stepped
from 3.8 A to 7.1 A
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
9
TPS2590
SLUS960G – JULY 2009 – REVISED JANUARY 2014
www.ti.com
APPLICATION INFORMATION
Startup
Large inrush current occurs when power is applied to discharged capacitors and load. During the inrush period,
the TPS2590 device operates in power limit (or SOA protect mode) managing the current as VOUT rises. In SOA
protect mode, the internal MOSFET power dissipation ([VIN – VOUT] x IOUT) is regulated at 5 W typical while the
fault timer starts and CCT ramps up. As the charge builds on CLOAD, the current increases towards ILIM. When the
capacitor is fully charged, IOUT drops to the dc load value, the fault timer stops, and CCT ramps down. In order for
the TPS2590 device to start properly, the fault timer duration must exceed CLOAD startup time, tON. Startup time
without additional dc loading can be determined using Equation 6 where PLIM = 5 W (typical).
t ON =
CLOAD ×PLIM
2
2×ILIM
+
2
CLOAD ×VIN
2×PLIM
(6)
When the load has a resistive component in addition to CLOAD, the fault time must be extended because the
resistive load current is unavailable to charge CLOAD. Table 1 and Table 2 can be used to predict start-up time in
the presence of resistive dc loading.
Refer to the TPS2590 Design Calculator Tool (SLUC398) for assistance with design calculations.
Table 1. Start-up Time (ms) With DC Loading: VIN = 5 V, PLIM = 3 W, ILIM = 5 A
RLOAD_(Ω)
CLOAD_ = 100 µF
CLOAD_ = 220 µF
CLOAD_ = 470 µF
CLOAD_ = 1000 µF
1000
0.43
0.95
2.03
4.33
10
0.5
1.11
2.36
5.03
5
0.61
1.34
2.87
6.1
3
0.91
2
4.28
9.11
2.5
1.31
2.88
6.14
13.07
Table 2. Start-up Time (ms) With DC Loading: VIN = 12 V, PLIM = 3 W, ILIM = 5 A
RLOAD_(Ω)
CLOAD_ = 100 µF
CLOAD_ = 220 µF
CLOAD_ = 470 µF
CLOAD_ = 1000 µF
10000
2.46
5.41
11.56
24.59
100
2.67
5.87
12.55
26.69
50
2.93
6.45
13.79
29.34
15
6.7
14.74
31.5
67.01
13
11.68
25.69
54.87
116.75
Maximum Allowable Load to Ensure Successful Start-Up
The power limiting function of the TPS2590 device provides very effective protection for the internal FET.
Expectedly, there is a supply voltage dependent maximum allowable load required for successful startup. Loads
above this can cause the output to shut off because of CT timeout or thermal shutdown because VOUT hangs at
an intermediate voltage below VIN. The equation for maximum load (or RMIN is derived using the circuit equations
for VOUT as a function of VIN, RLOAD, PLIM, and the result is quadratic in form.
RMIN ´ I2 - VIN ´ I + PLIM _ MIN = 0
I=
(7)
2
VIN ± VIN
- 4 ´ RMIN ´ PLIM _ MIN
2 ´ RMIN
RMIN ´ I = VOUT =
VIN ±
(8)
2
VIN
- 4 ´ RMIN ´ PLIM _ MIN
2
(9)
(VIN2
When RLOAD < RMIN, the numerical result for VOUT is real
– 4 × RLOAD × PLIM > 0) and less than VIN meaning
the circuit will not start (CT or thermal shutdown). When RLOAD > RMIN, the numerical result for VOUT is imaginary
(VIN2 – 4 × RLOAD x PLIM < 0) and the circuit will start (VOUT = VIN). Ensure that RLOAD is > RMIN per Equation 11.
10
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
TPS2590
www.ti.com
SLUS960G – JULY 2009 – REVISED JANUARY 2014
2
4 ´ RMIN ´ PLIM _ MIN > VIN
RLOAD > RMIN =
(10)
2
VIN
4 ´ PLIM _ MIN
=
2
VIN
12
(11)
Enable Pin Considerations
For the case when EN is simply connected to GND, TPS2590 device begins ramping the voltage on OUT as IN
rises above UVLO (~2.85V typical). If IN does not ramp monotonically, the TPS2590 device can momentarily turn
off then on during startup if IN falls below approximately 2.7 V. To avoid this problem, EN assertion can be
delayed until IN is sufficiently above UVLO. A simple approach is shown in Figure 16. The 100-kΩ pullup resistor
de-asserts EN when IN is above approximately 1.75 V maximum which is well below the minimum UVLO of
approximately 2.6 V. The Zener diode ensures that EN remains below 5 V. User control to enable the TPS2590
device can be applied at the ON node to turn on the FET once IN has risen sufficiently above UVLO.
12V Bus
OUT
IN
100kΩ
16
EN
RTRY
FET
GND
CT
IFLT
ILIM
7
9
8
15
Optional:
To System
Monitor
0.39uF
47.5kΩ
4.6V
38.3kΩ
ON
6
FLT
CLOAD
TPS2590
Figure 16. EN Delay Circuit
Fault Timer
The fault timer is active when the TPS2590 device is in SOA protect mode or the current is above IFAULT.
Figure 17 illustrates operation during non-faulted start-up (CLOAD = 470 µF and IOUT = 1 A in a 12-V system). CCT
charges at approximately 35 µA until the TPS2590 device exits SOA-protect mode, discharges quickly
(approximately 40 µA) to approximately 0.16 V, and then decays slowly (approximately 1.4 µA) towards zero.
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
11
TPS2590
SLUS960G – JULY 2009 – REVISED JANUARY 2014
2V/div
FLT
0.5V/div
CT
1A/div
ILOAD
5V/div
VOUT
www.ti.com
5ms/div
Figure 17. Fault Timer Operation During Start-Up
CCT can be chosen for fault-free start-up including expected CLOAD and CCT capacitance tolerance as shown in
Equation 12.
(1 + CLOAD_TOL + CCT_TOL ) ´ t ON
CCT =
40000
(12)
Normal Operation
When load current exceeds IFAULT during normal operation the fault timer starts. If load current drops below IFAULT
before the fault timer expires, normal operation continues. If load current stays above the IFAULT threshold the
fault timer expires and a fault is declared. When a fault is declared a device operating in latched mode (RTRY >
2 V) turns off and can be restarted by cycling power or toggling the EN signal. A device operating in retry mode
(RTRY < 0.8 V) attempts to turn on at a 3.7% duty cycle until the fault is cleared. When ILIM is reached during a
fault the device goes into current-limit and the fault timer keeps running.
Start-Up into a Short
The controller attempts to power on into a short for the duration of the timer. Figure 13 shows a small current
resulting from power limiting the internal MOSFET. This happens only once in latched mode. In Retry mode, the
cycle repeats at a 3.7% duty cycle.
Shutdown Modes
Hard Overload - Fast Trip
When a hard overload causes the load current to exceed approximately 1.6 × ILIM the TPS2590 device
immediately shuts off current to the load without waiting for the fault timer to expire. After such a shutoff the
TPS2590 device enters startup mode and attempts to apply power to the load. If the hard overload was caused
by a transient, then normal startup can be expected. If the hard overload is caused by a persistent, continuous
failure then the TPS2590 device goes into current-limit during the restart attempt and either latches off or
attempts retry depending on the state of the RTRY input.
12
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
TPS2590
www.ti.com
SLUS960G – JULY 2009 – REVISED JANUARY 2014
Overcurrent Shutdown
Overcurrent shutdown occurs when the output current exceeds IFAULT for the duration of the fault timer. Figure 8
shows a step rise in output current which exceeds the IFAULT threshold but not the ILIM threshold. The increased
current is on for the duration of the timer. When the timer expires, the output is turned off.
Programming the Fault (IFAULT) and Current-limit (ILIM) Thresholds
The IFAULT and ILIM thresholds are user programmable with an external resistor. The TPS2590 device uses an
internal regulation loop to provide a regulated voltage on the IFLT and ILIM pins. The current-limit thresholds are
proportional to the current sourced out of IFLT and ILIM. The recommended 1% resistor range is 49.9 kΩ ≤ RRFLT
≤ 200 kΩ and 40.2 kΩ ≤ RRLIM ≤ 100 kΩ to ensure the rated accuracy. Many applications require that minimum
fault and current-limits are known or that maximum current-limit is bounded. It is important to consider the
tolerance of the fault and current-limit thresholds, as well as RRFLT and RRLIM when selecting values. See the
ELECTRICAL CHARACTERISTICS table for specific fault and current-limit settings.
Using the data for IFAULT and ILIM from the ELECTRICAL CHARACTERISTICS table, equations can be generated
and used for other set points. Equation 13 and Equation 14 are used to calculate minimum and maximum IFAULT
where RRFLT,max and RRFLT,min include RRFLT tolerances. Equation 15 and Equation 16 calculate RRFLT,max and
RRFLT,min where RTOL is the 1% resistor tolerance.
185.58
IFAULT,min =
- 0.13
RRFLT,max
(13)
IFAULT,max =
213.68
+ 0.13
RRFLT,min
(14)
RRFLT,min
213.68
= (1 + RTOL )´
IFAULT,max - 0.13
(15)
RRFLT,max
185.58
= (1 - RTOL )´
IFAULT,min + 0.13
(16)
Equation 17 and Equation 18 are used to calculate minimum and maximum ILIM where RRLIM,max and RRLIM,min
include RRLIM tolerances. Equation 19 and Equation 20 calculate RRLIM,max and RRLIM,min where RTOL is the 1%
resistor tolerance.
201.9
ILIM,min =
- 0.44
RRLIM,max
(17)
ILIM,max =
201.9
RRLIM,min
+ 0.38
(18)
RRLIM,min
201.9
= (1 + RTOL )´
ILIM,max - 0.38
(19)
RRLIM,max
201.9
= (1 - RTOL )´
ILIM,min + 0.44
(20)
Design Example
A
•
•
•
•
•
•
typical design is shown in Figure 18 with the following requirements:
Nominal input voltage, VIN: 12 V
Maximum expected load current, IOUT: 3.7 A
Load capacitance, CLOAD: 100 µF
Expected resistive load, RLOAD during start-up: 13 Ω
Current-limit, ILIM, min: > IFAULT, max
Example calculations are shown in the TPS2590 Design Calculator Tool (SLUC398).
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
13
TPS2590
SLUS960G – JULY 2009 – REVISED JANUARY 2014
12V Bus
www.ti.com
OUT
IN
EN
15
FLT
GND
7
8
38.3kΩ
6
CT
IFLT
ILIM
9
Optional:
To System
Monitor
0.39µF
RTRY
47.5kΩ
16
CLOAD
TPS2590
Figure 18. Design Example Schematic
1. Calculate maximum RRFLT to ensure that minimum IFAULT is above maximum operating load current using
Equation 16 as shown below in Equation 21.
RRFLT,max = 0.99 ´
185.58
= 47.97kW
3.7 + 0.13
(21)
● Choose a standard 1% value below RRFLT,max for RRFLT = 47.5 kΩ
● IFAULT,min = 3.738 A using Equation 13 and meets the maximum operating current requirement of 3.7 A
without starting the fault timer during maximum steady state operation for RRFLT = 47.5 kΩ, 1%.
● IFAULT,max = 4.674 A using Equation 14 for RRFLT = 47.5 kΩ, 1%.
2. Based on maximum IFAULT = 4.674 A, choose minimum ILIM = 4.7 A.
● Calculate RRLIM,max = 38.9 kΩ using Equation 20 and 1% tolerance.
● Choose a standard 1% value below RRLIM,max for RRLIM = 38.3 kΩ.
● ILIM,min = 4.779 A and ILIM,max = 5.705 A using Equation 17 and Equation 18 for RRLIM = 38.3 kΩ, 1%.
3. Minimum RLOAD at start-up using Equation 11 is 12 Ω. Because RLOAD = 13 Ω is present during circuit
start-up, use tON = 12 ms from Table 2 for CLOAD = 100 µF and RLOAD = 13 Ω.
● Calculate CCT = 0.39 µF including CLOAD and CCT tolerances (CLOAD_TOL = 20% and CCT_TOL = 10%)
using Equation 22.
CCT =
(1 + CLOAD _ TOL + CT _ TOL ) ´ t ON
40000
=
(1 + 0.2 + 0.1) ´ 0.012
= 0.39mF
40000
(22)
Transient Protection
The need for transient protection in conjunction with hot-swap controllers should always be considered. When
the TPS2590 device interrupts current flow, input inductance generates a positive voltage spike on the input and
output inductance generates a negative voltage spike on the output. Such transients can easily exceed twice the
supply voltage if steps are not taken to address the issue. Typical methods for addressing transients include;
• Minimizing lead length/inductance into and out of the device.
• Transient Voltage Suppressors (TVS) on the input to absorb inductive spikes.
• Schottky diode across the output to absorb negative spikes.
• A combination of ceramic and electrolytic capacitors on the input and output to absorb energy.
The following equation estimates the magnitude of these voltage spikes:
14
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
TPS2590
www.ti.com
SLUS960G – JULY 2009 – REVISED JANUARY 2014
Where;
VSPIKE(absolute ) = VNOM + ILOAD ´ L
•
•
•
•
C
VNOM equals the nominal supply voltage
ILOAD equals the load current
C equals the capacitance present at the input or output of the TPS2590
L equals the effective inductance seen looking into the source or the load
(23)
The inductance because of a straight length of wire equals approximately.
Where;
æ 4´L
ö
- 0.75 ÷ (nH)
Lstraightwire » 0.2 ´ L ´ ln ç
è D
ø
•
•
L equals the length of the wire
D equals wire diameter
(24)
Some applications may require the addition of a TVS to prevent transients from exceeding the absolute ratings if
sufficient capacitance cannot be included.
Layout
Support Components
Locate all TPS2590 support components, RRFLT, RRLIM, CCT, or any input or output voltage clamps, close to their
connection pin. Connect the other end of the component to the inner layer GND without trace length. The traces
routing the RRFLT and RRLIM resistors to the TPS2590 device must be as short as possible to reduce parasitic
effects on fault and current-limit accuracy.
PowerPad™
When properly mounted the PowerPad package provides significantly greater cooling ability than an ordinary
package. To operate at rated power the Power Pad must be soldered directly to the PC board GND plane
directly under the device. The PowerPad is at GND potential and can be connected using multiple vias to inner
layer GND. Other planes, such as the bottom side of the circuit board can be used to increase heat sinking in
higher current applications. Refer to Technical Briefs: PowerPAD™ Thermally Enhanced Package (TI Literature
Number SLMA002) and PowerPAD™ Made Easy (TI Literature Number SLMA004) for more information on using
this PowerPad package. These documents are available at www.ti.com (Search by Keyword).
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
15
TPS2590
SLUS960G – JULY 2009 – REVISED JANUARY 2014
www.ti.com
REVISION HISTORY
Changes from Original (July 2009) to Revision A
•
Page
Changed the Application diagram ......................................................................................................................................... 1
Changes from Revision A (July 2010) to Revision B
Page
•
Added Feature: UL Listed - File Number E169910 .............................................................................................................. 1
•
Changed the Application diagram ......................................................................................................................................... 1
Changes from Revision B (August 2010) to Revision C
Page
•
Added the IFLT description ................................................................................................................................................... 6
•
Changed current-limit vs Junction Temperature graph ........................................................................................................ 7
Changes from Revision C (September 2011) to Revision D
•
Page
Changed Figure 5 through Figure 15. .................................................................................................................................. 7
Changes from Revision D (October 2011) to Revision E
Page
•
Changed the RECOMMENDED OPERATING CONDITIONS table .................................................................................... 2
•
Changed the ELECTRICAL CHARACTERISTICS table ...................................................................................................... 3
•
Changed the PIN DESCRIPTION, CT section ..................................................................................................................... 5
•
Changed the PIN DESCRIPTION, ILIM section ................................................................................................................... 6
•
Changed the PIN DESCRIPTION, EN section ..................................................................................................................... 6
•
Changed the PIN DESCRIPTION, VIN section: 18 V to 20 V and VIN to IN ....................................................................... 6
•
Changed the PIN DESCRIPTION, OUT section .................................................................................................................. 6
•
Changed the APPLICATION INFORMATION SECTION. Deleted the Maximum Load at Startup section. ....................... 10
•
Changed the Transient Protection section .......................................................................................................................... 14
Changes from Revision E (April 2013) to Revision F
•
Page
Deleted Voltage IFAULT, ILIM from the ABSOLUTE MAXIMUM RATINGS table ............................................................... 2
Changes from Revision F (May 2013) to Revision G
Page
•
Deleted the minimum voltage from the voltage range listed in the document title, features list and description ................. 1
•
Added 5-A to document title ................................................................................................................................................. 1
•
Changed listed to recognized in last Features bullet. Also added 2367 to UL number ....................................................... 1
•
Added SSDs, PCIE, and Fan Control list items to the APPLICATIONS list ......................................................................... 1
•
Added UV turn-on threshold and bus voltage text to the first paragraph of the DESCRIPTION ......................................... 1
•
Deleted ORDERING INFORMATION table .......................................................................................................................... 2
16
Submit Documentation Feedback
Copyright © 2009–2014, Texas Instruments Incorporated
Product Folder Links: TPS2590
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS2590RSAR
ACTIVE
QFN
RSA
16
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TPS
2590
TPS2590RSAT
ACTIVE
QFN
RSA
16
250
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 125
TPS
2590
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
工商网监
湘ICP备2023018690号
