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Table of Contents
User’s Guide
TPS546C20A 2-Phase SWIFT Step-Down Converter
Evaluation Module User's Guide
ABSTRACT
The TPS546C20AEVM2-746 evaluation module (EVM) is a two phase buck converter with two TPS546C20A
devices. The TPS546C20A device is a stackable synchronous buck with PMBus interface that can operate from
a nominal 4.5-V to 18-V supply. The device allows programming and monitoring through the PMBus interface.
Two TPS546C20A devices are configured as a two-phase buck converter in factory default and output current is
evenly distributed in the two devices. Both the negative and positive output terminals are connected together.
Table of Contents
1 Description.............................................................................................................................................................................. 3
1.1 Before You Begin............................................................................................................................................................... 3
1.2 Typical Applications............................................................................................................................................................3
1.3 Features............................................................................................................................................................................. 4
2 Electrical Performance Specifications................................................................................................................................. 4
3 Schematic................................................................................................................................................................................5
4 Test Setup................................................................................................................................................................................6
4.1 Test and Configuration Software........................................................................................................................................ 6
4.2 Test Equipment.................................................................................................................................................................. 6
4.3 Recommended Test Setup.................................................................................................................................................7
4.4 List of Test Points, Jumpers and Connectors.....................................................................................................................8
5 EVM Configuration Using the Fusion GUI..........................................................................................................................10
5.1 Configuration Procedure...................................................................................................................................................11
6 Test Procedure...................................................................................................................................................................... 12
6.1 Line and Load Regulation and Efficiency Measurement Procedure................................................................................ 12
6.2 Control Loop Gain and Phase Measurement Procedure................................................................................................. 12
6.3 Efficiency Measurement................................................................................................................................................... 13
7 Performance Data and Typical Characteristic Curves...................................................................................................... 14
7.1 Efficiency..........................................................................................................................................................................14
7.2 Load Regulation............................................................................................................................................................... 14
7.3 Line Regulation................................................................................................................................................................ 15
7.4 Transient Response......................................................................................................................................................... 15
7.5 Output Ripple................................................................................................................................................................... 16
7.6 Control On........................................................................................................................................................................17
7.7 Control Off........................................................................................................................................................................ 18
7.8 Current Sharing Between Two Phases............................................................................................................................ 19
7.9 Control Loop Bode Plot.................................................................................................................................................... 19
7.10 Thermal Image............................................................................................................................................................... 21
8 EVM Assembly Drawing and PCB Layout.......................................................................................................................... 22
9 Bill of Materials..................................................................................................................................................................... 31
10 Screenshots........................................................................................................................................................................ 33
10.1 Fusion GUI Screenshots................................................................................................................................................ 33
11 Revision History..................................................................................................................................................................44
List of Figures
Figure 3-1. TPS546C20AEVM2-746 Schematic..........................................................................................................................5
Figure 4-1. TPS546C20AEVM2-746 EVM Recommended Test Setup....................................................................................... 7
Figure 4-2. Tip and Barrel Measurement..................................................................................................................................... 7
Figure 7-1. Efficiency of 0.9-V Output vs Line and Load........................................................................................................... 14
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Figure 7-2. Load Regulation of 0.9-V Output.............................................................................................................................14
Figure 7-3. Line Regulation of 0.9-V Output (Different Board)...................................................................................................15
Figure 7-4. Transient Response of 0.9-V Output at 12 VIN, Transient is 10 A to 60 A, 0.2 A/µs............................................... 15
Figure 7-5. Output Ripple and SW Node of 0.9-V Output at 12 VIN, 0-A Output....................................................................... 16
Figure 7-6. Output Ripple and SW Node of 0.9-V Output at 12 VIN, 70-A Output..................................................................... 16
Figure 7-7. Start-Up from Control, 0.9-V Output at 12 VIN, 0-A Output .................................................................................... 17
Figure 7-8. Start-Up from Control, 0.9-V Output at 12 VIN, 70-A Output .................................................................................. 17
Figure 7-9. Soft Stop from Control, 0.9-V Output at 12 VIN, 0-A Output ................................................................................... 18
Figure 7-10. Soft Stop from Control, 0.9-V Output at 12 VIN, 70-A Output ............................................................................... 18
Figure 7-11. Inductor Current and Switch Node Waveform, 0.9-V Output at 12 VIN, 70-A Output............................................ 19
Figure 7-12. Bode Plot at 0.9-V Output at 12 VIN, 0-A Output................................................................................................... 19
Figure 7-13. Bode Plot at 0.9-V Output at 12 VIN, 70-A Output................................................................................................. 20
Figure 7-14. Thermal Image...................................................................................................................................................... 21
Figure 8-1. TPS546C20AEVM2-746 EVM 3D (Top View)......................................................................................................... 22
Figure 8-2. TPS546C20AEVM2-746 EVM Top Layer Assembly Drawing (Top View)............................................................... 23
Figure 8-3. TPS546C20AEVM2-746 EVM Bottom Assembly Drawing (Bottom View).............................................................. 24
Figure 8-4. TPS546C20AEVM2-746 EVM Top Copper (Top View)........................................................................................... 25
Figure 8-5. TPS546C20AEVM2-746 EVM Internal Layer 1 (Top View).....................................................................................26
Figure 8-6. TPS546C20AEVM2-746 EVM Internal Layer 2 (Top View).....................................................................................27
Figure 8-7. TPS546C20AEVM2-746 EVM Internal Layer 3 (Top View).....................................................................................28
Figure 8-8. TPS546C20AEVM2-746 EVM Internal Layer 4 (Top View).....................................................................................29
Figure 8-9. TPS546C20AEVM2-746 EVM Bottom Copper (Top View)......................................................................................30
Figure 10-1. Select Device Scanning Mode.............................................................................................................................. 33
Figure 10-2. Configure – Limits and On/Off for U1 and U2 .......................................................................................................34
Figure 10-3. ON/OFF Control Pop-Up....................................................................................................................................... 36
Figure 10-4. Configure – Advanced...........................................................................................................................................37
Figure 10-5. Configure – SMBALERT # Mask........................................................................................................................... 38
Figure 10-6. Configure – Device Info.........................................................................................................................................39
Figure 10-7. Configure – All Config........................................................................................................................................... 40
Figure 10-8. Monitor Screen with 10-A Total Load.................................................................................................................... 41
Figure 10-9. Status Screen........................................................................................................................................................43
List of Tables
Table 2-1. TPS546C20AEVM2-746 Electrical Performance Specifications.................................................................................4
Table 4-1. Test Point Functions....................................................................................................................................................8
Table 4-2. Jumpers...................................................................................................................................................................... 9
Table 4-3. Connector Functions...................................................................................................................................................9
Table 5-1. Key Factory Configuration Parameters.....................................................................................................................10
Table 6-1. List of Test Points for Loop Response Measurements..............................................................................................12
Table 6-2. Test Points for Better Efficiency Measurements........................................................................................................13
Table 9-1. TPS546C20AEVM2-746 Components List............................................................................................................... 31
Trademarks
All trademarks are the property of their respective owners.
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Description
1 Description
The TPS546C20AEVM2-746 is a two-phase buck converter with two stacked TPS546C20A devices. It uses a
nominal 12-V bus to produce a regulated 0.9-V output at up to 70 A of load current. The TPS546C20AEVM2-746
is designed to demonstrate stacking operation of the TPS546C20A in a two-phase low output voltage application
while providing a number of test points to evaluate the performance of the devices. The TPS546C20AEVM2-746
can be modified to two separated single phase buck converters by changing the components assembled. Refer
to the TPS546C20A (TPS546C20A 4.5-V to 18-V, 35-A Stackable Synchronous Buck Converters with PMBus )
data sheet for more information on single-phase configuration.
1.1 Before You Begin
The following warnings and cautions are noted for the safety of anyone using or working close to the
TPS546C20AEVM2-746. Observe all safety precautions.
Warning
The TPS546C20AEVM2-746 circuit module can become hot during operation due
to dissipation of heat. Avoid contact with the board. Follow all applicable safety
procedures applicable to your laboratory.
Caution
Do not leave the EVM powered when unattended.
!
WARNING
The circuit module has signal traces, components, and component leads on the bottom of the board.
This can result in exposed voltages, hot surfaces, or sharp edges. Do not reach under the board
during operation.
CAUTION
The circuit module can be damaged by over temperature. To avoid damage, monitor the temperature
during evaluation and provide cooling, as needed, for the system environment.
CAUTION
Some power supplies can be damaged by application of external voltages. If using more than
one power supply, check the equipment requirements and use blocking diodes or other isolation
techniques, as needed, to prevent damage to the equipment.
CAUTION
The communication interface is not isolated on the EVM. Be sure no ground potential exists between
the computer and the EVM. Also be aware that the computer is referenced to the battery- potential of
the EVM.
1.2 Typical Applications
•
•
•
•
•
•
•
High-density power solutions
Wireless infrastructure
Switcher
Router network
Server
Storage
Smart power systems
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1.3 Features
•
•
•
Regulated 0.9-V output up to 70-A DC steady-state output current
The output voltage is marginable and trimmable with the PMBus interface.
– Programmable UVLO, soft start, and enable with the PMBus interface
– Programmable overcurrent warning and fault limits and programmable response to faults with the PMBus
interface
– Programmable overvoltage and undervoltage warning and fault limits and programmable response to
faults with the PMBus interface
– Programmable turn-on and turn-off delays
Convenient test points for probing critical waveforms
2 Electrical Performance Specifications
Table 2-1 lists the electrical performance specifications under room temperature 25°C.
Table 2-1. TPS546C20AEVM2-746 Electrical Performance Specifications
Parameter
Test Conditions
MIN
TYP
MAX
Unit
12
18
V
Input Characteristics
Voltage range
VIN
Maximum input current
VIN = 12 V, IO = 70 A
5
6.5
A
No load input current
VIN = 12 V, IO = 0 A
120
mA
Output Characteristics
Output voltage, VOUT
0.9
Output load current, IOUT (1)
Output voltage regulation
Output voltage ripple, VOUT
Output overcurrent protection threshold
0
V
70
A
Line regulation: input voltage = 5 V to 18 V
1%
Load regulation: output current = 0 A to 70 A
1%
VIN = 12 V, IOUT = 70 A
10
mVpp
Load current IOUT1, default setting of U1
42
A
Load current IOUT2, default setting of U2
42
A
VIN = 12 V
500
kHz
VIN = 12 V, IOUT = 70 A
83%
Systems Characteristics
Switching frequency
Full load efficiency, VOUT
(2)
Operating temperature
Tambient
25
U1 PMBUS address
Fixed
36
U2 PMBus address
Fixed
37
U1 voltage reference
Programmed by VSEL resistor R35
900
U2 voltage reference
Programmed by VSEL resistor R36
950
U1 soft-start time (TON_RISE)
Programmed by SS resistor R33
5
U2 soft-start time (TON_RISE)
Programmed by SS resistor R37
7
°C
PMBUS Interface and Pin-Strapping
(1)
(2)
4
Decimal
mV
ms
The output current IOUT can be up to 80 A, if the output overcurrent limit (IOUT_OC_FAULT_LIMIT) is set to 45 A.
The efficiency is measured based on Figure 4-1 and test setups, which includes power loss caused by on board copper traces.
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Schematic
3 Schematic
Figure 3-1 illustrates the TPS546C20AEVM2-746 EVM schematic.
LED1
R1
1.00k
CNTL
CLK
TP3
TP4
DNP
DNP
CNTL
CLK
DATA SMBA LRT
Green
TP1
1
3
5
7
9
2
4
6
8
10
TP2
DNP
DNP
SMBALRT
DATA
J1
CLK_M
CLK_S
R48
0
R49
0
DATA_M
VIN = 4.5 - 18 VDC
DATA_S
J2
GND
PMBus
R50
0
R51
0
J3
TP5
1546
TP6
1546
GND
VIN
PVIN1
AVIN1
AVIN2
PVIN2
TP9
TP7
TP8
TP10
R2
R3
0
0
C1
1µF
C6
6800pF
C7
6800pF
TP11
C8
6800pF
C9
22µF
C10
22µF
C11
22µF
C2
100µF
C12
22µF
C3
100µF
C4
100µF
C5
100µF
C13
22µF
C14
22µF
C15
22µF
MASTER
PVin
C16
22µF
C17
6800pF
C18
6800pF
TP12
C19
6800pF
C20
1µF
SLAVE
GND
TPS546C20ARVF
R6
1.10k
1200pF
CHA1
CHB1
TP14
TP15
TP18
R10
R11
DNP
10.0k
49.9
R9
DNP
35
36
C28
R21
37
SYNC
39
5.60k
C31 2200pF
JP2
270pF
TP25
RST/PG1
C33
2.2µF
C38
2.2µF
C39
4.7µF
C40
0.1µF
R33
34.8k
CNTL
3
2
1
JP3
R34
DNP
10.0k
AVIN
R25
10.0k
CLK_M
R32
DNP
DATA_M
10.0k
R35
34.8k
Fsw = 500kHz
R38
40.2k
40
7
0.1µF
SW
SW
SW
SW
SW
10.0k
R17
10.0k
29
BOOT
DIFFO
RSP
33
RSN
34
R15
49.9
300nH
Coupled Inductor
SS
VSEL
5
PMB_CLK
4
PMB_DATA
ISHARE
Avg2
DNP
TP22
DNP
SMB2
R19
10.0k
GND
GND
31
ISHARE1
32
VSHARE1
DIFFO
35
FB
36
SYNC
CNTL
RSP_S
RSN_S
33
RSP
34
RSN
ISHARE
5.11k
R27
5.11k
ISHARE2
31
VSHARE2
32
28
SS
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
26
DRGND
38
AGND
PAD
13
14
15
16
17
18
19
20
13
14
15
16
17
18
19
20
41
41
PGND
PGND
PGND
PGND
PGND
PGND
PGND
PGND
1.10k
TP17
3
2
1
DNP
R14
10.0k
10.0k
R20
5.60k
2200pF
CNTL
TP13
1200pF
R13
C32
JP4
270pF
R24
RST/PG2
TP26
10.0k
3
VSEL
2
5
PMB_DATA
4
SMB_ALRT
C24
R8
CHA2
TP16
R12
DNP
49.9
30
PMB_CLK
VSHARE
CHB2
39
27
RT
SMB_ALRT
JP1
10.0k
37
40
BP6
ISHARE
0
RT
SMBALRT
SYNC
C27
BP3
RESET/PGD
TP43
R30
VSHARE
0
29
ISHARE2
TP41
R26
R29
AVIN
COMP
TP24
ISHARE1
TP40
21
22
23
24
25
C26
1000pF
GND
VSHARE2
PVIN
PVIN
PVIN
PVIN
PVIN
R7
SW
SW
SW
SW
SW
C30 R23
1µF
1.0
GND
TP42
VSHARE
TP20
1
VSHARE1
2
R16
49.9
DNP
SMB1
TP23
8
9
10
11
12
SW2
3
BOOT
0.1µF
300nH
1
DNP
TP21
7
2
DNP
1µF
RSP_M
RSN_M
RESET/PGD
3
6
Avg1
R18
10.0k
C29
R22
1.0
CNTL
BP6
L3
4
TP19
C22
L2
SW1
SYNC
BP3
1
0
1
COMP
28
JP5
R5
0
300nH
C25
1000pF
FB
R4
L1
8
9
10
11
12
27
30
TPS546C20ARVF
U2
C21
2
C23
PVIN
PVIN
PVIN
PVIN
PVIN
2
U1
21
22
23
24
25
1
R28
DNP
C34
4.7µF
DATA_S
R36
51.1k
JP6
SMBALRT
DRGND
AGND
38
C35
0.1µF
C36
2.2µF
C37
2.2µF
Fsw = 500kHz
6
26
R31
DNP
10.0k
10.0k
CLK_S
R37
51.1k
R39
40.2k
PAD
TP27
GND
VOUT1
VOUT2
TP28
DNP
DNP
TP29
J4
1
0
DNP
SMB4
2
R42
1
2
0
J5
DNP
SMB3
R40
Dual_RSN
Dual_RSN
GND
Dual_RSP
J6
J8
VOUT1
0.35-5.5V/35A max
VOUT1
DNP
TP30
R44
49.9
1546
TP36
RSP2
R45
TP32
C60 DNP C61
47uF
47uF
C72
DNP C73
470µF
470µF
C41DNP C42DNP C62DNP C63
47µF
47uF
47uF
47uF
C64DNP C65 DNP C66 DNP C43
47µF
47uF
47uF
47uF
C44
47µF
C45
47µF TP34
TP35
DNP
DNP C46 DNP C47
47uF
47uF
C48
47µF
C49 DNP C50DNP C51
47µF
47uF
47uF
C52DNP C53 DNP C54
47µF
47uF
47uF
C55
47µF
C74
DNP C75
DNP C67
470µF
470µF
47uF
49.9
DNP
C76
330pF
R47
TP38
49.9
DNP
RSN_S
TP39
RSN2
GND
J10
J11
GND
1546
RSP_S
TP33
C68 DNP C69 DNP C70DNP C71
47uF
47uF
47uF
47uF
DNP
TP37
RSN1
0
VOUT2
VOUT_S
R46
49.9
1546
J9
VOUT_M
DNP C57DNP C58DNP C59
47uF
47uF
47uF
DNP
RSN_M
Dual_RSP
TP31
C56
330pF
0
R43
J7
VOUT2
0.35-5.5V/35A max
RSP1
RSP_M
R41
GND
GND
1546
Figure 3-1. TPS546C20AEVM2-746 Schematic
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Test Setup
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4 Test Setup
4.1 Test and Configuration Software
In order to change any of the default configuration parameters on the EVM, it is necessary to obtain the TI
Fusion Digital Power Designer software.
4.1.1 Description
The Fusion Digital Power Designer is the graphical user interface (GUI) used to configure and monitor the Texas
Instruments TPS546C20A power converter installed on this evaluation module. The application uses the PMBus
protocol to communicate with the controller over serial bus by way of a TI USB adapter. This adapter can be
purchased at http://www.ti.com/tool/usb-to-gpio.
4.1.2 Features
Some of the tasks that can be performed with the GUI include:
•
•
•
Turn on or off the power supply output, either through the hardware control line or the PMBus operation
command.
Monitor real-time data, such as output voltage, output current, die temperature, warnings, and faults, which
are continuously monitored and displayed by the GUI.
Configure common operating characteristics such as VOUT trim and margin, UVLO, soft-start time, warning
and fault thresholds, fault response, and ON/OFF modes.
This software is available for download at http://www.ti.com/tool/fusion_digital_power_designer.
4.2 Test Equipment
4.2.1 Voltage Source
The input voltage source, VIN, should be a 0-V to 20-V variable DC source capable of supplying 25 ADC.
Connect input VIN and GND to J2 and J3 as shown in Figure 4-1.
4.2.2 Multimeters
It is recommended to use two separate multi-meters as shown in Figure 4-1: one meter to measure VIN, the
other to measure VOUT.
4.2.3 Output Load
A variable electronic load is recommended for the test setup as shown in Figure 4-1. The load should be capable
of 80 A.
4.2.4 Oscilloscope
An oscilloscope is recommended for measuring output noise and ripple. Output ripple should be measured using
a Tip-and-Barrel method or better as shown in Figure 4-2.
4.2.5 Fan
During prolonged operation at high loads, it can be necessary to provide forced air cooling with a small fan
aimed at the EVM. The surface temperature of the devices on the EVM should be maintained below 105°C.
4.2.6 USB-to-GPIO Interface Adapter:
A communications adapter is required between the EVM and the host computer. This EVM was designed
to use the Texas Instruments USB-to-GPIO Adapter. This adapter can be purchased at http://www.ti.com/tool/
usb-to-gpio.
4.2.7 Recommended Wire Gauge
•
•
6
Input VIN and GND to J2 and J3 (GND) (12-V input) – The recommended wire size is AWG #12, with the total
length of wire less than two feet (1-feet input, 1-feet return).
Output J8/J7 and GND J10/J11 (0.9-V output) – The minimum recommended wire size is AWG #10, with the
total length of wire less than two feet (1-feet output, 1-feet return).
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Test Setup
4.3 Recommended Test Setup
Figure 4-1 shows the recommended test setup.
Figure 4-1. TPS546C20AEVM2-746 EVM Recommended Test Setup
Figure 4-2 illustrates the tip and barrel measurement for switching node waveform on TP19 with TP23 or TP20
with TP24.
Metal Ground
Barrel
Probe
Tip
Tip and Barrel VOUT Ripple
Measurement
Figure 4-2. Tip and Barrel Measurement
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Test Setup
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4.4 List of Test Points, Jumpers and Connectors
Table 4-1 lists the test point functions.
Table 4-1. Test Point Functions
8
Test
Point
Type
Name
TP1
Not Assembled
DATA
TP2
Not Assembled
SMB_ALERT
TP3
Not Assembled
CNTL
TP4
Not Assembled
CLK
CLK signal on J1 socket
TP5
T-H Loop
VIN
VIN+ measurement point
TP6
T-H Loop
GND
VIN– measurement point
TP7
T-H Loop
PVIN1
PVIN pin voltage of U1 device measurement point
TP8
T-H Loop
PVIN2
PVIN pin voltage of U2 device measurement point
TP9
T-H Loop
AVIN1
AVIN pin voltage of U1 device measurement point
TP10
T-H Loop
AVIN2
AVIN pin voltage of U2 device measurement point
TP11
T-H Loop
GND
GND reference
TP12
T-H Loop
GND
GND reference
TP13
Not Assembled
ADJ
Analog input to adjust rail 2 output voltage
TP14
T-H Loop
CHA1
Input for small signal loop gain measurements for output rail 1 (B/A setup)
TP15
T-H Loop
CHB1
OUTPUT for small signal loop gain measurements for output rail 1 (B/A setup)
TP16
T-H Loop
CHB2
OUTPUT for small signal loop gain measurements for output rail 2 (B/A setup)
TP17
T-H Loop
CHA2
Input for small signal loop gain measurements for output rail 2 (B/A setup)
TP18
Not Assembled
ADJ
Analog input to adjust rail 1 output voltage
TP19
T-H Loop
SW1
Switching node of output rail 1 measurement point, reference to TP23
TP20
T-H Loop
SW2
Switching node of output rail 2 measurement point, reference to TP24
TP21
Not Assembled
AVG1
Rail 1 switching node average voltage measurement point, reference to TP23
TP22
Not Assembled
AVG2
Rail 2 switching node average voltage measurement point, reference to TP24
TP23
T-H Loop
PGND1
GND reference for switching node measurement
TP24
T-H Loop
PGND2
GND reference for switching node measurement
TP25
T-H Loop
RST/RG1
PGOOD signal of output 1
TP26
T-H Loop
RST/PG2
PGOOD signal of output 2
Description
DATA signal on J1 socket
SMBALERT signal on J1 socket
CNTL signal on J1 socket
TP27
T-H Loop
GND
TP28
Not Assembled
EFF_VO1
GND reference
U1 output voltage measurement point for efficiency, reference to TP34
TP29
Not Assembled
EFF_VO2
U2 output voltage measurement point for efficiency, reference to TP35
TP30
Not Assembled
RSP1
TP31
T-H Loop
+VOSENSE1
VOUT1+ measurement point
TP32
T-H Loop
+VOSENSE2
VOUT2+ measurement point
TP33
Not Assembled
RSP2
TP34
Not Assembled
EFF_GND1
Rail 1 output voltage referencing GND for efficiency measurement
TP35
Not Assembled
EFF_GND2
Rail 1 output voltage referencing GND for efficiency measurement
TP36
Not Assembled
RSN1
TP37
T-H Loop
–VOSENSE1
VOUT1– measurement point
TP38
T-H Loop
–VOSENSE2
VOUT2– measurement point
TP39
Not Assembled
RSN2
TP40
T-H Loop
Vshare2
VSHARE of U2 measurement point. Sensitive signal
TP41
T-H Loop
Ishare1
ISHARE of U1 measurement point. Sensitive signal
TP42
T-H Loop
Vshare1
VSHARE of U1 measurement point. Sensitive signal
TP43
T-H Loop
Ishare2
ISHARE of U2 measurement point. Sensitive signal
Output 1 remote sense + voltage point
Output 2 remote sense + voltage point
Output 1 remote sense - voltage point
Output 2 remote sense - voltage point
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Test Setup
Table 4-2 lists the EVM jumpers.
Table 4-2. Jumpers
Jumper
Type
Name
Description
JP1
Header, 100 mil, 2×1
SYNC2
Synchronization connection between U1 and U2. Jumper is plugged as
default.
JP2
Header, 100 mil, 2×1
SYNC1
Synchronization connection between U1 and U2. Jumper is plugged as
default.
JP3
Header, 100 mil, 3×1
CNTL1
PMBUS CNTL connection options for U1 to socket J1 or GND. Jumper
connecting U1 to J1 is plugged as default.
JP4
Header, 100 mil, 3×1
CNTL2
PMBUS CNTL connection options for U2 to socket J1 or GND. Jumper
connecting U2 to J1 is plugged as default.
JP5
Header, 100 mil, 2×1
ALERT1
PMBUS SMBALERT connection between U1 and socket J1. Jumper
connecting U1 to J1 is plugged as default.
JP6
Header, 100 mil, 2×1
ALERT2
PMBUS SMBALERT connection between U2 and socket J1. Jumper
connecting U2 to J1 is plugged as default.
Table 4-3 lists the EVM connector functions.
Table 4-3. Connector Functions
Connector
Type
Name
J1
Header, 100mil, 5x2
PMBUS
Description
J2
Keystone 1546
VIN
VIN+ connector
J3
Keystone 1546
GND
VIN– (GND) connector
PMBUS socket for TI FUSION adaptor
J8
Keystone 1546
VOUT1
VOUT1+ connector
J10
Keystone 1546
GND
VOUT1– connector
J7
Keystone 1546
VOUT2
VOUT2+ connector
J11
Keystone 1546
GND
VOUT2– connector
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EVM Configuration Using the Fusion GUI
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5 EVM Configuration Using the Fusion GUI
The TPS546C20A on this EVM leave the factory pre-configured. See Table 5-1 for a short list of key factory
configuration parameters as obtained from the configuration file.
Table 5-1. Key Factory Configuration Parameters
ADDRESS
DEC
PART ID
DESIGNATOR
0x44
36
TPS546C20A
U1
0x44
37
TPS546C20A
U2
ADDRESS HEX
GENERAL
CMD
CODE
HEX
ENCODED HEX
DECODED
VIN_OFF
0x36
0xF010
4.0 V
Turn OFF voltage
VIN_ON
0x35
0xF012
4.5 V
Turn ON voltage
IOUT_CAL_OFFSET
0x39
0xE000
0.0000 A
IOUT_OC_FAULT_LIMIT
0x46
0xF854
42 A
IOUT_OC_FAULT_RESPONSE
0x47
0xFF
Restart
IOUT_OC_WARN_LIMIT
0x4A
0xF84A
37 A
OC warning level
VOUT_COMMAND
0x21
0x0133
0.6 V
Reference voltage
VOUT_MIN
0x2B
00B3h
0.35V
Minimum reference voltage
VOUT_MAX
0x24
0x034D
1.65 V
maximum reference voltage
VOUT_TRANSITION_RATE
0x27
0xD03C
1 mV/us
VOUT_SCALE_LOOP
0x29
0xF004
1
CMD Code
UV FAULT
PCT_OV_UV_WRN_FLT_LIMITS
0xD6
0x00
VOUT_OV_FAULT_RESPONSE
0x41
0xBF
VOUT_UV_FAULT_RESPONSE
0x45
ON_OFF_CONFIG
0x02
OPERATION
COMMENTS
Current offset for PMBUS readout
OC fault level
Response to OC fault
Vout transition rate
Output sense scaling ratio for main
control loop
83%
UV WARN
88%
OV WARN
112%
OV FAULT
117%
Output OV/UV settings, reference to
nominal reference voltage
Restart
Output overvoltage fault response
0xBF
Restart
Output undervoltage fault response
0x16
CNTL only, Active High.
Control signal and operation command
0x01
0x00
Operation is not used to
enable regulation
Can be used to control device On/Off
OT_FAULT_LIMIT
0x4F
0x0091
145°C
OT fault level
OT_WARN_LIMIT
0x51
0x0078
120°C
OT warn level
OT_FAULT_RESPONSE
0x50
0x3F
Ignore
Response to over temperature faults
TON_DELAY
0x60
0x0000
0 ms
Turn-on delay
TON_RISE
0x61
0x0003
3 ms
Soft-start time
TON_MAX_FAULT_LIMIT
0x62
0x0000
Disabled
TOFF_DELAY
0x64
0x0000
0 ms
Turn-off delay
TOFF_FALL
0x65
0x0000
0 ms
Soft-stop fall time
Upper limit for Vout reaching regulation
If it is desired to configure the EVM to settings other than the factory settings shown above, the TI Fusion
Digital Power Designer software can be used for reconfiguration. It is necessary to have input voltage applied
to the EVM prior to launching the software so that the TPS546C20A can respond to the GUI and the GUI can
recognize the device. The default configuration for the EVM is to start converting at an input voltage of 4.5 V,
therefore, to avoid any converter activity during configuration, an input voltage less than 4.5 V should be applied.
An input voltage of 4 V is recommended.
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EVM Configuration Using the Fusion GUI
5.1 Configuration Procedure
1.
2.
3.
4.
5.
Adjust the input supply to provide 4 VDC, current limited to 1 A.
Apply the input voltage to the EVM. Refer to Figure 4-1 for connections and test setup.
Launch the Fusion GUI software. Refer to the screenshots in Section 10 for more information.
Configure the EVM operating parameters as desired.
VSEL and SS pin resistors on the EVM would program VOUT_COMMAND and TON_RISE at power
up. By default, the device would ignore the values stored in the internal non-volatile memory and
write corresponding registers with the resistor programmed value. If the DIS_VSEL bit in OPTIONS
(MFR_SPECIFIC_21) (E5h) is modified to 1 (default 0), the initial VOUT_COMMAND would be same as
the value stored in the internal non-volatile memory. Please see the data sheet for more details.
By default, U1 is configured as a loop controller, U2 is configured as loop follower, and the PMBUS address for
U1 is 36 decimal and for U2 is 37 decimal. These two addresses are fixed.
Both device can be configured or monitored through PMBUS interface at different address.
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Test Procedure
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6 Test Procedure
6.1 Line and Load Regulation and Efficiency Measurement Procedure
1.
2.
3.
4.
5.
6.
7.
8.
Set up the EVM as described in Figure 4-1.
Ensure the electronic loads is set to draw 0 ADC.
Increase VIN from 0 V to 12 V using voltage meter to measure input voltage.
Use the other voltage meter to measure output voltage VOUT.
Vary the load from 0 to 70 ADC. VOUT should remain in regulation as defined in Table 2-1.
Vary VIN from 5 V to 18 V. VOUT should remain in regulation as defined in Table 2-1.
Decrease the load to 0 A.
Decrease VIN to 0 V.
6.2 Control Loop Gain and Phase Measurement Procedure
The TPS546C20AEVM2-746 EVM includes a 49.9-Ω series resistor in the feedback loop for VOUT . The resistor
is accessible at the test points TP14 / TP15 for loop response analysis. These test points should be used during
loop response measurements as the perturbation injecting points for the loop . See the description in Table 6-1.
Table 6-1. List of Test Points for Loop Response Measurements
Test Point Node Name
Description
Comment
TP14
CHA1
Input to feedback divider of VOUT
The amplitude of the perturbation at this node should be limited to less than 30 mV
TP15
CHB1
Resulting output of VOUT
Bode can be measured by a network analyzer with a CH-B/CH-A configuration
Measure only one output at a time, with the following procedure:
1. Set up the EVM as described in Figure 4-1.
2. For VOUT, connect the isolation transformerof the network analyzer from TP14 to TP15.
3. Connect the input signal measurement probe to TP14. Connect the output signal measurement probe to
TP15.
4. Connect the ground leads of both probe channels to TP11.
5. On the network analyzer, measure the Bode as TP15/TP14 (Out/In).
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6.3 Efficiency Measurement
In order to evaluate the efficiency of the power train (device and inductor), it is important to measure the voltages
at the correct location. This is necessary because otherwise the measurements will include losses that are not
related to the power train itself. Losses incurred by the voltage drop in the copper traces and in the input and
output connectors are not related to the efficiency of the power train, which should not be included in efficiency
measurements.
Input current can be measured at any point in the input wires, and output current can be measured anywhere in
the output wires of the output being measured.
Table 6-2 shows the measurement points for input voltage and output voltage. VIN and VOUT are measured
to calculate the efficiency. Using these measurement points will result in efficiency measurements that excluded
losses due to the connectors and PCB traces.
Table 6-2. Test Points for Better Efficiency Measurements
Test Point Node Name
Description
Comment
VOUT
PVIN1
Input voltage measurement point
for VIN1+
TP23
PGND1
Input voltage measurement point
for VIN1– (GND)
TP28
Eff_Vo1
Output voltage measurement
point for VOUT1+
Eff_GND1
Output voltage measurement
point for VOUT1– (GND)
TP7
TP34
The pair of test points are connected to the PVIN/GND pins of U1. The voltage drop between
input terminal to the device pins is excluded for efficiency measurement.
The pair of test points are connected to the closest points of Vout /GND to the inductor. The
voltage drop from the output point of inductor to the output terminals is excluded for efficiency
measurement.
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Performance Data and Typical Characteristic Curves
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7 Performance Data and Typical Characteristic Curves
Figure 7-1 through Figure 7-14 present typical performance curves for the TPS546C20AEVM2-746 .
7.1 Efficiency
100
Efficiency (%)
90
80
70
Output Voltage
5V
12 V
18 V
60
50
0
10
20
30
40
Load Current (A)
50
60
70
D001
Figure 7-1. Efficiency of 0.9-V Output vs Line and Load
7.2 Load Regulation
0.908
0.906
Output Voltage (V)
0.904
0.902
0.9
0.898
0.896 Input Voltage
5V
0.894
12 V
18 V
0.892
0
10
20
30
40
Output Current (A)
50
60
70
D001
Figure 7-2. Load Regulation of 0.9-V Output
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Performance Data and Typical Characteristic Curves
7.3 Line Regulation
0.91
0.908
Ouptut Voltage (V)
0.906
0.904
0.902
0.9
0.898
0.896 Output Current
0A
40 A
0.894
70 A
0.892
5
6
7
8
9
10 11 12 13 14 15 16 17 18
Input Voltage (V)
D001
Figure 7-3. Line Regulation of 0.9-V Output (Different Board)
7.4 Transient Response
Ch1 = IOUT at 25 A/division, Ch3 = VOUT (AC coupled, measured at U1 side) at 50 mV/division, Ch4 = VOUT (AC coupled, measured at
U2 side) at 50 mV/division
Figure 7-4. Transient Response of 0.9-V Output at 12 VIN, Transient is 10 A to 60 A, 0.2 A/µs
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Performance Data and Typical Characteristic Curves
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7.5 Output Ripple
Ch1 = VSW1 at 5 V/division, Ch2 = VSW2 at 5 V/division, Ch3 = VOUT (AC coupled, measured at U1 side) ripple at 10 mV/division, Ch4 =
VOUT (AC coupled, measured at U2 side) ripple at 10 mV/division
Figure 7-5. Output Ripple and SW Node of 0.9-V Output at 12 VIN, 0-A Output
Ch1 = VSW1 at 5 V/division, Ch2 = VSW2 at 5 V/division, Ch3 = VOUT (AC coupled, measured at U1 side) ripple at 10 mV/division, Ch4 =
VOUT (AC coupled, measured at U2 side) ripple at 10 mV/division
Figure 7-6. Output Ripple and SW Node of 0.9-V Output at 12 VIN, 70-A Output
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7.6 Control On
Ch1 = CNTL at 2 V/division, Ch2 = IOUT at 50 A/division, Ch3 = VOUT at 500 mV/division, Ch4 = PGOOD at 2 V/division
Figure 7-7. Start-Up from Control, 0.9-V Output at 12 VIN, 0-A Output
Ch1 = CNTL at 2 V/division, Ch2 = IOUT at 50 A/division, Ch3 = VOUT at 500 mV/division, Ch4 = PGOOD at 2 V/division
Figure 7-8. Start-Up from Control, 0.9-V Output at 12 VIN, 70-A Output
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Performance Data and Typical Characteristic Curves
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7.7 Control Off
Ch1 = CNTL at 2 V/division, Ch2 = IOUT at 50 A/division, Ch3 = VOUT at 500 mV/division, Ch4 = PGOOD at 2 V/division
Figure 7-9. Soft Stop from Control, 0.9-V Output at 12 VIN, 0-A Output
Ch1 = CNTL at 2 V/division, Ch2 = IOUT at 50 A/division, Ch3 = VOUT at 500 mV/division, Ch4 = PGOOD at 2 V/division
Figure 7-10. Soft Stop from Control, 0.9-V Output at 12 VIN, 70-A Output
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Performance Data and Typical Characteristic Curves
7.8 Current Sharing Between Two Phases
Ch1 = VSW1 at 5 V/division, Ch2 = VSW2 at 5 V/division, Ch3 = IL2 at 5 A/division, Ch4 = IL1 at 5 A/division
Figure 7-11. Inductor Current and Switch Node Waveform, 0.9-V Output at 12 VIN, 70-A Output
7.9 Control Loop Bode Plot
Figure 7-12. Bode Plot at 0.9-V Output at 12 VIN, 0-A Output
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Performance Data and Typical Characteristic Curves
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Figure 7-13. Bode Plot at 0.9-V Output at 12 VIN, 70-A Output
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7.10 Thermal Image
VIN = 12 V, IOUT = 70 A, VOUT = 0.9V, Fsw = 500 kHz
Figure 7-14. Thermal Image
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EVM Assembly Drawing and PCB Layout
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8 EVM Assembly Drawing and PCB Layout
Figure 8-1 through Figure 8-9 show the design of the TPS546C20AEVM2-746 EVM printed circuit board.
Figure 8-1. TPS546C20AEVM2-746 EVM 3D (Top View)
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EVM Assembly Drawing and PCB Layout
Figure 8-2. TPS546C20AEVM2-746 EVM Top Layer Assembly Drawing (Top View)
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EVM Assembly Drawing and PCB Layout
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Figure 8-3. TPS546C20AEVM2-746 EVM Bottom Assembly Drawing (Bottom View)
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EVM Assembly Drawing and PCB Layout
Figure 8-4. TPS546C20AEVM2-746 EVM Top Copper (Top View)
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EVM Assembly Drawing and PCB Layout
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Figure 8-5. TPS546C20AEVM2-746 EVM Internal Layer 1 (Top View)
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Figure 8-6. TPS546C20AEVM2-746 EVM Internal Layer 2 (Top View)
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EVM Assembly Drawing and PCB Layout
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Figure 8-7. TPS546C20AEVM2-746 EVM Internal Layer 3 (Top View)
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Figure 8-8. TPS546C20AEVM2-746 EVM Internal Layer 4 (Top View)
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EVM Assembly Drawing and PCB Layout
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Figure 8-9. TPS546C20AEVM2-746 EVM Bottom Copper (Top View)
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Bill of Materials
9 Bill of Materials
Table 9-1 lists the BOM for the TPS546C20AEVM2-746 (TPS546C20A EVM).
Table 9-1. TPS546C20AEVM2-746 Components List
Qty
Designator
Description
Part Number
Manufacturer
4
C1, C20, C29, C31
CAP, CERM, 1 µF, 25 V, ±10%, X7R, 0603
GRM188R71E105KA12D
MuRata
4
C2–C5
CAP, AL, 100 µF, 35 V, ±20%, 0.15 Ω, SMD
EEE-FC1V101P
Panasonic
6
C6–C8, C17–C19
CAP, CERM, 6800 pF, 50 V, ±10%, X7R, 0402
GRM155R71H682KA88D
MuRata
8
C9–C16
CAP, CERM, 22 µF, 25 V, ±10%, X6S, 1210
GRM32EC81E226KE15L
MuRata
2
C21, C22
CAP, CERM, 0.1 µF, 50 V, ±10%, X7R, 0603
C0603C104K5RACTU
Kemet
2
C23, C24
CAP, CERM, 1200 pF, 100 V, ±5%, C0G/NP0, 0603
GRM1885C2A122JA01D
MuRata
2
C25, C26
CAP, CERM, 1000 pF, 100 V, ±5%, X7R, 0603
06031C102JAT2A
AVX
2
C27, C28
CAP, CERM, 2200 pF, 50 V, ± 5%, C0G/NP0, 0603
GRM1885C1H222JA01D
MuRata
2
C31, C32
CAP, CERM, 270 pF, 50 V, ±5%, C0G/NP0, 0603
GRM1885C1H271JA01D
MuRata
4
C33, C36–C38
CAP, CERM, 2.2 µF, 16 V, ±10%, X7R, 0603
GRM188Z71C225KE43
MuRata
2
C34, C39
CAP, CERM, 4.7 µF, 10 V, ±10%, X5R, 0603
C0603C475K8PACTU
Kemet
2
C35, C40
CAP, CERM, 0.1 µF, 16 V, ±10%, X7R, 0603
C0603C104K4RACTU
Kemet
10
C41, C44, C45, C48, C49, C52,
C55, C60, C64, C68
CAP, CERM, 47 µF, 10 V, ±10%, X7R, 1210
GRM32ER71A476KE15L
MuRata
2
C56, C76
CAP, CERM, 330 pF, 50 V, ±1%, C0G/NP0, 0603
C1608C0G1H331F080AA
TDK
2
C72, C74
CAP, Tantalum Polymer, 470 µF, 6.3 V, ±20%, 0.01 Ω,
7343-40 SMD
6TPF470MAH
Panasonic
6
H1–H6
MACHINE SCREW PAN PHILLIPS 6-32
PMSSS 632 0038 PH
B&F Fastener
Supply
4
H7–H10
Bumpon, Cylindrical, 0.312 × 0.200, Black
SJ61A1
3M
1
J1
Header (shrouded), 100 mil, 5×2, Gold, TH
5103308-1
TE Connectivity
6
J2, J3, J7, J8, J10, J11
Swage Threaded Standoff, Brass,Swage Mount, TH
1546
Keystone
4
J4, J5, J6, J9
JUMPER TIN SMD
S1911-46R
Harwin
8
JP1, JP2, JP5, JP6
Header, 100 mil, 2×1, Tin, TH
5-146278-2
TE Connectivity
2
JP3, JP4
Header, 100 mil, 3×1, Tin, TH
5-146278-3
TE Connectivity
2
L1, L2
Inductor, Shielded, Ferrite, 300 nH, 52 A, 0.00015 Ω,
SMD
SLC1480-301MLB
Coilcraft
1
LBL1
Thermal Transfer Printable Labels, 0.650" W × 0.200" H 10,000 per roll
THT-14-423-10
Brady
1
LED1
LED, Green, SMD
150060GS75000
Wurth
Elektronik
1
R1
RES, 1.00 k, 1%, 0.1 W, 0603
CRCW06031K00FKEA
Vishay-Dale
14
R2–R5, R29, R30, R40– R43,
R48–R51
RES, 0, 5%, 0.1 W, 0603
ERJ-3GEY0R00V
Panasonic
2
R6, R8
RES, 1.10 k, 1%, 0.1 W, 0603
RC0603FR-071K1L
Yageo America
9
R7, R10, R13, R14, R17–R19,
R24, R25
RES, 10.0 k, 0.1%, 0.1 W, 0603
RT0603BRD0710KL
Yageo America
7
R11, R15, R16, R44–R47
RES, 49.9, 1%, 0.1 W, 0603
CRCW060349R9FKEA
Vishay-Dale
8
R14, R17–R21, R24, R25
RES, 10.0 k, 1%, 0.1 W, 0603
RC0603FR-0710KL
Yageo America
2
R20, R21
RES, 5.60 k, 1%, 0.1 W, 0603
RC0603FR-075K6L
Yageo America
2
R22, R23
RES, 1.0, 5%, 0.25 W, 1206
CRCW12061R00JNEA
Vishay-Dale
2
R26, R27
RES, 5.11 k, 1%, 0.1 W, 0603
CRCW06035K11FKEA
Vishay-Dale
2
R33, R35
RES, 34.8 k, 1%, 0.1 W, 0603
RC0603FR-0734K8L
Yageo America
2
R36, R37
RES, 51.1 k, 1%, 0.1 W, 0603
RC0603FR-0751K1L
Yageo America
2
R38, R39
RES, 40.2 k, 1%, 0.1 W, 0603
CRCW060340K2FKEA
Vishay-Dale
6
SH-JP1–SH-JP6
Shunt, 100 mil, Gold plated, Black
969102-0000-DA
3M
7
TP5, TP14–TP17, TP31, TP32
Test Point, Miniature, Red, TH
5000
Keystone
3
TP6, TP23, TP24
Test Point, Miniature, Black, TH
5001
Keystone
2
TP7, TP8
Test Point, Miniature, Red, TH
5000
Keystone
10
TP9, TP10, TP25, TP26, TP43,
TP19, TP20, TP40, TP41, TP42
Test Point, Miniature, White, TH
5002
Keystone
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Bill of Materials
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Table 9-1. TPS546C20AEVM2-746 Components List (continued)
Qty
32
Designator
Description
Part Number
Manufacturer
3
TP11, TP12, TP27
Test Point, Multipurpose, Black, TH
5011
Keystone
2
TP37, TP38
Test Point, Miniature, Black, TH
5001
Keystone
2
U1, U2
4.5-V to 18-V, 35-A PMBUS STACKABLE
SYNCHRONOUS BUCK CONVERTER, RVF0040A
TPS546C20A
Texas
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10 Screenshots
10.1 Fusion GUI Screenshots
When launching the Fusion GUI, select IC_DEVICE_ID (Figure 10-1) as the scanning mode to find the
TPS546C20A.
Figure 10-1. Select Device Scanning Mode
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Screenshots
•
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Use the Limits & On/Off tab (Figure 10-2) to configure the following:
– Vref (Vout_Command)
– OC fault and OC warn
– OT fault and OT warn (die temperature)
– Power-good limits
– Fault response
– UVLO
– On/Off config
– Soft-start time (turn-on rise)
– Margin voltage
After making changes to one or more configurable parameters, the changes can be committed to nonvolatile
memory by clicking Store DefaultAll. This action prompts a confirm selection pop-up, and if confirmed, the
changes are committed to nonvolatile memory to store all the modifications in non-volatile memory.
For modifications on Vref and soft-start time, to make the changes effective in next power up, DIS_VSEL in
Advanced tab (Figure 10-4) should be checked and stored to nonvolatile memory as well.
Both the loop controller device and the loop follower device are tied to same bus interface, a scroll-down menu in
the upper right corner can be used to switch view screens from one to the other. In two-phase stacking system,
most configurable parameters are disabled in GUI if the device is detected as loop follower (Figure 10-7).
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Figure 10-2. Configure – Limits and On/Off for U1 and U2
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Changing the on/off configuration prompts a pop-up window with details of the options (Figure 10-3).
Figure 10-3. ON/OFF Control Pop-Up
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•
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Use the Advanced tab (Figure 10-4) to configure:
– OPTIONS: MFR_SPECIFIC_21 register
– API_OPTIONS: MFR_SPECIFIC_32 register
Figure 10-4. Configure – Advanced
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The sources of SMBALERT that can be masked can be found and configured on the SMBALERT # Mask tab
(Figure 10-5).
Figure 10-5. Configure – SMBALERT # Mask
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The device information, User Scratch Pad, Write Protection options, and the configuration of Vout Scale Loop,
Vout Transition Rate, and Iout Cal Offset can be found on Device Info tab (Figure 10-6).
Figure 10-6. Configure – Device Info
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Use the All Config tab (Figure 10-7) to configure all of the configurable parameters, which also shows other
details like Hex encoding.
Figure 10-7. Configure – All Config
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When the Monitor screen (Figure 10-8) is selected, the screen changes to display real-time data of the
parameters that are measured by the device. This screen provides access to:
•
•
•
•
•
•
Graphs of VOUT, Iout, Temperature, and Pout
Start/Stop Polling, which turns ON or OFF the real-time display of data
Quick access to On/Off config
Control pin activation and OPERATION command
Margin control
Clear Fault. Selecting Clear Faults clears any prior fault flags.
With two devices stacked together, the IOUT reading from either the loop controller or the loop follower device is
the load current supported by the device itself, thus the Iout reading is half of the total load.
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Figure 10-8. Monitor Screen with 10-A Total Load
Selecting Status screen (Figure 10-9) from lower left corner shows the status of the device.
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Revision History
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Figure 10-9. Status Screen
11 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (November 2016) to Revision A (February 2022)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document. ................3
• Updated the updated user's guide title .............................................................................................................. 3
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