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TPS62080, TPS62080A, TPS62081, TPS62082
SLVSAE8F – SEPTEMBER 2011 – REVISED NOVEMBER 2016
TPS6208x 1.2-A High-Efficiency, Step-Down Converter With DCS-Control™
and Snooze Mode
1 Features
3 Description
•
The TPS6208x devices are a family of high frequency
synchronous step down converters. With an input
voltage range of 2.3 V to 6 V, common battery
technologies are supported. Alternatively, the device
can be used for low voltage system power rails.
1
•
•
•
•
•
•
•
•
•
DCS-Control™ Architecture for Fast Transient
Regulation
Snooze Mode for 6.5-µA Ultra Low Quiescent
Current
2.3-V to 6-V Input Voltage Range
100% Duty Cycle for Lowest Dropout
Power Save Mode for Light-Load Efficiency
Output Discharge Function
Short-Circuit Protection
Power-Good Output
Thermal Shutdown
Available in 2-mm × 2-mm 8-Pin WSON Package
The TPS6208x focuses on high efficiency step-down
conversion over a wide output current range. At
medium to heavy loads, the converter operates in
PWM mode and automatically enters Power Save
Mode operation at light load currents to maintain high
efficiency over the entire load current range. To
maintain high efficiency at very low load or no load
currents, a Snooze Mode with an ultra-low quiescent
current is implemented. This function, enabled by the
MODE pin, increases the run-time of battery driven
applications and keeps the standby current at its
lowest level to meet green energy standards targeting
a low stand-by current.
2 Applications
•
•
•
Battery-Powered Portable Devices
Point of Load Regulators
System Power Rail Voltage Conversion
To address the requirements of system power rails,
the internal loop compensation allows a large
selection of external output capacitor values in
excess of 100 µF. With its DCS-Control™
architecture, excellent load transient performance and
output voltage regulation accuracy is achieved. The
device is available in 2-mm × 2-mm WSON package
with Thermal PAD.
Device Information(1)
PART NUMBER
PACKAGE
BODY SIZE (NOM)
TPS62080
TPS62080A
TPS62081
WSON (8)
2.00 mm × 2.00 mm
TPS62082
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Typical Application Schematic
space
POWER GOOD
TPS62081
VIN
2.3 V .. 6 V
VIN
180 k
PG
1 µH
10 µF
EN
MODE
GND
1.8 V
VOUT
SW
VOS
22 µF
FB
Copyright © 2016, Texas Instruments Incorporated
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS62080, TPS62080A, TPS62081, TPS62082
SLVSAE8F – SEPTEMBER 2011 – REVISED NOVEMBER 2016
www.ti.com
Table of Contents
1
2
3
4
5
6
7
8
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Device Comparison Table.....................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
4
4
5
7.1
7.2
7.3
7.4
7.5
7.6
5
5
5
5
6
7
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Typical Characteristics ..............................................
Detailed Description .............................................. 8
8.1
8.2
8.3
8.4
Overview ................................................................... 8
Functional Block Diagrams ....................................... 8
Feature Description................................................... 9
Device Functional Modes........................................ 11
9
Application and Implementation ........................ 12
9.1 Application Information............................................ 12
9.2 Typical Application .................................................. 12
10 Power Supply Recommendations ..................... 19
11 Layout................................................................... 19
11.1 Layout Guidelines ................................................. 19
11.2 Layout Example .................................................... 19
11.3 Thermal Considerations ........................................ 19
12 Device and Documentation Support ................. 20
12.1
12.2
12.3
12.4
12.5
12.6
12.7
12.8
Device Support......................................................
Documentation Support ........................................
Related Links ........................................................
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
20
20
20
20
20
20
20
21
13 Mechanical, Packaging, and Orderable
Information ........................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision E (April 2015) to Revision F
Page
•
Changed From: TA = –40°C to 85°C To: TJ = –40°C to 125°C in the Electrical Characteristics condition statement ........... 6
•
Added a Test Condition to ISD in the Electrical Characteristics ............................................................................................. 6
•
Changed the RDS(on) High-side TYP value From: 120 mΩ To: 95 mΩ in the Electrical Characteristics ................................. 6
•
Changed the RDS(on) Low-side TYP value From: 90 mΩ To: 70 mΩ in the Electrical Characteristics.................................... 6
•
Changed the graphs to include a 125°C curve in the Typical Characteristics ...................................................................... 7
•
Added 50 Ω value to the Power Good block in Figure 5 ........................................................................................................ 8
•
Added 50 Ω value to the Power Good block in Figure 6 ........................................................................................................ 9
•
Added Table 1 ....................................................................................................................................................................... 9
Changes from Revision D (July 2013) to Revision E
•
Page
Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional
Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device
and Documentation Support section, and Mechanical, Packaging, and Orderable Information section .............................. 1
Changes from Revision C (May 2013) to Revision D
Page
•
Deleted TPS62080ADGN from ORDERING INFORMATION table ....................................................................................... 4
•
Deleted TPS62080A column from the Thermal Information table.......................................................................................... 5
Changes from Revision B (March 2012) to Revision C
•
2
Page
Changed the Thermal Information tables values.................................................................................................................... 5
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Copyright © 2011–2016, Texas Instruments Incorporated
Product Folder Links: TPS62080 TPS62080A TPS62081 TPS62082
TPS62080, TPS62080A, TPS62081, TPS62082
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SLVSAE8F – SEPTEMBER 2011 – REVISED NOVEMBER 2016
Changes from Revision A (February 2012) to Revision B
•
Page
Changed TPS62080ADSG from Product Preview to Production Data in ORDERING INFORMATION................................ 4
Changes from Original (September 2011) to Revision A
Page
•
Added TPS62080A device ..................................................................................................................................................... 1
•
Added TPS62080ADSG (Product Preview) and TPS62080ADGN (Product Preview) to ORDERING INFORMATION ....... 4
•
Added TPS62080A output discharge resistor ........................................................................................................................ 6
Copyright © 2011–2016, Texas Instruments Incorporated
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TPS62080, TPS62080A, TPS62081, TPS62082
SLVSAE8F – SEPTEMBER 2011 – REVISED NOVEMBER 2016
www.ti.com
5 Device Comparison Table
(1)
(2)
PART NUMBER (1)
OUTPUT VOLTAGE (2)
OUTPUT DISCHARGE
RESISTOR
PACKAGE MARKING
PACKAGE
TPS62080DSG
Adjustable
1 kΩ
QVR
8-Pin WSON
TPS62081DSG
1.8 V
1 kΩ
QVS
8-Pin WSON
TPS62082DSG
3.3 V
1 kΩ
QVT
8-Pin WSON
TPS62080ADSG
Adjustable
40 Ω
SBN
8-Pin WSON
For detailed ordering information, see Mechanical, Packaging, and Orderable Information.
Contact the factory to check availability of other fixed output voltage versions.
6 Pin Configuration and Functions
space
EN
1
GND
2
MODE
3
FB
4
E
TH XPOS
ER
MA ED
LP
AD
DSG Package
8-Pin WSON With Thermal Pad
(Top View)
8
VIN
7
SW
6
PG
5
VOS
space
space
Pin Functions
PIN
NAME
NO.
I/O
DESCRIPTION
EN
1
IN
GND
2
PWR
MODE
3
IN
Snooze Mode Enable Logic Input.
Logic HIGH enables the Snooze Mode, logic LOW disables the Snooze Mode. Do not leave floating.
FB
4
IN
Feedback Pin for the internal control loop.
Connect this pin to the external feedback divider for the adjustable output versions. For the fixed output voltage
versions, this pin must be left floating or connected to GND.
VOS
5
IN
Output Voltage Sense Pin for the internal control loop. Must be connected to output voltage.
PG
6
OUT
Power Good open drain output.
This pin is pulled to low if the output voltage is below regulation limits. Can be left floating if not used.
SW
7
PWR
Switch Pin connected to the internal MOSFET switches and inductor terminal.
Connect the inductor of the output filter here.
VIN
8
PWR
Power Supply Voltage Input.
Exposed
Thermal
Pad
—
—
4
Device Enable Logic Input.
Logic HIGH enables the device, logic LOW disables the device and turns it into shutdown. Do not leave
floating.
Power and Signal Ground.
Connect it to GND. The thermal pad must be soldered to achieve appropriate power dissipation and
mechanical reliability.
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SLVSAE8F – SEPTEMBER 2011 – REVISED NOVEMBER 2016
7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
Voltage at VIN, PG, VOS (2)
Voltage at SW
(2) (3)
MIN
MAX
UNIT
–0.3
7
V
–1
7
V
Voltage at FB (2)
–0.3
3.6
V
Voltage at EN, MODE (2)
–0.3
VIN + 0.3
V
Sink current at PG
0
0.5
mA
Operating junction temperature, TJ
–40
150
°C
Storage temperature, Tstg
–65
150
°C
(1)
(2)
(3)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute–maximum–rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
During operation, device switching.
7.2 ESD Ratings
VALUE
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
V(ESD)
(1)
(2)
Electrostatic discharge
(1)
UNIT
±2000
Charged-device model (CDM), per JEDEC specification JESD22C101 (2)
V
±500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions (1)
MIN
NOM
MAX
UNIT
VIN
Input voltage
2.3
6
VOUT
Output voltage
0.5
4
V
2
mA
125
°C
ISNOOZE Load current in Snooze Mode
TJ
(1)
Operating junction temperature
–40
V
Refer to the Application and Implementation section for further information.
7.4 Thermal Information
TPS6208x
THERMAL METRIC (1)
DSG (WSON)
UNIT
8 PINS
RθJA
Junction-to-ambient thermal resistance
59.7
RθJC(top)
Junction-to-case (top) thermal resistance
70.1
RθJB
Junction-to-board thermal resistance
30.9
ψJT
Junction-to-top characterization parameter
1.4
ψJB
Junction-to-board characterization parameter
31.5
RθJC(bot)
Junction-to-case (bottom) thermal resistance
8.6
(1)
°C/W
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
Copyright © 2011–2016, Texas Instruments Incorporated
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SLVSAE8F – SEPTEMBER 2011 – REVISED NOVEMBER 2016
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7.5 Electrical Characteristics
Over recommended free-air temperature range, TJ = –40°C to 125°C. Typical values are at TA = 25°C (unless otherwise
noted), VIN= 3.6 V, MODE = LOW.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
VIN
Input voltage range
2.3
6
V
Quiescent current into VIN
IOUT = 0 mA, Device not switching
30
uA
IQ
Quiescent current into VIN
(SNOOZE MODE)
IOUT = 0 mA, Device not switching, MODE=HIGH
6.5
uA
ISD
Shutdown current into VIN
EN = LOW
Undervoltage lockout
Input voltage falling
1.8
Undervoltage lockout hysteresis
Rising above VUVLO
120
mV
Thermal shutdown
Temperature rising
150
°C
Thermal shutdown hysteresis
Temperature falling below TJSD
20
°C
VUVLO
TJSD
7
TA = -40°C to 85°C
1
2
µA
V
LOGIC INTERFACE (EN MODE)
VIH
High level input voltage
2.3 V ≤ VIN ≤ 6 V
VIL
Low level input voltage
2.3 V ≤ VIN ≤ 6 V
ILKG
Input leakage current
1
V
0.4
V
0.01
0.5
µA
–10%
–5%
POWER GOOD
VPG
Power good threshold
VOUT falling referenced to VOUT nominal
–15%
Power good hysteresis
5%
VOL
Low level voltage
Isink = 500 µA
IPG,LKG
PG Leakage current
VPG = 5.0 V
0.3
V
0.1
µA
0.5
4.0
V
0.01
OUTPUT
Output voltage range
TPS62080, TPS62080A
Output voltage accuracy
TPS62081
IOUT = 0 mA; VIN ≥ 2.3 V
–2.5%
2.5%
Output voltage accuracy
TPS62082
IOUT = 0 mA; VIN ≥ 3.6 V
–2.5%
2.5%
Snooze Mode output voltage
accuracy
MODE = HIGH; VIN ≥ 2.3 V and VIN ≥ VOUT + 1 V
–5%
5%
VFB
Feedback regulation voltage
TPS62080, TPS62080A
VIN ≥ 2.3 V and VIN ≥ VOUT + 1 V
IFB
Feedback input bias current
TPS62080, TPS62080A
VFB = 0.45 V
RDIS
Output discharge resistor
VOUT
0.438
EN = LOW, VOUT = 1.8 V
ILIM
6
0.462
V
10
100
nA
1
TPS62080A, EN = LOW, VOUT = 1.2 V
25
Line Regulation
RDS(on)
0.45
40
kΩ
65
Ω
0
%/V
Load Regulation
TPS62081, TPS62082
–0.25
%/A
High-side FET ON-resistance
ISW = 500 mA
95
mΩ
Low-side FET ON-resistance
ISW = 500 mA
70
mΩ
High-side FET switch current
limit
Rising inductor current
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1.6
2.8
4
A
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SLVSAE8F – SEPTEMBER 2011 – REVISED NOVEMBER 2016
7.6 Typical Characteristics
15
50
125°C
125°C
40
Quiescent Current (µA)
Quiescent Current (µA)
45
35
30
25
20
15
−40°C
25°C
85°C
10
12
9
6
3
5
0
2.3
−40°C
2.8
3.3
3.8
4.3
4.8
Input Voltage (V)
5.3
0
2.3
5.8
2.8
25°C
3.3
G000
Figure 1. Quiescent Current vs Input Voltage in Normal
Mode
3.8
4.3
4.8
Input Voltage (V)
85°C
5.3
5.8
G000
Figure 2. Quiescent Current vs Input Voltage in Snooze
Mode
350
250
250
RDSon Low−Side (dB)
RDSon High−Side (mΩ)
300
125°C
85°C
200
25°C
150
100
200
125°C
150
85°C
25°C
100
50
50
−40°C
−40°C
0
2.3
2.8
3.3
3.8
4.3
4.8
Input Voltage (V)
5.3
5.8
Figure 3. High-Side FET RDS(on) vs Input Voltage
Copyright © 2011–2016, Texas Instruments Incorporated
0
2.3
G000
2.8
3.3
3.8
4.3
4.8
Input Voltage (V)
5.3
5.8
G000
Figure 4. Low-Side FET RDS(on) vs Input Voltage
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SLVSAE8F – SEPTEMBER 2011 – REVISED NOVEMBER 2016
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8 Detailed Description
8.1 Overview
The TPS6208x synchronous switched mode converters are based on DCS-Control™ (Direct Control with
Seamless transition into Power Save Mode). This is an advanced regulation topology that combines the
advantages of hysteretic, voltage and current mode control.
The DCS-Control topology operates in pulse width modulation (PWM) mode for medium to heavy load conditions
and in Power Save Mode at light load currents. In PWM mode, the converter operates with its nominal switching
frequency of 2 MHz having a controlled frequency variation over the input voltage range. As the load current
decreases, the converter enters Power Save Mode, reducing the switching frequency and minimizing the IC
quiescent current to achieve high efficiency over the entire load current range. DCS-Control supports both
operation modes (PWM and PFM) using a single building block having a seamless transition from PWM to Power
Save Mode without effects on the output voltage. Fixed output voltage versions provide smallest solution size
combined with lowest no load current consumption. The TPS6208x offers both excellent DC voltage and superior
load transient regulation, combined with very low output voltage ripple, minimizing interference with RF circuits.
The device is equipped with Snooze Mode functionality, which is enabled with the MODE pin. Snooze Mode
supports high efficiency conversion at lowest output currents below 2 mA. If no load current is drawn, the ultra
low quiescent current of 6.5 µA is sufficient to maintain the output voltage. This extends battery run time by
reducing the quiescent current during lowest or no load conditions in battery-driven applications. For mainsoperated voltage supplies, Snooze Mode reduces the system's stand-by energy consumption. During shutdown
(EN = LOW), the device reduces energy consumption to less than 1 µA.
8.2 Functional Block Diagrams
MODE
PG
50
Control
Logic
Thermal
Shutdown
VIN
High Side
N-MOS
Power
Good
Gate
Driver
Low Side
N-MOS
SW
Active
Output
Discharge
Snooze Mode
GND
EN
ramp
Softstart
comparator
Under
Voltage
Lockout
minimum
on-timer
DCS-CONTROLTM
direct control
&
compensation
error
amplifier
VOS
FB
REF
Copyright © 2016, Texas Instruments Incorporated
Figure 5. Functional Block Diagram (Adjustable Output Voltage Version)
8
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SLVSAE8F – SEPTEMBER 2011 – REVISED NOVEMBER 2016
Functional Block Diagrams (continued)
MODE
PG
VIN
High Side
N-MOS
Power
Good
50
Control
Logic
Thermal
Shutdown
Gate
Driver
Low Side
N-MOS
SW
Active
Output
Discharge
Snooze Mode
GND
EN
ramp
Softstart
direct control
&
compensation
comparator
Under
Voltage
Lockout
error
amplifier
minimum
on-timer
VOS
FB
REF
DCS-CONTROLTM
Copyright © 2016, Texas Instruments Incorporated
Figure 6. Functional Block Diagram (Fixed Output Voltage Version)
8.3 Feature Description
8.3.1 Power Good
The TPS6208x has a power good output which goes low when the output voltage is below its nominal value. The
power good is high impedance once the output is above 95% of the regulated voltage, and is driven to low once
the output voltage falls below typically 90% of the regulated voltage. The PG pin is an open drain output and can
sink up to 0.5 mA. The power good output requires a pull-up resistor. When the device is off due to disable,
UVLO or thermal shutdown, the PG pin is high impedance (see Table 1). The PG signal can be used for
sequencing of multiple rails by connecting to the EN pin of other converters. Leave the PG pin unconnected
when not used.
space
Table 1. Power Good Pin Logic Table
Device Information
Enable (EN=High)
VFB ≥ VPG
PG Logic Status
High Z
Low
√
VFB ≤ VPG
√
√
Shutdown (EN=Low)
UVLO
0.7V < VIN < VUVLO
√
Thermal Shutdown
TJ > TJSD
√
Power Supply Removal
VIN < 0.7V
√
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space
8.3.2 100% Duty Cycle Low Dropout Operation
The device offers low input to output voltage difference by entering 100% duty cycle mode. In this mode, the
high-side MOSFET switch is constantly turned on and the low-side MOSFET is switched off. This is particularly
useful in battery powered applications to achieve longest operation time by taking full advantage of the whole
battery voltage range. The minimum input voltage to maintain an output voltage is calculated as:
VIN,MIN = VOUT + IOUT,MAX ´ (RDS(on) + RL )
where
•
•
•
•
VIN,MIN = Minimum input voltage
IOUT,MAX = Maximum output current
RDS(on) = High-side FET ON-resistance
RL = Inductor ohmic resistance
(1)
8.3.3 Output Discharge
The output gets discharged by the SW pin with a typical discharge resistor of RDIS whenever the device shuts
down. This is the case when the device gets disabled by enable, thermal shutdown, or undervoltage lockout. The
TPS6208A differs from the TPS62080 only in its stronger discharge.
8.3.4 Soft-Start
When EN is set to start device operation, the device starts switching after a delay of about 40 μs and VOUT rises
with a slope of about 10mV/μs (See Figure 27 andFigure 29 for typical startup operation). This avoids excessive
inrush current and creates a smooth output voltage rise slope. It also prevents excessive voltage drops of
primary cells and rechargeable batteries with high internal impedance.
If the output voltage is not reached within the soft start time, such as in the case of heavy load, the converter
enters regular operation. Consequently, the inductor current limit operates as described below. The TPS6208x is
able to start into a pre-biased output capacitor. The converter starts with the applied bias voltage and ramps up
the output voltage to its nominal value.
8.3.5 Undervoltage Lockout
To avoid mis-operation of the device at low input voltages, an undervoltage lockout is implemented that shuts
down the device at voltages lower than VUVLO with a 120 mV typical hysteresis.
8.3.6 Thermal Shutdown
The device goes into thermal shutdown once the junction temperature exceeds typically TJSD. Once the device
temperature falls below the threshold minus hysteresis, the device returns to normal operation automatically.
8.3.7 Inductor Current Limit
The Inductor Current Limit prevents the device from high inductor current and drawing excessive current from the
battery or input voltage rail. Excessive current might occur with a shorted/saturated inductor or a heavy
load/shorted output circuit condition.
The incorporated inductor peak current limit measures the current in the high-side and low-side power MOSFET.
Once the high-side switch current limit is tripped, the high-side MOSFET is turned off and the low-side MOSFET
is turned on to reduce the inductor current. When the inductor current drops down to the low-side switch current
limit, the low-side MOSFET is turned off and the high-side switch is turned on again. This operation repeats until
the inductor current does not reach the high-side switch current limit. Due to internal propagation delays, the real
current limit value can exceed the static current limit in Electrical Characteristics.
10
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SLVSAE8F – SEPTEMBER 2011 – REVISED NOVEMBER 2016
8.4 Device Functional Modes
8.4.1 Enabling and Disabling the Device
The device is enabled by setting the EN input to a logic HIGH. Accordingly, a logic LOW disables the device. If
the device is enabled, the internal power stage starts switching and regulates the output voltage to the
programmed threshold. The EN input must be terminated and not left floating.
8.4.2 Power Save Mode
As the load current decreases, the TPS6208x enters Power Save Mode operation. During Power Save Mode, the
converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current
maintaining high efficiency. Power Save Mode occurs when the inductor current becomes discontinuous. It is
based on a fixed on time architecture. The typical on time is given by ton = 500 ns × (VOUT/VIN). The switching
frequency over the whole load current range is shown in Figure 21 and Figure 22.
8.4.3 Snooze Mode
The TPS6208x offers a Snooze Mode function. If Snooze Mode is enabled by an external logic signal setting the
MODE pin to HIGH, the device's quiescent current consumption is reduced to typically 6.5 µA. As a result, the
high efficiency range is extended towards the range of lowest output currents below 2 mA. See the efficiency
figures in Application Curves.
If the device is operating in Snooze Mode, a dedicated, low power consuming block monitors the output voltage.
All other control blocks are snoozing during that time. If the output voltage falls below the programmed output
voltage by 3.5% (typ), the control blocks wake up, regulate the output voltage and allow themselves to snooze
again until the output voltage drops again. Snooze Mode operation provides a clear efficiency improvement at
lowest output currents. If the load current increases, the advantage of efficiency in Snooze mode is reduced.
Because the dynamic load regulation operates best if Snooze Mode is disabled, it is recommended to turn off
Snooze Mode when the load current exceeds 2 mA. Generally, a microcontroller operates the MODE pin.
Copyright © 2011–2016, Texas Instruments Incorporated
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9 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
9.1 Application Information
The TPS62080 and TPS62080A are synchronous step-down converter whose output voltage is adjusted by
component selection. The following section discusses the design of the external components to complete the
power supply design for several input and output voltage options by using typical applications as a reference.
The TPS62081 and TPS62082 provide a fixed output volage which do not need an external resistor divider.
9.2 Typical Application
POWER GOOD
TPS62080
VIN
2.3 V .. 6 V
10 µF
VIN
PG
EN
SW
MODE
178 k
1 µH
VOUT
22 µF
VOS
GND
R1
FB
R2
Copyright © 2016, Texas Instruments Incorporated
Figure 7. Typical Application Schematic
9.2.1 Design Requirements
For this design example, use Table 2 as the input parameters.
Table 2. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input voltage
2.3 V to 6 V
Output voltage
1.2 V
Output ripple voltage
< 20 mV
Maximum output current
1.2 A
9.2.2 Detailed Design Procedure
Table 3 lists the components used for the example.
Table 3. List of Components
REFERENCE
12
DESCRIPTION
MANUFACTURER
C1
10 uF, Ceramic Capacitor, 6.3 V, X5R, size 0603
Std
C2
22 uF, Ceramic Capacitor, 6.3 V, X5R, size 0805,
GRM21BR60J226ME39L
Murata
L1
1.0 µH, Power Inductor, 2.2 A, size 3 × 3 × 1.2 mm, XFL3012102MEB
Coilcraft
R1
Depending on the output voltage of TPS62080, 1%; Not populated
for TPS62081, TPS62082;
Std
R2
39.2k, Chip Resistor, 1/16W, 1%, size 0603
Std
R3
178k, Chip Resistor, 1/16W, 1%, size 0603
Std
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9.2.2.1 Setting the Output Voltage
The TPS608x devices are available as fixed and adjustable output voltage versions. The fixed voltage versions
are internally programmed to a fixed output voltage, whereas the adjustable output voltage version needs to be
programmed via an external voltage divider to set the desired output voltage.
9.2.2.1.1 Adjustable Output Voltage Version
For the adjustable output voltage version, an external resistor divider is used. By selecting R1 and R2, the output
voltage is programmed to the desired value.
When the output voltage is regulated, the typical voltage at the FB pin is VFB for the adjustable devices. The
following equation can be used to calculate R1 and R2.
R1 ö
R1 ö
æ
æ
VOUT = VFB ´ ç1 +
÷ = 0.45 V ´ ç1 +
÷
è R2 ø
è R2 ø
(2)
For best accuracy, R2 should be kept smaller than 40kΩ to ensure that the current flowing through R2 is at least
100 times larger than IFB. Changing towards a lower value increases the robustness against noise injection.
Changing towards higher values reduces the input current. For lowest input current during Snooze Mode, it is
recommended to use a fixed output voltage version such as TPS62081 and TPS62082.
9.2.2.2 Output Filter Design
The inductor and the output capacitor together provide a low pass filter. To simplify this process, Table 4 outlines
possible inductor and capacitor value combinations for most applications. Checked cells represent combinations
that are proven for stability by simulation and lab test. Further combinations should be checked for each
individual application.
Table 4. Matrix of Output Capacitor and Inductor Combinations
L [µH] (1)
COUT [µF] (1)
10
22
47
100
1
+
+ (2) (3)
+
+
2.2
+
+
+
+
150
0.47
4.7
(1)
(2)
(3)
Capacitance tolerance and bias voltage de-rating is anticipated. The effective capacitance can vary by
+20% and –50%. Inductor tolerance and current de-rating is anticipated. The effective inductance can
vary by +20% and –30%.
Plus mark indicates recommended filter combinations.
Filter combination in typical application.
9.2.2.3 Inductor Selection
The main parameters for the inductor selection are the inductor value and then the saturation current of the
inductor. To calculate the maximum inductor current under static load conditions, Equation 3 is given.
DI
IL,MAX = IOUT,MAX + L
2
VOUT
VIN
DIL = VOUT ´
L ´ fSW
1-
where
•
•
•
•
IOUT,MAX = Maximum output current
ΔIL = Inductor current ripple
fSW = Switching frequency
L = Inductor value
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TI recommends to choose the saturation current for the inductor 20%~30% higher than the IL,MAX, out of
Equation 3. A higher inductor value is also useful to lower ripple current, but increases the transient response
time as well. The following inductors are recommended for use.
Table 5. List of Recommended Inductors
INDUCTANCE
[µH]
CURRENT RATING
[mA]
DIMENSIONS
L x W x H [mm3]
DC RESISTANCE
[mΩ typ]
1.0
2500
3 x 3 x 1.2
1.0
1650
3 x 3 x 1.2
2.2
2500
2.2
1600
TYPE
MANUFACTURER
35
XFL3012-102ME
Coilcraft
40
LQH3NPN1R0NJ0
Murata
4 x 3.7 x 1.65
49
LQH44PN2R2MP0
Murata
3 x 3 x 1.2
81
XFL3012-222ME
Coilcraft
9.2.2.4 Capacitor Selection
The input capacitor is the low impedance energy source for the converter which helps to provide stable
operation. A low ESR multilayer ceramic capacitor is recommended for best filtering and should be placed
between VIN and GND as close as possible to those pins. For most applications 10 μF is sufficient, though a
larger value reduces input current ripple.
The architecture of the TPS6208X allows the use of tiny ceramic output capacitors with low equivalent series
resistance (ESR). These capacitors provide low output voltage ripple and are recommended. To keep its
resistance up to high frequencies and to get narrow capacitance variation with temperature, it's recommended to
use X7R or X5R dielectric. The TPS6208x is designed to operate with an output capacitance of 10 µF to 100 µF
and beyond, as outlined in Table 4. Load transient testing and measuring the bode plot are good ways to verify
stability with larger capacitor values.
Table 6. List of Recommended Capacitors
14
CAPACITANCE
[µF]
TYPE
DIMENSIONS
L x W x H [mm3]
MANUFACTURER
10
GRM188R60J106M
0603: 1.6 x 0.8 x 0.8
Murata
22
GRM188R60G226M
0603: 1.6 x 0.8 x 0.8
Murata
22
GRM21BR60J226M
0805: 2.0 x 1.2 x 1.25
Murata
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SLVSAE8F – SEPTEMBER 2011 – REVISED NOVEMBER 2016
9.2.3 Application Curves
100
100
TPS62080
VOUT = 0.9 V
80
80
70
70
60
50
VIN = 2.8 V
VIN = 3.6 V
VIN = 4.2 V
VIN = 2.8 V, Snooze Mode
VIN = 3.6 V, Snooze Mode
VIN = 4.2 V, Snooze Mode
40
30
20
10
0
10u
100u
TPS62080
VOUT = 1.2 V
90
Efficiency (%)
Efficiency (%)
90
1m
10m
100m
Output Current (A)
1
60
50
VIN = 2.8 V
VIN = 3.6 V
VIN = 4.2 V
VIN = 2.8 V, Snooze Mode
VIN = 3.6 V, Snooze Mode
VIN = 4.2 V, Snooze Mode
40
30
20
10
0
10u
3
Figure 8. Efficiency vs Load Current
3
G002
80
70
70
60
50
VIN = 3.6 V
VIN = 4.2 V
VIN = 5.0 V
VIN = 3.6 V, Snooze Mode
VIN = 4.2 V, Snooze Mode
VIN = 5.0 V, Snooze Mode
40
30
20
10
100u
TPS62081
VOUT = 1.8 V
90
Efficiency (%)
Efficiency (%)
1
100
TPS62080
VOUT = 2.5 V
80
0
10u
1m
10m
100m
Output Current (A)
Figure 9. Efficiency vs Load Current
100
90
100u
G001
1m
10m
100m
Output Current (A)
1
60
50
VIN = 2.8 V
VIN = 3.6 V
VIN = 4.2 V
VIN = 2.8 V, Snooze Mode
VIN = 3.6 V, Snooze Mode
VIN = 4.2 V, Snooze Mode
40
30
20
10
0
10u
3
100u
1m
10m
100m
Output Current (A)
G003
Figure 10. Efficiency vs Load Current
1
3
G005
Figure 11. Efficiency vs Load Current
0.910
100
90
0.905
Output Voltage (V)
Efficiency (%)
80
70
TPS62082
VOUT = 3.3 V
60
50
VIN = 3.6 V
VIN = 4.2 V
VIN = 5.0 V
VIN = 3.6 V, Snooze Mode
VIN = 4.2 V, Snooze Mode
VIN = 5.0 V, Snooze Mode
40
30
20
10
0
10u
100u
1m
10m
100m
Output Current (A)
Figure 12. Efficiency vs Load Current
Copyright © 2011–2016, Texas Instruments Incorporated
1
0.900
0.895
0.885
3
G004
IOUT = 1A, TA = 25°C
IOUT = 1A, TA = −40°C
IOUT = 1A, TA = 85°C
IOUT = 10mA, TA = 25°C
IOUT = 10mA, TA = −40°C
IOUT = 10mA, TA = 85°C
0.890
0.880
2.3
TPS62080
VOUT = 0.9 V
2.8
3.3
3.8
4.3
4.8
Input Voltage (V)
5.3
5.8
G006
Figure 13. Output Voltage vs Input Voltage
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2.56
1.86
TPS62080
VOUT = 2.5 V
Output Voltage (V)
Output Voltage (V)
2.54
2.52
2.50
IOUT = 1A, TA = 25°C
IOUT = 1A, TA = −40°C
IOUT = 1A, TA = 85°C
IOUT = 10mA, TA = 25°C
IOUT = 10mA, TA = −40°C
IOUT = 10mA, TA = 85°C
2.48
2.46
2.44
2.5
3
3.5
4
4.5
Input Voltage (V)
5
5.5
1.82
1.80
1.78
IOUT = 1A, TA = 25°C
IOUT = 1A, TA = −40°C
IOUT = 1A, TA = 85°C
IOUT = 10mA, TA = 25°C
IOUT = 10mA, TA = −40°C
IOUT = 10mA, TA = 85°C
1.76
1.74
1.72
1.70
2.3
6
2.8
G007
Figure 14. Output Voltage vs Input Voltage
5.3
5.8
G008
TPS62080
VIN = 3.6 V
0.908
0.906
Output Voltage (V)
3.32
3.30
3.28
3.26
IOUT = 1A, TA = 25°C
IOUT = 1A, TA = −40°C
IOUT = 1A, TA = 85°C
IOUT = 10mA, TA = 25°C
IOUT = 10mA, TA = −40°C
IOUT = 10mA, TA = 85°C
3.24
3.22
3.20
3.18
3.3
3.8
4.3
4.8
Input Voltage (V)
5.3
0.904
0.902
0.900
0.898
0.896
TA = 25°C
TA = −40°C
TA = 85°C
0.894
0.892
0.890
10u
5.8
100u
G009
Figure 16. Output Voltage vs Input Voltage
1m
10m
100m
Output Current (A)
1
3
G010
Figure 17. Output Voltage vs Load Current
2.54
1.84
TPS62080
VIN = 3.6 V
TPS62081
VIN = 3.6 V
2.52
Output Voltage (V)
Output Voltage (V)
3.8
4.3
4.8
Input Voltage (V)
0.910
TPS62082
VOUT = 3.3 V
3.34
2.50
2.48
TA = 25°C
TA = −40°C
TA = 85°C
2.46
10u
100u
1m
10m
100m
Output Current (A)
1
Figure 18. Output Voltage vs Load Current
16
3.3
Figure 15. Output Voltage vs Input Voltage
3.36
Output Voltage (V)
TPS62081
VOUT = 1.8 V
1.84
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3
G011
1.82
1.80
1.78
TA = 25°C
TA = −40°C
TA = 85°C
1.76
10u
100u
1m
10m
100m
Output Current (A)
1
3
G012
Figure 19. Output Voltage vs Load Current
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SLVSAE8F – SEPTEMBER 2011 – REVISED NOVEMBER 2016
3.34
3M
TPS62082
VIN = 3.6 V
Switching Frequency (Hz)
Output Voltage (V)
3.32
3.30
3.28
TA = 25°C
TA = −40°C
TA = 85°C
3.26
3.24
10u
100u
1m
10m
100m
Output Current (A)
1
TPS62080
VOUT = 0.9V
2.5M
2M
1.5M
1M
VIN = 2.3V
VIN = 3.3V
VIN = 4.2V
VIN = 5.0V
500k
0
3
0
G013
Figure 20. Output Voltage vs Load Current
400m
800m
Output Current (A)
1.2
1.6
G014
Figure 21. Switching Frequency vs Load Current
4.5M
Switching Frequency (Hz)
VIN = 2.5V
VIN = 3.3V
VIN = 4.2V
VIN = 5.0V
TPS62080
VOUT = 2.5V
4M
3.5M
SW
(2 V/div)
3M
2.5M
2M
1.5M
VOUT
(20 mV/div)
1M
500k
0
0
400m
800m
Output Current (A)
1.2
1.6
I COIL
(0.5 A/div)
G015
Time (200 ns/div)
VIN = 3.3 V, VOUT = 1.2 V, Load Current = 500 mA
Figure 23. Typical Application (PWM Mode)
Figure 22. Switching Frequency vs Load Current
SW
(2 V/div)
SW
2V/div
VOUT
(20 mV/div)
VOUT
50mV/div
I COIL
(0.2 A/div)
I COIL
0.2A/div
Time (2 µs/div)
VIN = 3.3 V, VOUT = 1.2 V, Load Current = 10 mA
Figure 24. Typical Application (PFM Mode)
Copyright © 2011–2016, Texas Instruments Incorporated
t - 50µs/div
VIN = 3.3 V, VOUT = 1.2 V, Load Current = 2 mA
Figure 25. Typical Application (Snooze Mode)
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1A
LOAD
(1 A/div)
4.2 V
VIN
(1 V/div)
50 mA
3.3 V
VOUT
(20 mV/div)
VOUT
(50 mV/div)
I COIL
(1 A/div)
Time (50 µs/div)
Time (100 µs/div)
VIN = 3.3 V, VOUT = 1.2 V, Load Current = 50 mA to 1 A
VIN = 3.3 V to 4.2 V, VOUT = 1.2 V, Load = 2.2 Ω
Figure 26. Load Transient
Figure 27. Line Transient
EN
(5 V/div)
EN
(5 V/div)
PG
(1 V/div)
PG
(1 V/div)
VOUT
(1 V/div)
VOUT
(1 V/div)
ICOIL
(0.5 A/div)
ICOIL
(0.2 A/div)
Time (20 µs/div)
Time (20 µs/div)
VIN = 3.3 V, VOUT = 1.2 V, No Load
VIN = 3.3 V, VOUT = 1.2 V, Load = 2.2 Ω
Figure 29. Start Up (Without Load)
Figure 28. Start Up
EN
5V/div
VOUT
0.5V/div
t - 20ms/div
VIN = 3.3 V, VOUT = 1.2 V, No Load
Figure 30. Shutdown
18
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SLVSAE8F – SEPTEMBER 2011 – REVISED NOVEMBER 2016
10 Power Supply Recommendations
The device is designed to operate from an input supply voltage range between 2.3 V and 6 V. Ensure that the
input power supply has a sufficient current rating for the application.
11 Layout
11.1 Layout Guidelines
The PCB layout is an important step to maintain the high performance of the TPS6208x devices.
The input/output capacitors and the inductor should be placed as close as possible to the IC. This keeps the
traces short. Routing these traces direct and wide results in low trace resistance and low parasitic inductance. A
common power GND should be used. The low-side of the input and output capacitors must be connected
properly to the power GND to avoid a GND potential shift.
The sense traces connected to the FB and VOS pins are signal traces. Special care should be taken to avoid
noise being induced. By a direct routing, parasitic inductance can be kept small. GND layers might be used for
shielding. Keep these traces away from SW nodes.
11.2 Layout Example
space
L1
VOUT
PG
VOS
SW
C1
VIN
VIN
GND
FB
MODE
EN
GND
C2
GND
R1
R2
Figure 31. PCB Layout Suggestion
11.3 Thermal Considerations
Implementation of integrated circuits in low-profile and fine-pitch surface-mount packages typically requires
special attention to power dissipation. Many system-dependent issues such as thermal coupling, airflow, added
heat sinks and convection surfaces, and the presence of other heat-generating components affect the powerdissipation limits of a given component.
Three basic approaches for enhancing thermal performance are listed below:
• Improving the power dissipation capability of the PCB design
• Improving the thermal coupling of the component to the PCB by soldering Exposed Thermal Pad
• Introducing airflow in the system
For more details on how to use the thermal parameters, see the application notes: Thermal Characteristics of
Linear and Logic Packages Using JEDEC PCB Designs (SZZA017) and Semiconductor and IC Package Thermal
Metrics (SPRA953).
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12 Device and Documentation Support
12.1 Device Support
12.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
12.2 Documentation Support
12.2.1 Related Documentation
For related documentation see the following:
Thermal Characteristics of Linear and Logic Packages Using JEDEC PCB Designs (SZZA017)
12.3 Related Links
The table below lists quick access links. Categories include technical documents, support and community
resources, tools and software, and quick access to sample or buy.
Table 7. Related Links
PARTS
PRODUCT FOLDER
SAMPLE & BUY
TECHNICAL
DOCUMENTS
TOOLS &
SOFTWARE
SUPPORT &
COMMUNITY
TPS62080
Click here
Click here
Click here
Click here
Click here
TPS62080A
Click here
Click here
Click here
Click here
Click here
TPS62081
Click here
Click here
Click here
Click here
Click here
TPS62082
Click here
Click here
Click here
Click here
Click here
12.4 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
12.5 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
12.6 Trademarks
DCS-Control, E2E are trademarks of Texas Instruments.
All other trademarks are the property of their respective owners.
12.7 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
20
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SLVSAE8F – SEPTEMBER 2011 – REVISED NOVEMBER 2016
12.8 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
Copyright © 2011–2016, Texas Instruments Incorporated
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PACKAGE OPTION ADDENDUM
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29-Apr-2022
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
(4/5)
(6)
TPS62080ADSGR
ACTIVE
WSON
DSG
8
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
SBN
TPS62080ADSGT
ACTIVE
WSON
DSG
8
250
RoHS & Green NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
SBN
TPS62080DSGR
ACTIVE
WSON
DSG
8
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
QVR
TPS62080DSGT
ACTIVE
WSON
DSG
8
250
RoHS & Green NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
QVR
TPS62081DSGR
ACTIVE
WSON
DSG
8
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
QVS
TPS62081DSGT
ACTIVE
WSON
DSG
8
250
RoHS & Green NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
QVS
TPS62082DSGR
ACTIVE
WSON
DSG
8
3000
RoHS & Green NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
QVT
TPS62082DSGT
ACTIVE
WSON
DSG
8
250
RoHS & Green NIPDAU | NIPDAUAG
Level-2-260C-1 YEAR
-40 to 125
QVT
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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