TPS631010, TPS631011
SLVSGO6A – DECEMBER 2022 – REVISED AUGUST 2023
TPS631010 and TPS631011 1.5-A Output Current, Buck-Boost Converters in Small
Wafer Chip Scale Package
1 Features
2 Applications
•
•
•
•
•
•
•
•
•
•
•
•
TWS
System pre-regulator (smartphone, tablet,
terminal, telematics)
Point-of-load regulation (wired sensor, port/cable
adapter, and dongle)
Fingerprint, camera sensors (electronic smart lock,
IP network camera)
Voltage stabilizer (datacom, optical modules,
cooling/heating)
3 Description
The TPS631010 and TPS631011 are constant
frequency peak current mode control buck-boost
converters in tiny wafer chip scale package. They
have a 3-A peak current limit (typical) and 1.6-V
to 5.5-V input voltage range, and provide a power
supply solution for system pre-regulators and voltage
stabilizers.
Depending on the input voltage, the TPS631010 and
TPS631011 automatically operate in boost, buck, or
in 3-cycle buck-boost mode when the input voltage
is approximately equal to the output voltage. The
transitions between modes happen at a defined
duty cycle and avoid unwanted toggling within the
modes to reduce output voltage ripple. 8-μA quiescent
current and power save mode enable the highest
efficiency for light to no-load conditions.
The devices offer a very small solution size in WCSP.
Package Information
Part Number
TPS631010
TPS631011
(1)
L1
LX1
VI
CO
VEXT
1.803 mm × 0.905 mm
90
85
80
VIN=1.6 V
VIN=2.8 V
VIN=3.3 V
VIN=4.2 V
Vin=5.5V
75
FB
MODE
WCSP
95
VO
VOUT
CI
To/From
System
Body Size (NOM)
100
LX2
VIN
Package(1)
For all available packages, see the orderable addendum at
the end of the data sheet.
Efficiency (%)
•
1.6-V to 5.5-V input voltage range
– Device input voltage > 1.65 V for start-up
1.2-V to 5.5-V output voltage range(adjustable)
– 1.0-V VOUT is supported in PFM mode
High output current capability, 3-A peak switch
current
– 2-A output current for VIN ≥ 3 V, VOUT = 3.3 V
– 1.5-A output current for VIN ≥ 2.7 V, VOUT = 3.3
V
Active output discharge (TPS631011 only)
High efficiency over the entire load range
– 8-μA typical quiescent current
– Automatic power save mode and forced PWM
mode configurable
Peak current buck-boost mode architecture
– Seamless mode transition
– Forward and reverse current operation
– Start-up into pre-biased outputs
– Fixed-frequency operation with 2-MHz
switching
Safety and robust operation features
– Overcurrent protection and short-circuit
protection
– Integrated soft start with active ramp adoption
– Overtemperature protection and overvoltage
protection
– True shutdown function with load disconnect
– Forward and backward current limit
Small solution size
– Small 1-µH inductor
– 1.803-mm × 0.905-mm in WCSP
70
0.0001
EN
GND
Typical Application
0.001
0.01
0.05
0.2 0.5 1
Output Current (A)
2 3 455
Efficiency vs Output Current (VOUT = 3.3 V)
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS631010, TPS631011
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SLVSGO6A – DECEMBER 2022 – REVISED AUGUST 2023
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Device Comparison Table...............................................3
6 Pin Configuration and Functions...................................4
7 Specifications.................................................................. 5
7.1 Absolute Maximum Ratings........................................ 5
7.2 ESD Rating................................................................. 5
7.3 Recommended Operating Conditions.........................5
7.4 Thermal Information....................................................5
7.5 Electrical Characteristics ............................................6
8 Detailed Description........................................................7
8.1 Overview..................................................................... 7
8.2 Functional Block Diagram........................................... 7
8.3 Feature Description ....................................................7
8.4 Device Functional Modes..........................................10
9 Application and Implementation.................................. 11
9.1 Application Information..............................................11
9.2 Typical Application.................................................... 11
9.3 Power Supply Recommendations.............................18
9.4 Layout....................................................................... 18
10 Device and Documentation Support..........................20
10.1 Device Support ...................................................... 20
10.2 Receiving Notification of Documentation Updates..20
10.3 Support Resources................................................. 20
10.4 Trademarks............................................................. 20
10.5 Electrostatic Discharge Caution..............................20
10.6 Glossary..................................................................20
11 Mechanical, Packaging, and Orderable
Information.................................................................... 21
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (December 2022) to Revision A (August 2023)
Page
• Initial release of the TPS631011.........................................................................................................................1
• Updated Input voltage for less than 10 ns spec from -0.3 V min to -2 V min......................................................5
• Added Thermal shutdown threshold temperature and hysteresis specification to the PROTECTION
FEATURES.........................................................................................................................................................6
2
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5 Device Comparison Table
PART NUMBER
Output Discharge
TPS631010
No
TPS631011
YES
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6 Pin Configuration and Functions
VIN
EN
A1
A2
LX1
MODE
B1
B2
LX2
GND
C1
C2
VOUT
FB
D1
D2
Figure 6-1. 8-Pin YBG WCSP Package (Top View)
Table 6-1. Pin Functions
PIN
(1)
4
I/O(1)
DESCRIPTION
NAME
NO.
VIN
A1
PWR
EN
A2
I
LX1
B1
PWR
MODE
B2
I
LX2
C1
PWR
Inductor switching node of the boost stage
GND
C2
PWR
Power ground
VOUT
D1
PWR
Power stage output
FB
D2
I
Supply input voltage
Device enable. Set High to enable and Low to disable. It must not be left floating.
Inductor switching node of the buck stage
PFM/PWM selection. Set Low for power save mode, set High for forced PWM. It must not be
left floating.
Voltage feedback. Sensing pin
PWR = power, I = input
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7 Specifications
7.1 Absolute Maximum Ratings
over operating junction temperature range (unless otherwise noted)(1)
Input voltage (VIN, LX1, LX2, VOUT, EN, FB, MODE)(2)
VI
MAX
6.0
UNIT
V
–2.0
7.0
V
TJ
Operating junction temperature
–40
150
°C
Tstg
Storage temperature
–65
150
°C
(1)
(2)
Input voltage for less than 10 ns (LX1,
LX2)(2)
MIN
–0.3
Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions.
If used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
All voltage values are with respect to network ground terminal, unless otherwise noted.
7.2 ESD Rating
VALUE
V(ESD)
(1)
(2)
Human-body model (HBM), per ANSI/ESDA/JEDEC
Electrostatic discharge
JS-001(1)
UNIT
±1000
Charged-device model (CDM), per JEDEC specification JS-002(2)
V
± 500
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
7.3 Recommended Operating Conditions
over operating junction temperature (unless otherwise noted)
MIN
NOM
MAX
UNIT
VI
Supply voltage
1.6
5.5
V
VO
Output voltage
1.2
5.5
V
CI
Effective Input capacitance
VI = 1.6 V to 5.5 V
4.2
µF
1.2 V ≤ VO ≤ 3.6 V, nominal value at VO = 3.3 V
10.4
16.9
330
3.6 V < VO ≤ 5.5 V, nominal value at VO = 5 V
7.95
10.6
330
µF
1
1.3
µH
125
°C
CO
Effective Output capacitance
L
Effective Inductance
0.7
TJ
Operating junction
temperature range
–40
µF
7.4 Thermal Information
over operating free-air temperature range (unless otherwise noted)
TPS631010 TPS631011
THERMAL METRIC
YBG(WCSP)
UNIT
8 pins
RΘJA
Junction-to-ambient thermal resistance
84
°C/W
RΘJC(top)
Junction-to-case (top) thermal resistance
0.7
°C/W
RΘJB
Junction-to-board thermal resistance
43.9
°C/W
ΨJT
Junction-to-top characterization parameter
2.9
°C/W
ΨJB
Junction-to-board characterization parameter
43.7
°C/W
RΘJC(bot)
Junction-to-case (bottom) thermal resistance
N/A
°C/W
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7.5 Electrical Characteristics
Over operating junction temperature range and recommended supply voltage range (unless otherwise noted). Typical values
are at VI = 3.8 V , VO = 3.3 V and TJ = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
ISD
Shutdown current into VIN
VI = 3.8 V, V(EN) = 0 V
0.5
0.9
μA
IQ
Quiescent current into VIN
VI = 2.2 V, VO = 3.3 V, V(EN) = 2.2 V, no switching
TJ = 25°C
0.15
6.1
μA
IQ
Quiescent current into VOUT
VI = 2.2 V, VO = 3.3 V, V(EN) = 2.2 V, no switching
8
VIT+
Positive-going UVLO threshold voltage
VIT–
Negative-going UVLO threshold voltage
Vhys
UVLO threshold voltage hysteresis
VI(POR)T+
Positive-going POR threshold voltage(1)
VI(POR)T-
μA
1.5
1.55
1.599
V
1.4
1.45
1.499
V
1.25
1.45
1.65
V
Negative-going POR threshold voltage(1)
1.22
1.43
1.6
V
VT+
Positive-going threshold
voltage
EN, MODE
0.77
0.98
1.2
V
VT-
Negative-going threshold
voltage
EN, MODE
0.5
0.66
0.76
V
Vhys
Hysteresis voltage
EN, MODE
During start-up
99
maximum of VI or VO
mV
I/O SIGNALS
IIH
High-level input current
EN, MODE
IIL
Low-level input current
EN, MODE
Input bias current
EN, MODE
300
V(EN) = V(MODE) = 1.5 V,
no pullup resistor
mV
±0.01
±0.25
µA
V(EN) = V(MODE) = 0 V,
±0.01
±0.1
µA
V(EN) = 5.5 V
±0.01
±0.3
µA
POWER SWITCH
rDS(on)
On-state resistance
Q1
45
mΩ
Q2
50
mΩ
50
mΩ
85
mΩ
VI = 3.8 V, VO = 3.3 V,
test current = 0.2 A
Q3
Q4
CURRENT LIMIT
Output sourcing current
IL(PEAK)
Switch peak current limit (2)
Q1
VO = 3.3 V
PFM mode entry threshold (peak) current
Output sinking current, VI =
3.3 V
2.6
3
3.35
A
–0.7
–0.55
–0.45
A
(2)
IO falling
145
mA
TPS631011 Output discharge current
EN = LOW, VI = 2.2V VO = 3.3V
–67
mA
OUTPUT
IDIS
CONTROL[FEEDBACK PIN]
VFB
Reference voltage on feedback pin
495
500
505
mV
PROTECTION FEATURES
VT+(OVP)
Positive-going OVP threshold
voltage
5.55
5.75
5.95
V
VT+(IVP)
Positive-going IVP threshold
voltage
5.55
5.75
5.95
V
TSD_R
Thermal shutdown threshold temperature
TSD_HYS
Thermal shutdown hysteresis
TJ rising
160
°C
25
°C
TIMING PARAMETERS
td(EN)
Delay between a rising edge on the EN pin
and the start of the output voltage ramp
td(ramp)
Soft-start ramp time
fSW
Switching frequency
(1)
(2)
6
0.87
1.5
ms
6.42
7.55
8.68
ms
1.8
2
2.2
MHz
The POR (Power On Reset) threshold is the minimum supply of the internal VMAX block that allows the device to operate
Current limit production test are performed under DC conditions. The current limit in operation is somewhat higher and depending on
propagation delay and the applied external components
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8 Detailed Description
8.1 Overview
The TPS631010 and TPS631011 are constant frequency peak current mode control buck-boost converters.
The converters use a fixed-frequency topology with approximately 2-MHz switching frequency. The modulation
scheme has three clearly defined operation modes where the converters enter with defined thresholds over the
full operation range of VIN and VOUT. The maximum output current is determined by the Q1 peak current limit,
which is typically 3 A.
8.2 Functional Block Diagram
L
L1
L2
VOUT
VIN
Q4
Q1
CIN
COUT
Q2
Q3
Gate
Driver
Gate
Driver
Current
Sensor
Device
Control
Device
Control
VOUT
VIN
VMAX Switch
EN
+
Device Control
–
–
VIN
Power Safe Mode
Protection
MODE
+
FB
Ref
500 mV
Gate
Driver
Current Limit
VOUT
Buck/Boost Control
Soft-Start
GND
L1, L2
8.3 Feature Description
8.3.1 Undervoltage Lockout (UVLO)
The input voltage of the VIN pin is continuously monitored if the device is not in shutdown mode. UVLO only
stops or starts the converter operation. The UVLO does not impact the core logic of the device. UVLO avoids
a brownout of the device during device operation. In case the supply voltage on the VIN pin is lower than the
negative-going threshold of UVLO, the converter stops its operation. To avoid a false disturbance of the power
conversion, the UVLO falling threshold logic signal is digitally de-glitched.
If the supply voltage on the VIN pin recovers to be higher than the UVLO rising threshold, the converter returns
to operation. In this case, the soft-start procedure restarts faster than under start-up without a pre-biased output.
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8.3.2 Enable and Soft Start
EN
A
B
IL(lim_SS)
IL
VT+(UVP)
VO
td(EN)
td(RAMP)
Figure 8-1. Typical Soft-Start Behavior
When the input voltage is above the UVLO rising threshold and the EN pin is pulled to a voltage above 1.2 V, the
TPS631010 and TPS631011 are enabled and start up after a short delay time, td(EN).
The devices have an inductor peak current clamp to limit the inrush current during start-up. When the minimum
current clamp (IL(lim_SS)) is lower than the current that is necessary to follow the voltage ramp, the current
automatically increases to follow the voltage ramp. The minimum current limit ensures as fast as possible soft
start if the capacitance is chosen lower than what the ramp time td(RAMP) was selected for.
In a typical start-up case as shown in Figure 8-1 (low output load, typical output capacitance), the minimum
current clamp limits the inrush current and charges the output capacitor. The output voltage then rises faster
than the reference voltage ramp (see phase A in Figure 8-1). To avoid an output overshoot, the current clamp
is deactivated when the output is close to the target voltage and follows the reference voltage ramp slew value
given by the voltage ramp, which is finishing the start up (see phase B in Figure 8-1). The transition from the
minimum current clamp operation is sensed by using the threshold VT+(UVP), which is typically 90% of the target
output voltage. After phase B, the output voltage is well regulated to the nominal target voltage. The current
waveform depends on the output load and operation mode.
8.3.3 Adjustable Output Voltage
The output voltage is set by an external resistor divider. The resistor divider must be connected between VOUT,
FB, and GND. The feedback voltage is given by VFB. The recommended low-side resistor R2 (between FB and
GND) is below 100 kΩ. The high-side resistor R1 (between FB and VOUT) is calculated by Equation 1.
R1 = R2 × (VOUT / VFB - 1)
(1)
The typical VFB voltage is 0.5 V.
8.3.4 Mode Selection (PFM/FPWM)
The mode pin is a digital input to enable PFM/FPWM.
When the MODE pin is connected to logic low, the device works in auto PFM mode. The device features a power
save mode to maintain the highest efficiency over the full operating output current range. PFM automatically
changes the converter operation from CCM to pulse frequency modulation.
When the MODE pin is connected to logic high, the device works in forced PWM mode, regardless of the output
current, to achieve minimum output ripple.
8
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8.3.5 Output Discharge
TPS631011 provides an active pull down current(67mA typ) to quickly discharge output when the EN is logic
low. With this function, the VOUT is connected to ground through internal circuitry, preventing the output from
“floating” or entering into an undetermined state. The output discharge function makes the power on and
off sequencing smooth. Pay attention to the output discharge function if use this device in applications such
as power multiplexing, because the output discharge circuitry creates a constant current path between the
multiplexer output and the ground.
8.3.6 Reverse Current Operation
The device can support reverse current operation (the current flows from VOUT pin to VIN pin) in FPWM mode.
If the output feedback voltage on the FB pin is higher than the reference voltage, the converter regulation forces
a current into the input capacitor. The reverse current operation is independent of the VIN voltage or VOUT
voltage ratio, hence it is possible on all device operation modes boost, buck, or buck-boost.
8.3.7 Protection Features
The following sections describe the protection features of the device.
8.3.7.1 Input Overvoltage Protection
The TPS631010 and TPS631011 have input overvoltage protection which avoids any damage to the device in
case the current flows from the output to the input and the input source cannot sink current (for example, a diode
in the supply path).
If forced PWM mode is active, the current can go negative until it reaches the sink current limit. Once the input
voltage threshold, VT+(IVP), is reached on the VIN pin, the protection disables forced PWM mode and only allows
current to flow from VIN to VOUT. After the input voltage drops under the input voltage protection threshold,
forced PWM mode can be activated again.
8.3.7.2 Output Overvoltage Protection
The devices have the output overvoltage protection which avoids any damage to the device in case the external
feedback pin is not working properly.
If the output voltage threshold VT+(OVP) is reach on the VOUT pin, the protection disables converter power stage
and enters a high impedance at the switch nodes.
8.3.7.3 Short Circuit Protection
The device features peak current limit performance at short circuit protection. Figure 8-2 shows a typical device
behavior of an short/overload event of the short circuit protection.
VO
IL(PEAK)
IL
Figure 8-2. Typical Device Behavior During Short Circuit Protection
8.3.7.4 Thermal Shutdown
To avoid thermal damage of the device, the temperature of the die is monitored. The device stops operation
once the sensed temperature rises over the thermal threshold. After the temperature drops below the thermal
shutdown hysteresis, the converter returns to normal operation.
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8.4 Device Functional Modes
The device has two functional modes: off and on. The device enters the on mode when the voltage on the VIN
pin is higher than the UVLO threshold and a high logic level is applied to the EN pin. The device enters the off
mode when the voltage on the VIN pin is lower than the UVLO threshold or a low logic level is applied to the EN
pin.
on
VI > VIT+ &&
EN pin = high
VI < VIT± ||
EN pin = low
off
Figure 8-3. Device Functional Modes
10
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
The TPS631010 and TPS631011 are a high-efficiency, low-quiescent current, buck-boost converters. The device
is suitable for applications needing a regulated output voltage from an input supply that can be higher or lower
than the output voltage.
9.2 Typical Application
L1
1 µH
VI = 1.6 ± 5.5 V
LX1
LX2
VIN
VO = 3.3 V
VOUT
CI
CO
22 µF
47 µF
R1
511 k
FB
MODE
To/From
System
R2
EN
GND
91 k
Figure 9-1. 3.3-VOUT Typical Application
9.2.1 Design Requirements
The design parameters are listed in Table 9-1.
Table 9-1. Design Parameters
PARAMETERS
VALUES
Input voltage
2.7 V to 4.3 V
Output voltage
3.3 V
Output current
1.5 A
9.2.2 Detailed Design Procedure
The first step is the selection of the output filter components. To simplify this process, Recommended Operating
Conditions outlines minimum and maximum values for inductance and capacitance. Pay attention to the
tolerance and derating when selecting nominal inductance and capacitance.
9.2.2.1 Inductor Selection
The inductor selection is affected by several parameters such as the following:
•
•
Inductor ripple current
Output voltage ripple
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•
•
Transition point into power save mode
Efficiency
See Table 9-2 for typical inductors.
For high efficiencies, the inductor with a low DC resistance is needed to minimize conduction losses. Especially
at high-switching frequencies, the core material has a high impact on efficiency. When using small chip
inductors, the efficiency is reduced mainly due to higher inductor core losses. Core losses need to be considered
when selecting the appropriate inductor. The inductor value determines the inductor ripple current. The larger
the inductor value, the smaller the inductor ripple current and the lower the conduction losses of the converter.
Conversely, larger inductor values cause a slower load transient response. To avoid saturation of the inductor,
the peak current for the inductor in steady state operation is calculated using Equation 3. Only the equation
that defines the switch current in boost mode is shown because this provides the highest value of current and
represents the critical current value for selecting the right inductor.
Duty Cycle Boost
IPEAK =
D=
V
-V
IN
OUT
V
OUT
(2)
Iout
Vin ´ D
+
η ´ (1 - D)
2 ´ f ´ L
(3)
where:
• D = duty cycle in boost mode
• f = converter switching frequency (typical 2 MHz)
• L = inductor value
• η = estimated converter efficiency (use the number from the efficiency curves or 0.9 as an assumption)
Note
The calculation must be done for the minimum input voltage in boost mode.
Calculating the maximum inductor current using the actual operating conditions gives the minimum saturation
current of the inductor needed. It is recommended to choose an inductor with a saturation current 20% higher
than the value calculated using Equation 3. Possible inductors are listed in Table 9-2.
12
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Table 9-2. List of Recommended Inductors
(1)
(2)
INDUCTOR
VALUE [µH]
SATURATION
CURRENT [A]
DCR
[mΩ]
PART NUMBER
MANUFACTURER(1)
SIZE
(L × W × H mm)
1
4.3
42
DFE252012P-1R0M=P2
MuRata
2.5 × 2.0 × 1.2
1
4.2
43
HTEK20161T-1R0MSR
Cyntec
2.0 × 1.6 × 1.0
Taiyo Yuden
2.0 × 1.6 × 1.0
Murata
1.6 × 0.8 × 0.8
1
2.2
75
1
2.0
144
MAKK2016T1R0M
(2)
DFE18SAN1R0ME0 (2)
See the Third-Party Products Disclaimer.
This inductor does not support full output current range.
9.2.2.2 Output Capacitor Selection
For the output capacitor, use small ceramic capacitors placed as close as possible to the VOUT and PGND pins
of the IC. The recommended toal nominal output capacitor value is 47 µF. If, for any reason, the application
requires the use of large capacitors that cannot be placed close to the IC, use a smaller ceramic capacitor in
parallel to the large capacitor, and place the small capacitor as close as possible to the VOUT and PGND pins of
the IC.
It is important that the effective capacitance is given according to the recommended value in Recommended
Operating Conditions. In general, consider DC bias effects resulting in less effective capacitance. The choice of
the output capacitance is mainly a tradeoff between size and transient behavior as higher capacitance reduces
transient response over/undershoot and increases transient response time. Possible output capacitors are listed
in Table 9-3.
Table 9-3. List of Recommended Capacitors
CAPACITOR
VALUE [µF]
VOLTAGE RATING [V]
ESR [mΩ]
PART NUMBER
MANUFACTURER(1)
SIZE
(METRIC)
47
6.3
10
GRM219R60J476ME44
Murata
0805 (2012)
47
10
40
CL10A476MQ8QRN
Semco
0603 (1608)
(1)
See the Third-Party Products Disclaimer.
9.2.2.3 Input Capacitor Selection
A 22-µF input capacitor is recommended to improve line transient behavior of the regulator and EMI behavior
of the total power supply circuit. An X5R or X7R ceramic capacitor placed as close as possible to the VIN and
PGND pins of the IC is recommended. If the input supply is located more than a few inches from the converter,
additional bulk capacitance can be required in addition to the ceramic bypass capacitors. An electrolytic or
tantalum capacitor with a value of 47 µF is a typical choice.
Table 9-4. List of Recommended Capacitors
CAPACITOR
VALUE [µF]
VOLTAGE RATING [V]
ESR [mΩ]
PART NUMBER
MANUFACTURER(1)
SIZE
(METRIC)
22
6.3
43
GRM187R61A226ME15
Murata
0603 (1608)
10
10
40
GRM188R61A106ME69
Murata
0603 (1608)
(1)
See the Third-Party Products Disclaimer.
9.2.2.4 Setting the Output Voltage
The output voltage is set by an external resistor divider. The resistor divider must be connected between VOUT,
FB, and GND. The feedback voltage is 500 mV nominal.
Keep the low-side resistor R2 (between FB and GND) below 100 kΩ. The high-side resistor (between FB and
VOUT) R1 is calculated with Equation 4.
æV
ö
R1 = R2 × ç OUT - 1÷
è VFB
ø
(4)
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where
•
VFB = 500 mV
Table 9-5. Resistor Selection For Typical Output Voltages
14
VOUT
R1
R2
2.5 V
365K
91K
3.3 V
511K
91K
3.6 V
562K
91K
5V
806K
91K
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9.2.3 Application Curves
100
3.4
90
3.36
Efficiency (%)
70
60
50
40
30
VIN=1.6 V
VIN=2.8 V
VIN=3.3 V
VIN=4.2 V
Vin=5.5V
20
10
0
0.0001
0.001
0.01
0.05
0.2 0.5 1
Output Current (A)
VOUT = 3.3 V
Output Voltage (V)
80
3.32
3.28
3.2
0.0001
2 3 455
MODE = High
0.001
0.01
0.05
0.2 0.5 1
Output Current (A)
VOUT = 3.3 V
Figure 9-2. Efficiency vs Output Current (FPWM)
2 3 455
MODE = High
Figure 9-3. Load Regulation (FPWM)
100
3.4
95
3.36
Output Voltage (V)
Efficiency (%)
VIN=1.6V
VIN=2.8V
VIN=3.3V
VIN=4.2V
VIN=5.5V
3.24
90
85
80
VIN=1.6 V
VIN=2.8 V
VIN=3.3 V
VIN=4.2 V
Vin=5.5V
75
70
0.0001
0.001
3.28
VIN=1.6V
VIN=2.8V
VIN=3.3V
VIN=4.2V
VIN=5.5V
3.24
0.01
0.05
0.2 0.5 1
Output Current (A)
VOUT = 3.3 V
3.32
2 3 455
3.2
0.0001
MODE = Low
0.001
0.01
0.05
0.2 0.5 1
Output Current (A)
VO = 3.3 V
Figure 9-4. Efficiency vs Input Voltage (PFM)
2 3 455
MODE = Low
Figure 9-5. Load Regulation (PFM)
3.3
Vout (3.3V o set)
20mV/div
Max Output Current (A)
3
2.7
LX1
2V/div
2.4
2.1
LX2
2V/div
1.8
1.5
1.2
Inductor Current
500mA/div
0.9
0.6
1.5
Time Scale: 200ns/div
2
2.5
3
3.5
4
Input Voltage (V)
4.5
5
5.5
VOUT = 3.3 V
Figure 9-6. Typical Output Current Capability vs
Input Voltage
VIN = 2.7 V, VOUT = 3.3 V
IOUT = 1 A, MODE = Low
Figure 9-7. Switching Waveforms, Boost Operation
with 1-A Load
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Vout (3.3V o set)
20mV/div
Vout(3.3V o set)
20mV/div
LX1
2V/div
LX1
2V/div
LX2
2V/div
LX2
2V/div
Inductor Current
500mA/div
Inductor Current
500mA/div
Time Scale: 200ns/div
Time Scale: 200ns/div
VIN = 3.3 V, VOUT = 3.3 V
IOUT = 1 A, MODE = Low
Figure 9-8. Switching Waveforms with 1-A Load
VIN = 3.6 V, VOUT = 3.3 V
Figure 9-9. Switching Waveforms with 1-A Load
Vout (3.3V o set)
20mV/div
Vout (3.3V o set)
20mV/div
LX1
2V/div
LX1
2V/div
LX2
2V/div
LX2
2V/div
Inductor Current
500mA/div
Inductor Current
500mA/div
Time Scale: 5ms/div
Time Scale: 200ns/div
VIN = 4.3 V, VOUT = 3.3 V
IOUT = 1 A, MODE = Low
Figure 9-10. Switching Waveforms, Buck Operation
with 1-A Load
EN
2V/div
VIN = 3.6 V, VOUT = 3.3 V
IOUT = 1 mA, MODE = Low
Figure 9-11. Switching Waveforms at 1-mA Load
EN
2V/div
Vout
2V/div
Vout
2V/div
LX2
2V/div
LX2
2V/div
Inductor Current
500mA/div
Inductor Current
500mA/div
Time Scale: 5ms/div
VIN = 3.6 V, VOUT = 3.3 V
Time Scale: 500 s/div
Rload = 4 Ω, MODE = Low
Figure 9-12. Start-Up by EN
16
IOUT = 1 A, MODE = Low
VIN = 3.6 V, VOUT = 3.3 V
Rload = 4 Ω, MODE = Low
Figure 9-13. Shutdown by EN
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Vout (3.3V o set)
50mV/div
Vout (3.3V o set)
200mV/div
LX1
5V/div
LX1
5V/div
LX2
5V/div
LX2
5V/div
Output Current
1A/div
Output Current
1A/div
Time Scale: 100 s/div
VIN = 2.7 V, VOUT = 3.3 V
Time Scale: 5ms/div
IOUT = 100 mA to 1 A with 20µs slew rate
Figure 9-14. Load Transient at 2.7-V Input Voltage
VIN = 2.7 V, VOUT = 3.3 V
IOUT = 100 mA to 1-A sweep
Figure 9-15. Load Sweep at 2.7-V Input Voltage
Vout (3.3V o set)
50mV/div
Vout (3.3V o set)
200mV/div
LX1
5V/div
LX1
5V/div
LX2
5V/div
LX2
5V/div
Output Current
1A/div
Output Current
1A/div
Time Scale: 100 s/div
VIN = 3.6 V, VOUT = 3.3 V
Time Scale: 5ms/div
IOUT = 100 mA to 1 A with 20µs slew rate
VIN = 3.6 V, VOUT = 3.3 V
IOUT = 100 mA to 1-A sweep
Figure 9-17. Load Sweep at 3.6-V Input Voltage
Figure 9-16. Load Transient at 3.6-V Input Voltage
Vout (3.3V o set)
50mV/div
Vout (3.3V o set)
200mV/div
LX1
5V/div
LX1
5V/div
LX2
5V/div
LX2
5V/div
Output Current
1A/div
Output Current
1A/div
Time Scale: 100 s/div
VIN = 4.3 V, VOUT = 3.3 V
Time Scale: 5ms/div
IOUT = 100 mA to 1 A with 20µs slew rate
VIN = 4.3 V, VOUT = 3.3 V
IOUT = 100 mA to 1-A sweep
Figure 9-19. Load Sweep at 4.3-V Input Voltage
Figure 9-18. Load Transient at 4.3-V Input Voltage
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VIN
1V/div
VIN
1V/div
Vout (3.3V o set)
50mV/div
Vout (3.3V o set)
50mV/div
Inductor Current
500mA/div
Inductor Current
500mA/div
Time Scale: 500 s/div
VIN = 2.7 V to 4.3 V with 20-µs
slew rate, VOUT = 3.3 V
Time Scale: 10ms/div
IOUT = 1 A
VIN = 2.7-V to 4.3-V sweep,
VOUT = 3.3 V
Figure 9-20. Line Transient at 1-A Load Current
IOUT = 1 A
Figure 9-21. Line Sweep at 1-A Load Current
Vout
2V/div
Vout
2V/div
LX1
2V/div
LX1
2V/div
LX2
2V/div
LX2
2V/div
Inductor Current
1A/div
Inductor Current
1A/div
Time Scale: 10 s/div
VIN = 3.6 V, VOUT = 3.3 V
Time Scale: 50 s/div
VIN = 3.6 V, VOUT = 3.3 V
IOUT = 1 A, FPWM
IOUT = 1 A, FPWM
Figure 9-23. Output Short Protection (Recover)
Figure 9-22. Output Short Protection (Entry)
Table 9-6. Components for Application Characteristic Curves for VOUT = 3.3 V
REFERENCE
DESCRIPTION(2)
PART NUMBER
MANUFACTURER(1)
U1
High Power Density 1.5 A Buck-Boost Converter
TPS631010 or TPS631011
Texas Instruments
(1)
(2)
L1
1.0 μH, 2.5 mm x 2.0 mm, 4.3 A, 42 mΩ
DFE252012P-1R0M=P2
MuRata
C1
22 µF, 0603, Ceramic Capacitor, ±20%, 6.3 V
GRM187R61A226ME15
Murata
C2
47 µF, 0805, Ceramic Capacitor, ±20%, 6.3 V
GRM219R60J476ME44
Murata
R1
511 kΩ, 0603 Resistor, 1%, 100 mW
Standard
Standard
R2
91 kΩ, 0603 Resistor, 1%, 100 mW
Standard
Standard
See the Third-Party Products Disclaimer.
For other output voltages, refer to Table 9-5 for resistor values.
9.3 Power Supply Recommendations
The TPS631010 and TPS631011 have no special requirements for its input power supply. The input power
supply output current needs to be rated according to the supply voltage, output voltage, and output current.
9.4 Layout
9.4.1 Layout Guidelines
The PCB layout is an important step to maintain the high performance of the device.
• Place input and output capacitors as close as possible to the IC. Traces need to be kept short. Route
wide and direct traces to the input and output capacitors results in low trace resistance and low parasitic
inductance.
• The sense trace connected to FB is signal trace. Keep these traces away from L1 and L2 nodes.
18
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9.4.2 Layout Example
GND
EN
MODE
GND
FB
LX1
LX2
VOUT
VOUT
VIN
VIN
GND
GND
Figure 9-24. Layout Example
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10 Device and Documentation Support
10.1 Device Support
10.1.1 Third-Party Products Disclaimer
TI'S PUBLICATION OF INFORMATION REGARDING THIRD-PARTY PRODUCTS OR SERVICES DOES NOT
CONSTITUTE AN ENDORSEMENT REGARDING THE SUITABILITY OF SUCH PRODUCTS OR SERVICES
OR A WARRANTY, REPRESENTATION OR ENDORSEMENT OF SUCH PRODUCTS OR SERVICES, EITHER
ALONE OR IN COMBINATION WITH ANY TI PRODUCT OR SERVICE.
10.1.2 Development Support
10.1.2.1 Custom Design with WEBENCH Tools
Click here to create a custom design using the TPS631010 and TPS631011 with the WEBENCH® Power
Designer.
1. Start by entering your VIN, VOUT and IOUT requirements.
2. Optimize your design for key parameters like efficiency, footprint or cost using the optimizer dial and
compare this design with other possible solutions from Texas Instruments.
3. WEBENCH Power Designer provides you with a customized schematic along with a list of materials with real
time pricing and component availability.
4. In most cases, you can:
• Run electrical simulations to see important waveforms and circuit performance,
• Run thermal simulations to understand the thermal performance of your board,
• Export your customized schematic and layout into popular CAD formats,
• Print PDF reports for the design, and share your design with colleagues.
5. Get more information about WEBENCH tools at www.ti.com/webench.
10.2 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
10.3 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
10.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
WEBENCH® is a registered trademark of Texas Instruments.
All trademarks are the property of their respective owners.
10.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
10.6 Glossary
TI Glossary
20
This glossary lists and explains terms, acronyms, and definitions.
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11 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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11-Sep-2023
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TPS631010YBGR
ACTIVE
DSBGA
YBG
8
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
1NS
Samples
TPS631011YBGR
ACTIVE
DSBGA
YBG
8
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 125
1OM
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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