CTLDM7003T-M563D

CTLDM7003T-M563D SURFACE MOUNT DUAL, N-CHANNEL ENHANCEMENT-MODE SILICON MOSFETS w w w. c e n t r a l s e m i . c o m DESCRIPTION: The CENTRAL SEMICONDUCTOR CTLDM7003TM563D is a Dual N-channel MOSFET packaged in a space saving 1.6 x 1.6mm TLM™ surface mount package. This device is a TLM™ equivalent of the popular CMLDM7003T, SOT-563 device, featuring enhanced thermal characteristics, a package footprint compatible with standard SOT-563 mounting pad geometries, and a height profile of only 0.4mm. MARKING CODE: CJA FEATURES: • ESD protection up to 2kV • Dual MOSFETs • Low rDS(ON) (1.6Ω TYP @ VGS=1.8V) • TLM563D with a package profile of 0.4mm, compatible with SOT-563 mounting geometries SYMBOL VDS VDG VGS ID IDM PD TJ, Tstg ΘJA 50 50 12 280 1.5 350 -65 to +150 357 UNITS V V V mA A mW °C °C/W UNITS nA μA μA nA V 1.2 1.4 1.6 1.3 1.1 200 5.0 50 25 1.8mm2. TLM563D CASE • Device is Halogen Free by design APPLICATIONS: • Load Power Switches • DC/DC Converters • Battery powered devices including Cell Phones, PDAs, Digital Cameras, MP3 Players, etc. MAXIMUM RATINGS: (TA=25°C) Drain-Source Voltage Drain-Gate Voltage Gate-Source Voltage Continuous Drain Current Maximum Pulsed Drain Current Power Dissipation (Note 1) Operating and Storage Junction Temperature Thermal Resistance (Note 1) ELECTRICAL CHARACTERISTICS PER TRANSISTOR: (TA=25°C unless otherwise noted) SYMBOL TEST CONDITIONS MIN TYP MAX IGSSF, IGSSR VGS=5.0V, VDS=0 50 IGSSF, IGSSR IGSSF, IGSSR IDSS BVDSS VGS(th) VSD rDS(ON) rDS(ON) rDS(ON) gFS Crss Ciss Coss VGS=10V, VDS=0 VGS=12V, VDS=0 VDS=50V, VGS=0 VGS=0, ID=10μA VDS=10V, ID=250μA VGS=0, IS=115mA VGS=1.8V, ID=50mA VGS=2.5V, ID=50mA VGS=5.0V, ID=50mA VDS=10V, ID=200mA VDS=25V, VGS=0, f=1.0MHz VDS=25V, VGS=0, f=1.0MHz VDS=25V, VGS=0, f=1.0MHz 50 0.75 0.5 1.0 50 V V Ω Ω Ω mS pF pF pF 2.3 1.9 1.5 Notes: (1) Mounted on 2 inch square FR4 PCB with copper mounting pad area of R1 (17-February 2010) CTLDM7003T-M563D SURFACE MOUNT DUAL, N-CHANNEL ENHANCEMENT-MODE SILICON MOSFETS TLM563D CASE - MECHANICAL OUTLINE SUGGESTED MOUNTING PADS (Dimensions in mm) PIN CONFIGURATION LEAD CODE: 1) Gate Q1 2) Source Q1 3) Drain Q2 4) Gate Q2 5) Source Q2 6) Drain Q1 MARKING CODE: CJA R1 (17-February 2010) w w w. c e n t r a l s e m i . c o m