BSC012N06NS
MOSFET
OptiMOSTM5Power-Transistor,60V
TSON-8-3
8
7
Features
5
6
6
5
•Optimizedforsynchronousrectification
•100%avalanchetested
•Superiorthermalresistance
•N-channel
•175°Crated
•Pb-freeleadplating;RoHScompliant
•Halogen-freeaccordingtoIEC61249-2-21
•Highersolderjointreliabilityduetoenlargedsourceinterconnection
ProductValidation:
Qualifiedforindustrialapplicationsaccordingtotherelevanttestsof
JEDEC47/20/22
Table1KeyPerformanceParameters
Parameter
Value
Unit
VDS
60
V
RDS(on),max
1.2
mΩ
ID
100
A
QOSS
122
nC
QG(0V..10V)
115
nC
2
4
3
3
4
2
1
S1
8D
S2
7D
S3
6D
G4
5D
Package
Marking
RelatedLinks
BSC012N06NS
TSON-8-3
012N06N
-
1
8
Pin 1
Type/OrderingCode
Final Data Sheet
7
Rev.2.1,2018-12-11
OptiMOSTM5Power-Transistor,60V
BSC012N06NS
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Final Data Sheet
2
Rev.2.1,2018-12-11
OptiMOSTM5Power-Transistor,60V
BSC012N06NS
1Maximumratings
atTA=25°C,unlessotherwisespecified
Table2Maximumratings
Parameter
Symbol
Continuous drain current
Values
Unit
Note/TestCondition
100
100
36
A
VGS=10V,TC=25°C
VGS=10V,TC=100°C
VGS=10V,TA=25°C,RthJA=50K/W1)
-
400
A
TC=25°C
-
-
911
mJ
ID=50A,RGS=25Ω
VGS
-20
-
20
V
-
Power dissipation
Ptot
-
-
214
3.0
W
TC=25°C
TA=25°C,RthJA=50K/W1)
Operating and storage temperature
Tj,Tstg
-55
-
175
°C
IEC climatic category;
DIN IEC 68-1: 55/175/56
Unit
Note/TestCondition
Min.
Typ.
Max.
ID
-
-
Pulsed drain current2)
ID,pulse
-
Avalanche energy, single pulse3)
EAS
Gate source voltage
2Thermalcharacteristics
atTj=25°C,unlessotherwisespecified
Table3Thermalcharacteristics
Parameter
Symbol
Thermal resistance, junction - case,
bottom
Values
Min.
Typ.
Max.
RthJC
-
0.35
0.7
K/W
-
Thermal resistance, junction - case,
top
RthJC
-
-
20
K/W
-
Device on PCB,
6 cm2 cooling area1)
RthJA
-
-
50
K/W
-
1)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2)
See Diagram 3 for more detailed information
3)
See Diagram 13 for more detailed information
Final Data Sheet
3
Rev.2.1,2018-12-11
OptiMOSTM5Power-Transistor,60V
BSC012N06NS
3Electricalcharacteristics
atTj=25°C,unlessotherwisespecified
Table4Staticcharacteristics
Parameter
Symbol
Drain-source breakdown voltage
Values
Unit
Note/TestCondition
-
V
VGS=0V,ID=1mA
2.8
3.3
V
VDS=VGS,ID=147µA
-
0.5
10
1
100
µA
VDS=60V,VGS=0V,Tj=25°C
VDS=60V,VGS=0V,Tj=125°C
IGSS
-
10
100
nA
VGS=20V,VDS=0V
Drain-source on-state resistance
RDS(on)
-
0.9
1.2
1.2
1.7
mΩ
VGS=10V,ID=50A
VGS=6V,ID=12.5A
Gate resistance1)
RG
-
2.2
3.3
Ω
-
Transconductance
gfs
85
170
-
S
|VDS|>2|ID|RDS(on)max,ID=50A
Unit
Note/TestCondition
Min.
Typ.
Max.
V(BR)DSS
60
-
Gate threshold voltage
VGS(th)
2.1
Zero gate voltage drain current
IDSS
Gate-source leakage current
Table5Dynamiccharacteristics
Parameter
Symbol
Input capacitance1)
Values
Min.
Typ.
Max.
Ciss
-
8300
11000 pF
VGS=0V,VDS=30V,f=1MHz
Coss
-
1800
2400
pF
VGS=0V,VDS=30V,f=1MHz
Reverse transfer capacitance
Crss
-
71
120
pF
VGS=0V,VDS=30V,f=1MHz
Turn-on delay time
td(on)
-
11
-
ns
VDD=30V,VGS=10V,ID=30A,
RG,ext=1.6Ω
Rise time
tr
-
15
-
ns
VDD=30V,VGS=10V,ID=30A,
RG,ext=1.6Ω
Turn-off delay time
td(off)
-
54
-
ns
VDD=30V,VGS=10V,ID=30A,
RG,ext=1.6Ω
Fall time
tf
-
31
-
ns
VDD=30V,VGS=10V,ID=30A,
RG,ext=1.6Ω
Unit
Note/TestCondition
Output capacitance1)
1)
Table6Gatechargecharacteristics2)
Parameter
Symbol
Gate to source charge
Gate charge at threshold
Values
Min.
Typ.
Max.
Qgs
-
35
-
nC
VDD=30V,ID=50A,VGS=0to10V
Qg(th)
-
23
-
nC
VDD=30V,ID=50A,VGS=0to10V
Gate to drain charge
Qgd
-
21
31
nC
VDD=30V,ID=50A,VGS=0to10V
Switching charge
Qsw
-
32
-
nC
VDD=30V,ID=50A,VGS=0to10V
Gate charge total
Qg
-
115
143
nC
VDD=30V,ID=50A,VGS=0to10V
Gate plateau voltage
Vplateau
-
4.2
-
V
VDD=30V,ID=50A,VGS=0to10V
Gate charge total, sync. FET
Qg(sync)
-
102
-
nC
VDS=0.1V,VGS=0to10V
Qoss
-
122
163
nC
VDD=30V,VGS=0V
1)
1)
1)
Output charge
1)
2)
Defined by design. Not subject to production test
See ″Gate charge waveforms″ for parameter definition
Final Data Sheet
4
Rev.2.1,2018-12-11
OptiMOSTM5Power-Transistor,60V
BSC012N06NS
Table7Reversediode
Parameter
Symbol
Diode continuous forward current
Diode pulse current
Diode forward voltage
1)
Reverse recovery time
1)
Reverse recovery charge
1)
Values
Unit
Note/TestCondition
100
A
TC=25°C
-
400
A
TC=25°C
-
0.8
1.2
V
VGS=0V,IF=50A,Tj=25°C
trr
-
41
82
ns
VR=30V,IF=50A,diF/dt=100A/µs
Qrr
-
170
340
nC
VR=30V,IF=50A,diF/dt=100A/µs
Min.
Typ.
Max.
IS
-
-
IS,pulse
-
VSD
Defined by design. Not subject to production test
Final Data Sheet
5
Rev.2.1,2018-12-11
OptiMOSTM5Power-Transistor,60V
BSC012N06NS
4Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
Diagram2:Draincurrent
250
120
100
200
80
ID[A]
Ptot[W]
150
60
100
40
50
0
20
0
25
50
75
100
125
150
175
0
200
0
25
50
75
TC[°C]
100
125
150
175
200
TC[°C]
Ptot=f(TC)
ID=f(TC);VGS≥10V
Diagram3:Safeoperatingarea
Diagram4:Max.transientthermalimpedance
3
100
10
0.5
1 µs
10 µs
102
100 µs
0.2
10-1
1 ms
0.1
ZthJC[K/W]
ID[A]
10 ms
DC
101
0.05
0.02
0.01
10-2
single pulse
100
10-1
10-1
100
101
102
10-3
10-6
10-5
10-4
VDS[V]
10-2
10-1
100
tp[s]
ID=f(VDS);TC=25°C;D=0;parameter:tp
Final Data Sheet
10-3
ZthJC=f(tp);parameter:D=tp/T
6
Rev.2.1,2018-12-11
OptiMOSTM5Power-Transistor,60V
BSC012N06NS
Diagram5:Typ.outputcharacteristics
Diagram6:Typ.drain-sourceonresistance
400
2.5
8V
7V
10 V
350
2.0
6V
5V
300
5.5 V
RDS(on)[mΩ]
ID[A]
250
5V
200
150
5.5 V
1.5
6V
7V
1.0
8V
10 V
100
0.5
50
0
0.0
0.5
0.0
1.0
0
50
100
150
VDS[V]
200
250
300
350
400
ID[A]
ID=f(VDS);Tj=25°C;parameter:VGS
RDS(on)=f(ID);Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
Diagram8:Typ.forwardtransconductance
250
320
200
240
150
ID[A]
gfs[S]
400
160
100
175 °C
25 °C
80
0
50
0
1
2
3
4
5
6
0
0
VGS[V]
40
60
80
100
ID[A]
ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj
Final Data Sheet
20
gfs=f(ID);Tj=25°C
7
Rev.2.1,2018-12-11
OptiMOSTM5Power-Transistor,60V
BSC012N06NS
Diagram9:Drain-sourceon-stateresistance
Diagram10:Typ.gatethresholdvoltage
2.5
4.0
3.5
2.0
3.0
1470 µA
2.5
1.5
VGS(th)[V]
RDS(on)[mΩ]
max
1.0
147 µA
2.0
1.5
typ
1.0
0.5
0.5
0.0
-60
-20
20
60
100
140
0.0
-60
180
-20
20
Tj[°C]
60
100
140
180
Tj[°C]
RDS(on)=f(Tj);ID=50A;VGS=10V
VGS(th)=f(Tj);VGS=VDS
Diagram11:Typ.capacitances
Diagram12:Forwardcharacteristicsofreversediode
5
103
10
25 °C
175 °C
175 °C, max
25 °C, max
104
103
102
IF[A]
C[pF]
Ciss
Coss
101
102
Crss
101
0
10
20
30
40
50
60
100
0.0
0.5
VDS[V]
C=f(VDS);VGS=0V;f=1MHz
Final Data Sheet
1.0
1.5
2.0
VSD[V]
IF=f(VSD);parameter:Tj
8
Rev.2.1,2018-12-11
OptiMOSTM5Power-Transistor,60V
BSC012N06NS
Diagram13:Avalanchecharacteristics
Diagram14:Typ.gatecharge
2
10
12
30 V
10
12 V
48 V
25 °C
100 °C
101
VGS[V]
IAV[A]
8
6
4
150 °C
2
100
100
101
102
103
tAV[µs]
0
0
20
40
60
80
100
120
Qgate[nC]
IAS=f(tAV);RGS=25Ω;parameter:Tj(start)
VGS=f(Qgate);ID=50Apulsed;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Diagram Gate charge waveforms
70
68
66
64
VBR(DSS)[V]
62
60
58
56
54
52
50
-60
-20
20
60
100
140
180
Tj[°C]
VBR(DSS)=f(Tj);ID=1mA
Final Data Sheet
9
Rev.2.1,2018-12-11
OptiMOSTM5Power-Transistor,60V
BSC012N06NS
5PackageOutlines
DIMENSION
A
b
b1
c
D
D1
E
E1
E2
E3
e
K2
L
L1
L2
DOCUMENT NO.
Z8B00187559
MILLIMETERS
MIN.
MAX.
0.34
-
1.10
0.54
0.05
REVISION
01
SCALE
0.20
4.90
4.25
5.90
4.00
3.14
0.20
0
5.10
4.45
6.10
4.20
3.34
0.40
10:1
1
2mm
EUROPEAN PROJECTION
1.27
(0.37)
0.60
0.43
0.80
0.63
ISSUE DATE
14.12.2017
(0.25)
Figure1OutlineTSON-8-3,dimensionsinmm/inches
Final Data Sheet
10
Rev.2.1,2018-12-11
OptiMOSTM5Power-Transistor,60V
BSC012N06NS
RevisionHistory
BSC012N06NS
Revision:2018-12-11,Rev.2.1
Previous Revision
Revision
Date
Subjects (major changes since last revision)
2.0
2018-03-08
Release of final version
2.1
2018-12-11
Rev. 2.0
Trademarks
Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners.
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Publishedby
InfineonTechnologiesAG
81726München,Germany
©2018InfineonTechnologiesAG
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Final Data Sheet
11
Rev.2.1,2018-12-11