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BSZ0602LSATMA1

BSZ0602LSATMA1

  • 厂商:

    EUPEC(英飞凌)

  • 封装:

    TDFN8

  • 描述:

    MOSFET N-CH 80V 13A/40A TSDSON

  • 数据手册
  • 价格&库存
BSZ0602LSATMA1 数据手册
BSZ0602LS MOSFET OptiMOSª5Power-Transistor,80V TSDSON-8FL (enlarged source interconnection) Features •Idealforhighfrequencyswitching •Optimizedforchargers •ExcellentgatechargexRDS(on)product(FOM) •Verylowon-resistanceRDS(on) •N-channel,logiclevel •100%avalanchetested •Pb-freeplating;RoHScompliant •Halogen-freeaccordingtoIEC61249-2-21 •Highersolderjointreliabilitywithenlargedsourceinterconnection •QualifiedforStandardGradeapplications Table1KeyPerformanceParameters S1 8D S2 7D Parameter Value Unit S3 6D VDS 80 V G4 5D RDS(on),max 7.0 mΩ ID 40 A Qoss 29 nC QG(0V..4.5V) 14 nC Type/OrderingCode Package Marking RelatedLinks BSZ0602LS PG-TSDSON-8 FL 0602LS - Final Data Sheet 1 Rev.2.2,2016-10-20 OptiMOSª5Power-Transistor,80V BSZ0602LS TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.2.2,2016-10-20 OptiMOSª5Power-Transistor,80V BSZ0602LS 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current Values Unit Note/TestCondition 40 40 13 A TC=25°C TC=100°C TA=25°C,RthJA=60K/W1) - 160 A TC=25°C - - 104 mJ ID=20A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 69 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 150 °C IEC climatic category; DIN IEC 68-1: 55/150/56 Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current2) ID,pulse - Avalanche energy, single pulse3) EAS Gate source voltage 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case, bottom Values Min. Typ. Max. RthJC - 1.1 1.8 K/W - Device on PCB, minimal footprint RthJA - - 62 K/W - Device on PCB, 6 cm2 cooling area1) RthJA - - 60 K/W - 1) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 2) See Diagram 3 for more detailed information 3) See Diagram 13 for more detailed information Final Data Sheet 3 Rev.2.2,2016-10-20 OptiMOSª5Power-Transistor,80V BSZ0602LS 3Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 1.7 2.3 V VDS=VGS,ID=36µA - 0.1 10 1 100 µA VDS=80V,VGS=0V,Tj=25°C VDS=80V,VGS=0V,Tj=125°C IGSS - 1 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 7.4 5.9 9.4 7.0 mΩ VGS=4.5V,ID=10A VGS=10V,ID=20A Gate resistance1) RG - 1.3 2 Ω - Transconductance gfs 26 52 - S |VDS|>2|ID|RDS(on)max,ID=20A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 80 - Gate threshold voltage VGS(th) 1.1 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics Parameter Symbol Values Min. Typ. Max. Ciss - 1800 2340 pF VGS=0V,VDS=40V,f=1MHz Coss - 280 364 pF VGS=0V,VDS=40V,f=1MHz Reverse transfer capacitance Crss - 12 21 pF VGS=0V,VDS=40V,f=1MHz Turn-on delay time td(on) - 6.1 - ns VDD=40V,VGS=10V,ID=20A, RG,ext=3Ω Rise time tr - 4.8 - ns VDD=40V,VGS=10V,ID=20A, RG,ext=3Ω Turn-off delay time td(off) - 24.6 - ns VDD=40V,VGS=10V,ID=20A, RG,ext=3Ω Fall time tf - 5.8 - ns VDD=40V,VGS=10V,ID=20A, RG,ext=3Ω Unit Note/TestCondition Input capacitance1) 1) Output capacitance 1) Table6Gatechargecharacteristics2) Parameter Symbol Values Min. Typ. Max. Qgs - 5 - nC VDD=40V,ID=20A,VGS=0to4.5V Gate to drain charge Qgd - 5 7 nC VDD=40V,ID=20A,VGS=0to4.5V Switching charge Qsw - 6.9 - nC VDD=40V,ID=20A,VGS=0to4.5V Gate charge total Qg - 14.1 18 nC VDD=40V,ID=20A,VGS=0to4.5V Gate plateau voltage Vplateau - 2.9 - V VDD=40V,ID=20A,VGS=0to4.5V Gate charge total, sync. FET Qg(sync) - 25 - nC VDS=0.1V,VGS=0to10V Qoss - 29 39 nC VDD=40V,VGS=0V Gate to source charge 1) 1) 1) Output charge 1) 2) Defined by design. Not subject to production test See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.2,2016-10-20 OptiMOSª5Power-Transistor,80V BSZ0602LS Table7Reversediode Parameter Symbol Diode continous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 40 A TC=25°C - 160 A TC=25°C - 0.85 1.2 V VGS=0V,IF=20A,Tj=25°C trr - 32 64 ns VR=40V,IF=20A,diF/dt=100A/µs Qrr - 27 54 nC VR=40V,IF=20A,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test Final Data Sheet 5 Rev.2.2,2016-10-20 OptiMOSª5Power-Transistor,80V BSZ0602LS 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 80 50 40 60 ID[A] Ptot[W] 30 40 20 20 10 0 0 25 50 75 100 125 150 0 175 0 25 50 75 TC[°C] 100 125 150 175 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 101 10 1 µs 102 10 µs ZthJC[K/W] ID[A] 100 100 µs 1 10 DC 1 ms 10 ms 0.5 0.2 0.1 0.05 0.02 10-1 0.01 single pulse 0 10 10-1 10-1 100 101 102 10-2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.2,2016-10-20 OptiMOSª5Power-Transistor,80V BSZ0602LS Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 160 15 10 V 6V 4.5 V 12 120 4V RDS(on)[mΩ] ID[A] 4V 80 3.5 V 9 4.5 V 5V 5.5 V 6V 6 10 V 40 3 3V 0 0 1 2 3 4 0 5 0 20 40 VDS[V] 60 80 100 80 100 ID[A] ID=f(VDS);Tj=25°C;parameter:VGS RDS(on)=f(ID);Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance 160 120 100 120 gfs[S] ID[A] 80 80 60 40 40 20 150 °C 25 °C 0 0 2 4 6 0 0 VGS[V] 40 60 ID[A] ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 20 gfs=f(ID);Tj=25°C 7 Rev.2.2,2016-10-20 OptiMOSª5Power-Transistor,80V BSZ0602LS Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage 15 2.5 12 2.0 360 µA 1.5 VGS(th)[V] RDS(on)[mΩ] 9 max typ 6 3 36 µA 1.0 0.5 0 -60 -20 20 60 100 140 0.0 -60 180 -20 20 60 Tj[°C] 100 140 180 Tj[°C] RDS(on)=f(Tj);ID=20A;VGS=10V VGS(th)=f(Tj);VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 4 103 10 25 °C 150 °C 25 °C, max 150 °C, max Ciss 103 102 IF[A] C[pF] Coss 102 101 Crss 101 0 20 40 60 80 100 0.0 0.5 VDS[V] 1.5 2.0 2.5 VSD[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 1.0 IF=f(VSD);parameter:Tj 8 Rev.2.2,2016-10-20 OptiMOSª5Power-Transistor,80V BSZ0602LS Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 2 10 10 8 40 V 101 VGS[V] IAV[A] 6 25 °C 100 °C 16 V 64 V 4 125 °C 2 100 100 101 102 103 0 0 5 tAV[µs] 10 15 20 25 30 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) VGS=f(Qgate);ID=20Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Gate charge waveforms 90 VBR(DSS)[V] 85 80 75 70 -60 -20 20 60 100 140 180 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.2,2016-10-20 OptiMOSª5Power-Transistor,80V BSZ0602LS 5PackageOutlines Figure1OutlinePG-TSDSON-8FL,dimensionsinmm/inches Final Data Sheet 10 Rev.2.2,2016-10-20 OptiMOSª5Power-Transistor,80V BSZ0602LS RevisionHistory BSZ0602LS Revision:2016-10-20,Rev.2.2 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2016-03-31 Release of final version 2.1 2016-08-10 Update features 2.2 2016-10-20 Update " Features " TrademarksofInfineonTechnologiesAG AURIX™,C166™,CanPAK™,CIPOS™,CoolGaN™,CoolMOS™,CoolSET™,CoolSiC™,CORECONTROL™,CROSSAVE™,DAVE™,DI-POL™,DrBlade™, EasyPIM™,EconoBRIDGE™,EconoDUAL™,EconoPACK™,EconoPIM™,EiceDRIVER™,eupec™,FCOS™,HITFET™,HybridPACK™,Infineon™, ISOFACE™,IsoPACK™,i-Wafer™,MIPAQ™,ModSTACK™,my-d™,NovalithIC™,OmniTune™,OPTIGA™,OptiMOS™,ORIGA™,POWERCODE™, PRIMARION™,PrimePACK™,PrimeSTACK™,PROFET™,PRO-SIL™,RASIC™,REAL3™,ReverSave™,SatRIC™,SIEGET™,SIPMOS™,SmartLEWIS™, SOLIDFLASH™,SPOC™,TEMPFET™,thinQ™,TRENCHSTOP™,TriCore™. TrademarksupdatedAugust2015 OtherTrademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. WeListentoYourComments Anyinformationwithinthisdocumentthatyoufeeliswrong,unclearormissingatall?Yourfeedbackwillhelpustocontinuously improvethequalityofthisdocument.Pleasesendyourproposal(includingareferencetothisdocument)to: erratum@infineon.com Publishedby InfineonTechnologiesAG 81726München,Germany ©2016InfineonTechnologiesAG AllRightsReserved. LegalDisclaimer Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics (“Beschaffenheitsgarantie”). Withrespecttoanyexamples,hintsoranytypicalvaluesstatedhereinand/oranyinformationregardingtheapplicationofthe product,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithoutlimitation warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty. Inaddition,anyinformationgiveninthisdocumentissubjecttocustomer’scompliancewithitsobligationsstatedinthis documentandanyapplicablelegalrequirements,normsandstandardsconcerningcustomer’sproductsandanyuseofthe productofInfineonTechnologiesincustomer’sapplications. Thedatacontainedinthisdocumentisexclusivelyintendedfortechnicallytrainedstaff.Itistheresponsibilityofcustomer’s technicaldepartmentstoevaluatethesuitabilityoftheproductfortheintendedapplicationandthecompletenessoftheproduct informationgiveninthisdocumentwithrespecttosuchapplication. Information Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon TechnologiesOffice(www.infineon.com). Warnings Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion, pleasecontactthenearestInfineonTechnologiesOffice. TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 11 Rev.2.2,2016-10-20
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