IPB017N10N5ATMA1

IPB017N10N5 MOSFET OptiMOSª5Power-Transistor,100V D²-PAK7pin Features •Idealforhighfrequencyswitchingandsync.rec. •ExcellentgatechargexRDS(on)product(FOM) •Verylowon-resistanceRDS(on) •N-channel,normallevel •100%avalanchetested •Pb-freeplating;RoHScompliant •Halogen-freeaccordingtoIEC61249-2-21 tab 1 7 Productvalidation FullyqualifiedaccordingtoJEDECforIndustrialApplications Drain Pin 4, tab Table1KeyPerformanceParameters Parameter Value Unit VDS 100 V RDS(on),max 1.7 mΩ ID 273 A Qoss 213 nC QG(0V..10V) 168 nC Type/OrderingCode Package IPB017N10N5 PG-TO 263-7 Final Data Sheet Gate Pin 1 Source Pin 2,3,5,6,7 Marking 017N10N5 1 RelatedLinks - Rev.2.5,2019-11-13 OptiMOSª5Power-Transistor,100V IPB017N10N5 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.2.5,2019-11-13 OptiMOSª5Power-Transistor,100V IPB017N10N5 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current Values Unit Note/TestCondition 273 209 A TC=25°C TC=100°C - 1092 A TC=25°C - - 1166 mJ ID=100A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 375 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current1) ID,pulse - Avalanche energy, single pulse EAS Gate source voltage 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - 0.3 0.4 K/W - Thermal resistance, junction - ambient, RthJA minimal footprint - - 62 K/W - Thermal resistance, junction - ambient, RthJA 6 cm2 cooling area2) - - 40 K/W - Soldering temperature and reflow soldering is allowed - - 260 °C reflow MSL1 Tsold 1) see Diagram 3 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 2) Final Data Sheet 3 Rev.2.5,2019-11-13 OptiMOSª5Power-Transistor,100V IPB017N10N5 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 3 3.8 V VDS=VGS,ID=279µA - 0.1 10 5 100 µA VDS=100V,VGS=0V,Tj=25°C VDS=100V,VGS=0V,Tj=125°C IGSS - 1 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 1.5 1.7 1.7 2.2 mΩ VGS=10V,ID=100A VGS=6V,ID=50A Gate resistance1) RG - 1.3 2.0 Ω - Transconductance gfs 132 264 - S |VDS|>2|ID|RDS(on)max,ID=100A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 100 - Gate threshold voltage VGS(th) 2.2 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics1) Parameter Symbol Input capacitance Values Min. Typ. Max. Ciss - 12000 15600 pF VGS=0V,VDS=50V,f=1MHz Output capacitance Coss - 1810 2353 pF VGS=0V,VDS=50V,f=1MHz Reverse transfer capacitance Crss - 80 140 pF VGS=0V,VDS=50V,f=1MHz Turn-on delay time td(on) - 33 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.6Ω Rise time tr - 23 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.6Ω Turn-off delay time td(off) - 80 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.6Ω Fall time tf - 27 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.6Ω Unit Note/TestCondition Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Values Min. Typ. Max. Qgs - 53 - nC VDD=50V,ID=100A,VGS=0to10V Gate to drain charge1) Qgd - 34 51 nC VDD=50V,ID=100A,VGS=0to10V Switching charge Qsw - 51 - nC VDD=50V,ID=100A,VGS=0to10V Gate charge total Qg - 168 210 nC VDD=50V,ID=100A,VGS=0to10V Gate plateau voltage Vplateau - 4.4 - V VDD=50V,ID=100A,VGS=0to10V Qoss - 213 283 nC VDD=50V,VGS=0V 1) 1) Output charge 1) 2) Defined by design. Not subject to production test. See, gate charge waveforms, for parameter definition. Final Data Sheet 4 Rev.2.5,2019-11-13 OptiMOSª5Power-Transistor,100V IPB017N10N5 Table7Reversediode Parameter Symbol Diode continous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 241 A TC=25°C - 1092 A TC=25°C - 0.9 1.2 V VGS=0V,IF=100A,Tj=25°C trr - 88 176 ns VR=50V,IF=100A,diF/dt=100A/µs Qrr - 235 470 nC VR=50V,IF=100A,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.5,2019-11-13 OptiMOSª5Power-Transistor,100V IPB017N10N5 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 400 280 240 200 160 ID[A] Ptot[W] 300 200 120 80 100 40 0 0 50 100 150 0 200 0 25 50 75 TC[°C] 100 125 150 175 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 4 100 10 103 1 µs 10 µs 100 µs 0.5 ZthJC[K/W] ID[A] 102 10 ms 101 10-1 0.2 0.1 DC 1 ms 0.05 100 0.02 0.01 single pulse 10-1 10-1 100 101 102 103 10-2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.5,2019-11-13 OptiMOSª5Power-Transistor,100V IPB017N10N5 Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 700 4 10 V 6V 600 4.5 V 8V 3 500 5V ID[A] RDS(on)[mΩ] 400 300 5V 200 2 8V 10 V 1 100 0 6V 4.5 V 0 1 2 3 4 0 5 0 100 200 VDS[V] 300 400 500 600 700 ID[A] ID=f(VDS);Tj=25°C;parameter:VGS RDS(on)=f(ID);Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance 500 360 450 320 400 280 350 240 gfs[S] ID[A] 300 250 200 160 200 120 150 80 100 175 °C 50 0 0 2 25 °C 4 40 6 8 0 0 VGS[V] 80 120 160 ID[A] ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 40 gfs=f(ID);Tj=25°C 7 Rev.2.5,2019-11-13 OptiMOSª5Power-Transistor,100V IPB017N10N5 Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage 4 4.0 3.5 3 3.0 2790 µA 2.5 2 max VGS(th)[V] RDS(on)[mΩ] 279 µA typ 2.0 1.5 1 1.0 0.5 0 -60 -20 20 60 100 140 0.0 -60 180 -20 20 Tj[°C] 60 100 140 180 Tj[°C] RDS(on)=f(Tj);ID=100A;VGS=10V VGS(th)=f(Tj);VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 5 104 10 25 °C 25 °C, max 175 °C 175 °C, max Ciss 104 103 IF[A] C[pF] Coss 103 102 Crss 2 101 10 101 0 20 40 60 80 100 0.0 0.5 VDS[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 1.0 1.5 2.0 VSD[V] IF=f(VSD);parameter:Tj 8 Rev.2.5,2019-11-13 OptiMOSª5Power-Transistor,100V IPB017N10N5 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 3 10 10 8 50 V 102 6 VGS[V] IAS[A] 25 °C 100 °C 20 V 80 V 4 1 10 150 °C 2 100 100 101 102 103 tAV[µs] 0 0 50 100 150 200 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) VGS=f(Qgate);ID=100Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 110 VBR(DSS)[V] 105 100 95 -60 -20 20 60 100 140 180 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.5,2019-11-13 OptiMOSª5Power-Transistor,100V IPB017N10N5 5PackageOutlines Figure1OutlinePG-TO263-7,dimensionsinmm/inches Final Data Sheet 10 Rev.2.5,2019-11-13 OptiMOSª5Power-Transistor,100V IPB017N10N5 RevisionHistory IPB017N10N5 Revision:2019-11-13,Rev.2.5 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2014-12-17 Release of final version 2.1 2015-02-09 Reduce active area by 0.7% 2.2 2015-10-15 Update package outline 2.3 2016-09-23 Update Avalanche Energy 2.4 2019-03-05 Update product current 2.5 2019-11-13 Update SOA Diagram Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. 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TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 11 Rev.2.5,2019-11-13