IPB024N10N5ATMA1

IPB024N10N5 MOSFET OptiMOSª5Power-Transistor,100V D²-PAK7pin Features •Idealforhighfrequencyswitchingandsync.rec. •ExcellentgatechargexRDS(on)product(FOM) •Verylowon-resistanceRDS(on) •N-channel,normallevel •100%avalanchetested •Pb-freeplating;RoHScompliant •QualifiedaccordingtoJEDEC1)fortargetapplications •Halogen-freeaccordingtoIEC61249-2-21 tab 1 7 Table1KeyPerformanceParameters Parameter Value Unit VDS 100 V RDS(on),max 2.4 mΩ ID 221 A Qoss 142 nC QG(0V..10V) 111 nC Type/OrderingCode Package IPB024N10N5 PG-TO263-7 1) Drain Pin 4, tab Gate Pin 1 Source Pin 2,3,5,6,7 Marking 024N10N5 RelatedLinks - J-STD20 and JESD22 Final Data Sheet 1 Rev.2.2,2020-12-22 OptiMOSª5Power-Transistor,100V IPB024N10N5 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.2.2,2020-12-22 OptiMOSª5Power-Transistor,100V IPB024N10N5 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current1) Values Unit Note/TestCondition 221 169 A TC=25°C TC=100°C - 884 A TC=25°C - - 502 mJ ID=100A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 250 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current2) ID,pulse - Avalanche energy, single pulse EAS Gate source voltage 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - 0.4 0.6 K/W - Thermal resistance, junction - ambient, RthJA minimal footprint - - 62 K/W - Thermal resistance, junction - ambient, RthJA 6 cm2 cooling area3) - - 40 K/W - Soldering temperature and reflow soldering is allowed - - 260 °C reflow MSL1 Tsold 1) Rating refers to the product only with datasheet specified absolute maximum values, maintaining case temperature as specified. For other case temperatures please refer to Diagram 2. De-rating will be required based on the actual environmental conditions. 2) see Diagram 3 3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. Final Data Sheet 3 Rev.2.2,2020-12-22 OptiMOSª5Power-Transistor,100V IPB024N10N5 3Electricalcharacteristics atTj=25°C,unlessotherwisespecified Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 3.0 3.8 V VDS=VGS,ID=183µA - 0.1 10 5 100 µA VDS=100V,VGS=0V,Tj=25°C VDS=100V,VGS=0V,Tj=125°C IGSS - 1 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 2.0 2.4 2.4 3.2 mΩ VGS=10V,ID=90A VGS=6V,ID=45A Gate resistance1) RG - 1.2 1.8 Ω - Transconductance gfs 105 210 - S |VDS|>2|ID|RDS(on)max,ID=90A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 100 - Gate threshold voltage VGS(th) 2.2 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics1) Parameter Symbol Input capacitance Values Min. Typ. Max. Ciss - 7870 10200 pF VGS=0V,VDS=50V,f=1MHz Output capacitance Coss - 1200 1560 pF VGS=0V,VDS=50V,f=1MHz Reverse transfer capacitance Crss - 53 93 pF VGS=0V,VDS=50V,f=1MHz Turn-on delay time td(on) - 20 - ns VDD=50V,VGS=10V,ID=90A, RG,ext=1.6Ω Rise time tr - 12 - ns VDD=50V,VGS=10V,ID=90A, RG,ext=1.6Ω Turn-off delay time td(off) - 42 - ns VDD=50V,VGS=10V,ID=90A, RG,ext=1.6Ω Fall time tf - 13 - ns VDD=50V,VGS=10V,ID=90A, RG,ext=1.6Ω Unit Note/TestCondition Table6Gatechargecharacteristics2) Parameter Symbol Gate to source charge Values Min. Typ. Max. Qgs - 36 - nC VDD=50V,ID=90A,VGS=0to10V Gate to drain charge1) Qgd - 23 34 nC VDD=50V,ID=90A,VGS=0to10V Switching charge Qsw - 35 - nC VDD=50V,ID=90A,VGS=0to10V Gate charge total Qg - 111 138 nC VDD=50V,ID=90A,VGS=0to10V Gate plateau voltage Vplateau - 4.6 - V VDD=50V,ID=90A,VGS=0to10V Qoss - 142 188 nC VDD=50V,VGS=0V 1) 1) Output charge 1) 2) Defined by design. Not subject to production test. See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.2,2020-12-22 OptiMOSª5Power-Transistor,100V IPB024N10N5 Table7Reversediode Parameter Symbol Diode continous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 180 A TC=25°C - 884 A TC=25°C - 0.9 1.2 V VGS=0V,IF=90A,Tj=25°C trr - 65 130 ns VR=50V,IF=90,diF/dt=100A/µs Qrr - 123 246 nC VR=50V,IF=90,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test. Final Data Sheet 5 Rev.2.2,2020-12-22 OptiMOSª5Power-Transistor,100V IPB024N10N5 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 300 240 200 160 ID[A] Ptot[W] 200 100 120 80 40 0 0 50 100 150 0 200 0 25 50 75 TC[°C] 100 125 150 175 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 100 10 1 µs 10 µs 100 µs 102 0.5 ZthJC[K/W] ID[A] 1 ms 1 10 10 ms 0.2 10 -1 0.1 0.05 0.02 DC 100 0.01 single pulse 10-1 10-1 100 101 102 103 10-2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.2,2020-12-22 OptiMOSª5Power-Transistor,100V IPB024N10N5 Diagram5:Typ.outputcharacteristics Diagram6:Typ.drain-sourceonresistance 700 5 10 V 8V 600 4.5 V 6V 5V 4 500 400 RDS(on)[mΩ] 5.5 V ID[A] 5.5 V 300 6V 3 8V 2 10 V 5V 200 1 100 0 4.5 V 0 1 2 3 4 0 5 0 100 200 VDS[V] 300 400 500 600 700 ID[A] ID=f(VDS);Tj=25°C;parameter:VGS RDS(on)=f(ID);Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance 500 280 450 240 400 200 350 160 gfs[S] ID[A] 300 250 120 200 150 80 100 175 °C 0 0 2 40 25 °C 50 4 6 8 0 0 VGS[V] 80 120 160 ID[A] ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 40 gfs=f(ID);Tj=25°C 7 Rev.2.2,2020-12-22 OptiMOSª5Power-Transistor,100V IPB024N10N5 Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage 6 4.0 3.5 5 1830 µA 3.0 4 183 µA 3 VGS(th)[V] RDS(on)[mΩ] 2.5 max 2.0 1.5 2 typ 1.0 1 0.5 0 -60 -20 20 60 100 140 0.0 -60 180 -20 20 Tj[°C] 60 100 140 180 Tj[°C] RDS(on)=f(Tj);ID=90A;VGS=10V VGS(th)=f(Tj);VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 5 103 10 25 °C 25 °C, max 175 °C 175 °C, max Ciss 104 102 IF[A] C[pF] Coss 103 101 Crss 102 101 0 20 40 60 80 100 100 0.0 0.5 VDS[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 1.0 1.5 2.0 VSD[V] IF=f(VSD);parameter:Tj 8 Rev.2.2,2020-12-22 OptiMOSª5Power-Transistor,100V IPB024N10N5 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 3 10 10 8 50 V 102 6 VGS[V] IAS[A] 25 °C 100 °C 150 °C 20 V 80 V 4 1 10 2 100 100 101 102 103 tAV[µs] 0 0 20 40 60 80 100 120 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) VGS=f(Qgate);ID=90Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Diagram Gate charge waveforms 110 VBR(DSS)[V] 105 100 95 -60 -20 20 60 100 140 180 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.2,2020-12-22 OptiMOSª5Power-Transistor,100V IPB024N10N5 5PackageOutlines Figure1OutlinePG-TO263-7,dimensionsinmm/inches Final Data Sheet 10 Rev.2.2,2020-12-22 OptiMOSª5Power-Transistor,100V IPB024N10N5 RevisionHistory IPB024N10N5 Revision:2020-12-22,Rev.2.2 Previous Revision Revision Date Subjects (major changes since last revision) 2.0 2016-04-11 Release of final version 2.1 2016-10-03 Update Avalanche Energy 2.2 2020-12-22 Update current rating Trademarks Allreferencedproductorservicenamesandtrademarksarethepropertyoftheirrespectiveowners. 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TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 11 Rev.2.2,2020-12-22