IPB020N10N5ATMA1

IPB020N10N5 MOSFET OptiMOSª5Power-Transistor,100V D²PAK Features •N-channel,normallevel •OptimizedforFOMOSS •Verylowon-resistanceRDS(on) •175°Coperatingtemperature •Pb-freeleadplating;RoHScompliant •QualifiedaccordingtoJEDEC1)fortargetapplication •Idealforhigh-frequencyswitchingandsynchronousrectification Table1KeyPerformanceParameters Parameter Value Unit VDS 100 V RDS(on),max 2.0 mΩ ID 176 A Type/OrderingCode Package IPB020N10N5 PG-TO 263-3 1) Drain Pin 2, Tab Gate Pin 1 Source Pin 3 Marking 020N10N5 RelatedLinks - J-STD20 and JESD22 Final Data Sheet 1 Rev.2.3,2017-07-11 OptiMOSª5Power-Transistor,100V IPB020N10N5 TableofContents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Final Data Sheet 2 Rev.2.3,2017-07-11 OptiMOSª5Power-Transistor,100V IPB020N10N5 1Maximumratings atTA=25°C,unlessotherwisespecified Table2Maximumratings Parameter Symbol Continuous drain current Values Unit Note/TestCondition 176 135 A TC=25°C TC=100°C - 704 A TC=25°C - - 1166 mJ ID=50A,RGS=25Ω VGS -20 - 20 V - Power dissipation Ptot - - 375 W TC=25°C Operating and storage temperature Tj,Tstg -55 - 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 Unit Note/TestCondition Min. Typ. Max. ID - - Pulsed drain current1) ID,pulse - Avalanche energy, single pulse EAS Gate source voltage 2Thermalcharacteristics Table3Thermalcharacteristics Parameter Symbol Thermal resistance, junction - case Values Min. Typ. Max. RthJC - 0.3 0.4 K/W - Thermal resistance, junction - ambient, RthJA minimal footprint - - 62 K/W - Thermal resistance, junction - ambient, RthJA 6 cm2 cooling area2) - - 40 K/W - Soldering temperature, wave and reflow soldering are allowed - - 260 °C reflow MSL1 Tsold 1) see Diagram 3 Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 2) Final Data Sheet 3 Rev.2.3,2017-07-11 OptiMOSª5Power-Transistor,100V IPB020N10N5 3Electricalcharacteristics Table4Staticcharacteristics Parameter Symbol Drain-source breakdown voltage Values Unit Note/TestCondition - V VGS=0V,ID=1mA 3 3.8 V VDS=VGS,ID=270µA - 0.1 10 7 100 µA VDS=100V,VGS=0V,Tj=25°C VDS=100V,VGS=0V,Tj=125°C IGSS - 1 100 nA VGS=20V,VDS=0V Drain-source on-state resistance RDS(on) - 1.7 2.0 2.0 2.5 mΩ VGS=10V,ID=100A VGS=6V,ID=50A Gate resistance1) RG - 1.3 2 Ω - Transconductance gfs 124 248 - S |VDS|>2|ID|RDS(on)max,ID=100A Unit Note/TestCondition Min. Typ. Max. V(BR)DSS 100 - Gate threshold voltage VGS(th) 2.2 Zero gate voltage drain current IDSS Gate-source leakage current Table5Dynamiccharacteristics1) Parameter Symbol Input capacitance Values Min. Typ. Max. Ciss - 12000 15600 pF VGS=0V,VDS=50V,f=1MHz Output capacitance Coss - 1810 2353 pF VGS=0V,VDS=50V,f=1MHz Reverse transfer capacitance Crss - 80 140 pF VGS=0V,VDS=50V,f=1MHz Turn-on delay time td(on) - 33 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.6Ω Rise time tr - 26 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.6Ω Turn-off delay time td(off) - 77 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.6Ω Fall time tf - 29 - ns VDD=50V,VGS=10V,ID=100A, RG,ext=1.6Ω Unit Note/TestCondition Table6Gatechargecharacteristics2) Parameter Symbol Values Min. Typ. Max. Qgs - 54 - nC VDD=50V,ID=100A,VGS=0to10V Gate to drain charge Qgd - 34 51 nC VDD=50V,ID=100A,VGS=0to10V Switching charge Qsw - 52 - nC VDD=50V,ID=100A,VGS=0to10V Gate charge total Qg - 168 210 nC VDD=50V,ID=100A,VGS=0to10V Gate plateau voltage Vplateau - 4.5 - V VDD=50V,ID=100A,VGS=0to10V Output charge1) Qoss - 213 283 nC VDD=50V,VGS=0V Gate to source charge 1) 1) 1) 2) Defined by design. Not subject to production test See ″Gate charge waveforms″ for parameter definition Final Data Sheet 4 Rev.2.3,2017-07-11 OptiMOSª5Power-Transistor,100V IPB020N10N5 Table7Reversediode Parameter Symbol Diode continous forward current Diode pulse current Diode forward voltage 1) Reverse recovery time 1) Reverse recovery charge 1) Values Unit Note/TestCondition 155 A TC=25°C - 704 A TC=25°C - 0.9 1.2 V VGS=0V,IF=100A,Tj=25°C trr - 99 198 ns VR=50V,IF=IS,diF/dt=100A/µs Qrr - 287 574 nC VR=50V,IF=IS,diF/dt=100A/µs Min. Typ. Max. IS - - IS,pulse - VSD Defined by design. Not subject to production test Final Data Sheet 5 Rev.2.3,2017-07-11 OptiMOSª5Power-Transistor,100V IPB020N10N5 4Electricalcharacteristicsdiagrams Diagram1:Powerdissipation Diagram2:Draincurrent 400 200 175 300 150 ID[A] Ptot[W] 125 200 100 75 100 50 25 0 0 50 100 150 0 200 0 25 50 75 TC[°C] 100 125 150 175 200 TC[°C] Ptot=f(TC) ID=f(TC);VGS≥10V Diagram3:Safeoperatingarea Diagram4:Max.transientthermalimpedance 3 100 10 1 µs 10 µs 100 µs 102 ZthJC[K/W] 0.5 ID[A] 1 ms 10-1 0.2 0.1 101 0.05 10 ms 0.02 0.01 single pulse DC 100 10-1 100 101 102 103 10-2 10-5 10-4 VDS[V] 10-2 10-1 100 tp[s] ID=f(VDS);TC=25°C;D=0;parameter:tp Final Data Sheet 10-3 ZthJC=f(tp);parameter:D=tp/T 6 Rev.2.3,2017-07-11 OptiMOSª5Power-Transistor,100V IPB020N10N5 Diagram5:Typ.outputcharacteristics 400 10 V 8V Diagram6:Typ.drain-sourceonresistance 5 6V 4 4.5 V 300 RDS(on)[mΩ] ID[A] 5V 200 5V 3 6V 2 8V 10 V 100 4.5 V 0 0 1 2 1 3 4 0 5 0 50 100 VDS[V] 150 200 250 300 350 ID[A] ID=f(VDS);Tj=25°C;parameter:VGS RDS(on)=f(ID);Tj=25°C;parameter:VGS Diagram7:Typ.transfercharacteristics Diagram8:Typ.forwardtransconductance 480 200 440 175 400 360 150 320 125 gfs[S] ID[A] 280 240 100 200 75 160 120 50 80 175 °C 40 0 0 2 25 25 °C 4 6 8 0 0 10 20 VGS[V] ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj Final Data Sheet 30 40 50 60 ID[A] gfs=f(ID),VDS=5V,Tj=25°C 7 Rev.2.3,2017-07-11 OptiMOSª5Power-Transistor,100V IPB020N10N5 Diagram9:Drain-sourceon-stateresistance Diagram10:Typ.gatethresholdvoltage 4.5 4.0 4.0 3.5 3.5 3.0 270 µA 3.0 27 µA 2.5 VGS(th)[V] RDS(on)[mΩ] 2.5 max 2.0 typ 2.0 1.5 1.5 1.0 1.0 0.5 0.5 0.0 -60 -20 20 60 100 140 0.0 -60 180 -20 20 Tj[°C] 60 100 140 180 Tj[°C] RDS(on)=f(Tj);ID=100A;VGS=10V VGS(th)=f(Tj);VGS=VDS;parameter:ID Diagram11:Typ.capacitances Diagram12:Forwardcharacteristicsofreversediode 5 103 10 25 °C 175 °C 25 °C max 175 °C max Ciss 104 Coss IF[A] C[pF] 102 3 10 101 Crss 102 101 0 20 40 60 80 100 0.0 0.5 VDS[V] C=f(VDS);VGS=0V;f=1MHz Final Data Sheet 1.0 1.5 2.0 VSD[V] IF=f(VSD);parameter:Tj 8 Rev.2.3,2017-07-11 OptiMOSª5Power-Transistor,100V IPB020N10N5 Diagram13:Avalanchecharacteristics Diagram14:Typ.gatecharge 3 10 10 80 V 8 50 V 102 20 V VGS[V] IAS[A] 6 25 °C 100 °C 150 °C 4 1 10 2 100 100 101 102 103 0 0 tAV[µs] 50 100 150 200 Qgate[nC] IAS=f(tAV);RGS=25Ω;parameter:Tj(start) VGS=f(Qgate);ID=100Apulsed;parameter:VDD Diagram15:Drain-sourcebreakdownvoltage Gate charge waveforms 110 VBR(DSS)[V] 105 100 95 90 -60 -20 20 60 100 140 180 Tj[°C] VBR(DSS)=f(Tj);ID=1mA Final Data Sheet 9 Rev.2.3,2017-07-11 OptiMOSª5Power-Transistor,100V IPB020N10N5 5PackageOutlines Figure1OutlinePG-TO263-3,dimensionsinmm/inches Final Data Sheet 10 Rev.2.3,2017-07-11 OptiMOSª5Power-Transistor,100V IPB020N10N5 RevisionHistory IPB020N10N5 Revision:2017-07-11,Rev.2.3 Previous Revision Revision Date Subjects (major changes since last revision) 2.1 2014-05-05 Release of Final Version 2.2 2016-09-07 Update Avalanche Energy 2.3 2017-07-11 Update product current TrademarksofInfineonTechnologiesAG AURIX™,C166™,CanPAK™,CIPOS™,CoolGaN™,CoolMOS™,CoolSET™,CoolSiC™,CORECONTROL™,CROSSAVE™,DAVE™,DI-POL™,DrBlade™, EasyPIM™,EconoBRIDGE™,EconoDUAL™,EconoPACK™,EconoPIM™,EiceDRIVER™,eupec™,FCOS™,HITFET™,HybridPACK™,Infineon™, ISOFACE™,IsoPACK™,i-Wafer™,MIPAQ™,ModSTACK™,my-d™,NovalithIC™,OmniTune™,OPTIGA™,OptiMOS™,ORIGA™,POWERCODE™, PRIMARION™,PrimePACK™,PrimeSTACK™,PROFET™,PRO-SIL™,RASIC™,REAL3™,ReverSave™,SatRIC™,SIEGET™,SIPMOS™,SmartLEWIS™, SOLIDFLASH™,SPOC™,TEMPFET™,thinQ™,TRENCHSTOP™,TriCore™. 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TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered. Final Data Sheet 11 Rev.2.3,2017-07-11