TLD2311ELXUMA1

LITIX™ Basic TLD2311EL 3 Channel High-Side Current Source 1 Package PG-SSOP-14 Marking TLD2311 Overview Applications • Exterior LED lighting applications such as tail/brake light, turn indicator, position light, side marker,... • Interior LED lighting applications such as ambient lighting (e.g. RGB), interior illumination and dash board lighting. EN Internal supply Thermal protection 4.7nF** 4.7nF** 4.7nF** ISO-Pulse protection circuit depending on requirements VS CVS =4.7nF GND 10kΩ Cmod =2.2µF VBATT OUT3 Output control OUT2 IN_SET3 IN_SET2 IN_SET1 Current adjustment OUT1 * In case PWM via VS is performed ** For EMI improvement if required GND CST =100pF** ST TLD2311EL 470kΩ* RSET1 RSET2 RSET3 Status to other LITIX™ Basic Application Diagram with TLD2311EL Data Sheet www.infineon.com Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Overview Basic Features • 3 Channel device with integrated output stages (current sources), optimized to drive LEDs with output current up to 120 mA per channel • Low current consumption in sleep mode • PWM-operation supported via VS- and EN-pin • Output current adjustable via external low power resistor and possibility to connect PTC resistor for LED protection during over temperature conditions • Reverse polarity protection and overload protection • Undervoltage detection • Open load and short circuit to GND diagnosis • Wide temperature range: -40°C < Tj < 150°C • PG-SSOP-14 package with exposed heatslug Description The LITIX™ Basic TLD2311EL is a three channel high side driver IC with integrated output stages. It is designed to control LEDs with a current up to 120 mA. In typical automotive applications the device is capable to drive i.e. 3 red LEDs per chain (total 9 LEDs) with a current up to 60 mA, which is limited by thermal cooling aspects. The output current is controlled practically independent of load and supply voltage changes. Table 1 Product Summary Parameter Symbol Value Operating voltage range VS(nom) 5.5 V ... 40 V Maximum voltage VS(max) VOUTx(max) 40 V Nominal output (load) current IOUTx(nom) 60 mA when using a supply voltage range of 8 V - 18 V (e.g. Automotive car battery). Currents up to IOUT(max) possible in applications with low thermal resistance RthJA Maximum output (load) current IOUTx(max) 120 mA; depending on thermal resistance RthJA Output current accuracy at RSETx = 12 kΩ kLT 750 ± 7% Current consumption in sleep mode IS(sleep,typ) 0.1 µA Protective Functions • ESD protection • Under voltage lock out • Over Load protection • Over Temperature protection • Reverse Polarity protection Diagnostic Functions • OL detection • SC to Vs (indicated by OL diagnosis) • SC to GND detection Data Sheet 2 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Block Diagram Block Diagram VS 2 EN Internal supply Thermal protection OUT3 Output control OUT2 IN_SET3 IN_SET2 IN_SET1 Current adjustment OUT1 Figure 1 Data Sheet GND TLD2311EL ST Status Basic Block Diagram 3 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Pin Configuration 3 Pin Configuration 3.1 Pin Assignment Figure 2 Data Sheet VS 1 VS 2 EN 3 NC 4 IN_SET3 14 NC 13 OUT3 12 OUT2 11 OUT1 5 10 ST IN_SET2 6 9 GND IN_SET1 7 8 NC TLD2311EL EP Pin Configuration 4 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Pin Configuration 3.2 Pin Definitions and Functions Pin Symbol Input/ Output Function 1, 2 VS – Supply Voltage; battery supply, connect a decoupling capacitor (100 nF - 1 µF) to GND 3 EN I Enable pin 4 NC – Pin not connected 5 IN_SET3 I/O Input / SET pin 3; Connect a low power resistor to adjust the output current 6 IN_SET2 I/O Input / SET pin 2; Connect a low power resistor to adjust the output current 7 IN_SET1 I/O Input / SET pin 1; Connect a low power resistor to adjust the output current 8 NC – Pin not connected – 1) 9 GND Ground 10 ST I/O Status pin 11 OUT1 O Output 1 12 OUT2 O Output 2 13 OUT3 O Output 3 14 NC – Pin not connected – 1) Exposed Pad GND Exposed Pad; connect to GND in application 1) Connect all GND-pins together. Data Sheet 5 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Absolute Maximum Ratings 1) Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Max. Unit Conditions Voltages 4.1.1 Supply voltage VS -16 40 V – 4.1.2 Input voltage EN VEN -16 40 V – 4.1.3 Input voltage EN related to VS VEN(VS) VS - 40 VS + 16 V – 4.1.4 Input voltage EN related to VOUTx VEN - VOUTx VEN VOUTx -16 40 V – 4.1.5 Output voltage VOUTx -1 40 V – 4.1.6 Power stage voltage VPS = VS - VOUTx VPS -16 40 V – 4.1.7 IN_SETx voltage VIN_SETx -0.3 6 V – 4.1.8 Status voltage VST -0.3 6 V – 4.1.9 IN_SETx current IIN_SETx – – 2 3 mA – Diagnosis output 4.1.10 Output current IOUTx – 130 mA – Currents Temperatures 4.1.11 Junction temperature Tj -40 150 °C – 4.1.12 Storage temperature Tstg -55 150 °C – ESD Susceptibility 4.1.13 ESD resistivity to GND VESD -2 2 kV Human Body Model (100 pF via 1.5 kΩ)2) 4.1.14 ESD resistivity all pins to GND VESD -500 500 V CDM3) 4.1.15 ESD resistivity corner pins to GND VESD -750 750 V CDM3) 1) Not subject to production test, specified by design 2) ESD susceptibility, Human Body Model “HBM” according to ANSI/ESDA/JEDEC JS-001-2011 3) ESD susceptibility, Charged Device Model “CDM” according to JESD22-C101E Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet 6 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL General Product Characteristics Functional Range 4.2 Pos. Parameter Symbol Limit Values Min. Max. Unit Conditions 4.2.16 Supply voltage range for normal operation VS(nom) 5.5 40 V – 4.2.17 Power on reset threshold VS(POR) – 5 V VEN = VS RSETx = 12 kΩ IOUTx = 80% IOUTx(nom) VOUTx = 2.5 V 4.2.18 Junction temperature Tj -40 150 °C – Note: Within the functional range the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the related electrical characteristics table. Thermal Resistance 4.3 Pos. Parameter Symbol 4.3.1 Junction to Case RthJC 4.3.2 Junction to Ambient 1s0p board RthJA1 4.3.3 1) 2) 3) 4) Junction to Ambient 2s2p board Limit Values Min. Typ. Max. – 8 10 – – RthJA2 61 56 Unit Conditions K/W 1) 2) K/W 1) 3) – – Ta = 85 °C Ta = 135 °C K/W 1) 4) – 45 – Ta = 85 °C – 43 – Ta = 135 °C Not subject to production test, specified by design. Based on simulation results. Specified RthJC value is simulated at natural convection on a cold plate setup (all pins and the exposed Pad are fixed to ambient temperature). Ta = 85°C, Total power dissipation 1.5 W. The RthJA values are according to Jedec JESD51-3 at natural convection on 1s0p FR4 board. The product (chip + package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 70 µm Cu, 300 mm2 cooling area. Total power dissipation 1.5 W distributed statically and homogenously over all power stages. The RthJA values are according to Jedec JESD51-5,-7 at natural convection on 2s2p FR4 board. The product (chip + package) was simulated on a 76.2 x 114.3 x 1.5 mm3 board with 2 inner copper layers (outside 2 x 70 µm Cu, inner 2 x 35 µm Cu). Where applicable, a thermal via array under the exposed pad contacted the first inner copper layer. Total power dissipation 1.5 W distributed statically and homogenously over all power stages. Data Sheet 7 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL EN Pin 5 EN Pin The EN pin is a dual function pin: Internal Supply Output Control EN V EN Figure 3 Block Diagram EN pin Note: The current consumption at the EN-pin IEN needs to be added to the total device current consumption. The total current consumption is the sum of the currents at the VS-pin IS and the EN-pin IEN. 5.1 EN Function If the voltage at the pin EN is below a threshold of VEN(off) the LITIX™ Basic IC will enter Sleep mode. In this state all internal functions are switched off, the current consumption is reduced to IS(sleep). A voltage above VEN(on) at this pin enables the device after the Power on reset time tPOR. VS V EN IOU T t t tPOR 100% 80% t Figure 4 Data Sheet Power on reset 8 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL EN Pin 5.2 Internal Supply Pin The EN pin can be used to supply the internal logic. There are two typical application conditions, where this feature can be used: 1) In “DC/DC control Buck” configurations, where the voltage Vs can be below 5.5V. 2) In configurations, where a PWM signal is applied at the Vbatt pin of a light module. The buffer capacitor CBUF is used to supply the LITIX™ Basic IC during Vbatt low (Vs low) periods. This feature can be used to minimize the turn-on time to the values specified in Pos. 9.2.13. Otherwise, the power-on reset delay time tPOR (Pos. 5.4.8) has to be considered. The capacitor can be calculated using the following formula: I EN  LS  C BUF = tLOW  max   -------------------------------------------------V S – V D1 – V S  POR  (1) See also a typical application drawing in Chapter 10. VBATT VS D1 GND CBUF EN Internal supply OUT3 Thermal protection Output control OUT2 IN_SET3 Figure 5 Data Sheet R SET1 R SET2 R SET3 IN_SET1 Current adjustment OUT1 GND IN_SET2 LITIX™ Basic External circuit when applying a fast PWM signal on VBATT 9 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL EN Pin V EN t V BATT IOU T t tON (VS) 100% 80% Switch off behavior depends on V BATT and load characteristics 20% t Figure 6 Typical waveforms when applying a fast PWM signal on VBATT The parameter tON(VS) is defined at Pos. 9.2.13. The parameter tOFF(VS) depends on the load and supply voltage VBATT characteristics. 5.3 EN Unused In case of an unused EN pin, there are two different ways to connect it: 5.3.1 EN - Pull Up to VS The EN pin can be connected with a pull up resistor (e.g. 10 kΩ) to Vs potential. In this configuration the LITIX™ Basic IC is always enabled. 5.3.2 EN - Direct Connection to VS The EN pin can be connected directly to the VS pin (IC always enabled). This configuration has the advantage (compared to the configuration described in Chapter 5.3.1) that no additional external component is required. Data Sheet 10 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL EN Pin 5.4 Electrical Characteristics Internal Supply / EN Pin Electrical Characteristics Internal Supply / EN pin Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSETx = 12 kΩ all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol 5.4.1 Current consumption, sleep mode IS(sleep) 5.4.2 Current consumption, active mode IS(on) Limit Values Min. Typ. Max. – 0.1 2 – – – 5.4.3 Current consumption, device disabled via ST – – – 5.4.4 Current consumption, device disabled via IN_SETx – – – 5.4.5 – – – Data Sheet – – – 11 1) VEN = 0.5 V Tj < 85 °C VS = 18 V VOUTx = 3.6 V mA 2) IIN_SET = 0 µA Tj < 105 °C VS = 18 V VOUTx = 3.6V VEN = 5.5 V VEN = 18 V 1) REN = 10 kΩ between VS and EN-pin mA 2) VS = 18 V Tj < 105 °C VST = 5 V VEN = 5.5 V VEN = 18 V 1) REN = 10 kΩ between VS and EN-pin mA 2) VS = 18 V Tj < 105 °C VIN_SETx = 5 V VEN = 5.5 V VEN = 18 V 1) REN = 10 kΩ between VS and EN-pin mA 2) 1.4 0.7 1.4 Current consumption, IS(fault,STu) active mode in single fault detection condition with ST-pin unconnected – – – µA 1.4 0.65 1.4 IS(dis,IN_SET) – – – Conditions 1.4 0.75 1.5 IS(dis,ST) – – – Unit 1.7 1.1 1.8 VS = 18 V Tj < 105 °C RSETx = 12 kΩ VOUTx = 18 V or 0 V VEN = 5.5 V VEN = 18 V 1) REN = 10 kΩ between VS and EN-pin Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL EN Pin Electrical Characteristics Internal Supply / EN pin (cont’d) Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSETx = 12 kΩ all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. 5.4.6 Current consumption, active mode in double fault detection condition, one output disabled via IN_SETx and with ST-pin connected to GND – – – Conditions mA 2) VS = 18 V Tj < 105 °C RSET1 = 12 kΩ RSET2,3 = unconnected VOUTx = 18 V or 0 V VST = 0 V VEN = 5.5 V VEN = 18 V 1) REN = 10 kΩ between VS and EN-pin mA 2) VS = 18 V Tj < 105 °C RSET1,2 = 12 kΩ RSET3 = unconnected VOUTx = 18 V or 0 V VST = 0 V VEN = 5.5 V VEN = 18 V 1) REN = 10 kΩ between VS and EN-pin 1) Max. Current consumption, IS(fault,STG) active mode in single fault detection condition with ST-pin connected to GND – – – 5.4.7 Typ. Unit 6.0 4.9 5.9 IS(dfault,STG) – – – – – – 9.0 8.4 9.0 Power-on reset delay time tPOR – – 25 µs VS = VEN = 0 →13.5 V VOUTx(nom) = 3.6 ± 0.3V IOUTx = 80% IOUTx(nom) 5.4.9 Required supply voltage for output activation VS(on) – – 4 V VEN = 5.5 V VOUTx = 3 V IOUTx = 50% IOUTx(nom) 5.4.10 Required supply voltage for current control VS(CC) – – 5.2 V VEN = 5.5 V VOUTx = 3.6 V IOUTx ≥ 90% IOUTx(nom) 5.4.11 EN turn on threshold VEN(on) – – 2.5 V – 5.4.12 EN turn off threshold VEN(off) 0.8 – – V – mA 1) VS = 4.5 V Tj < 105 °C VEN = 5.5 V mA Tj < 105 °C VS = 13.5 V, VEN = 5.5 V VS = 18 V, VEN = 5.5 V VS = VEN = 18 V 1) VS = 18 V, REN = 10 kΩ between VS and EN-pin 5.4.8 3) 5.4.13 EN input current during low supply voltage IEN(LS) 5.4.14 EN high input current IEN(H) – – 2.4 – – – – – – – – 0.1 0.1 2.05 0.45 1) Not subject to production test, specified by design Data Sheet 12 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL EN Pin 2) The total device current consumption is the sum of the currents IS and IEN(H), please refer to Pos. 5.4.14 3) See also Figure 4 Data Sheet 13 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL IN_SETx Pin 6 IN_SETx Pin The IN_SET pin is a multiple function pin for output current definition, input and diagnostics: Logic IN_SET high impedance IIN_SET VIN_SET VIN_SET(OL/SC) GND Figure 7 Block Diagram IN_SET pin 6.1 Output Current Adjustment via RSET The output current of each channel can be adjusted independently. The current adjustment can be done by placing a low power resistor (RSET) at the IN_SETx pin to ground. The dimensioning of the resistor can be done using the formula below: kR SET = ---------I OUT (2) The gain factor k (RSET * output current) is specified in Pos. 9.2.4 and Pos. 9.2.5. The current through the RSET is defined by the resistor itself and the reference voltage VIN_SET(ref), which is applied to the IN_SET during supplied device. 6.2 Smart Input Pin The IN_SETx pin can be connected via RSET to the open-drain output of a µC or to an external NMOS transistor as described in Figure 8. This signal can be used to turn off the output stages of the IC. A minimum IN_SET current of IIN_SET(act) is required to turn on the output stages. This feature is implemented to prevent glimming of LEDs caused by leakage currents on the IN_SET pin, see Figure 11 for details. In addition, the IN_SET pin offers the diagnostic feedback information, if the status pin is connected to GND. Another diagnostic possibility is shown in Figure 9, where the diagnosis information is provided via the ST pin (refer to Chapter 7 and Chapter 8) to a micro controller. In case of a fault event with the ST pin connected to GND the IN_SET voltage is increased to VIN_SET(OL/SC) Pos. 8.4.2. Therefore, the device has two voltage domains at the IN_SETpin, which is shown in Figure 12. Note: If one output has a present fault (open load or short circuit) and one or both of the other channels are dimmed via PWM at the IN_SET-pins a short spike to VIN_SET(OL/SC) is possible. Please refer to Chapter 8.3. Data Sheet 14 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL IN_SETx Pin Microcontroller (e.g. XC866) OUT RSET/2 RSET/2 IN_SET Current adjust Status Basic LED Driver ST GND IN VDDP = 5 V Figure 8 Schematics IN_SET interface to µC, diagnosis via IN_SET pin Microcontroller (e.g. XC866) OUT RSET IN_SET Current adjust Status Basic LED Driver ST GND IN VDDP = 5 V Figure 9 optional Schematics IN_SET interface to µC, diagnosis via ST pin The resulting switching times are shown in Figure 10: IIN_ SET IOU T tON (IN_ SET ) tOFF(IN _ SET) t 100% 80% 20% t Figure 10 Data Sheet Switching times via IN_SET 15 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL IN_SETx Pin IOUT [mA] k = IOUTx * VIN_SET(ref) / IIN_SETx IOUTx IIN_SET(ACT) Figure 11 IIN_SETx IIN_SET [µA] IOUT versus IINSET V IN_ SET VIN _SET( OL /SC)m ax Diagnostic voltage range V IN_ SET(OL /SC) m in VIN _SET (ref ) m ax Normal operation and high temperature current reduction range Figure 12 Data Sheet Voltage domains for IN_SET pin, if ST pin is connected to GND 16 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL ST Pin 7 ST Pin The ST pin is a multiple function pin. IST(OL/SC) VST(OL/SC) No fault Fault Output Control ST No fault Fault VST IST(PD) Figure 13 Block Diagram ST pin 7.1 Diagnosis Selector If the status pin is unconnected or connected to GND via a high ohmic resistor (VST to be below VST(L)), the ST pin acts as diagnosis output pin. In normal operation (device is activated) the ST pin is pulled to GND via the internal pull down current IST(PD). In case of an open load or short circuit to GND condition the ST pin is switched to VST(OL/SC) after the open load or short circuit detection filter time (Pos. 8.4.9, Pos. 8.4.12). If the device is operated in PWM operation via the VS and/or EN pins the ST pin should be connected to GND via a high ohmic resistor (e.g. 470 kΩ) to ensure proper device behavior during fast rising VS and/or EN slopes. If the ST pin is shorted to GND the diagnostic feedback is performed via the IN_SET-pin, which is shown in Chapter 6.2 and Chapter 8. 7.2 Diagnosis Output If the status pin is unconnected or connected to GND via a high ohmic resistor (VST to be below VST(L)), it acts as a diagnostic output. In case of a fault condition the ST pin rises its voltage to VST(OL/SC) (Pos. 8.4.7). Details are shown in Chapter 8. 7.3 Disable Input If an external voltage higher than VST(H) (Pos. 8.4.5) is applied to the ST pin, the device is switched off. This function is used for applications, where multiple drivers should be used for one light function. It is possible to combine the drivers’ fault diagnosis via the ST pins. If a single LED chain fails, the entire light function is switched off. In this scenario e.g. the diagnostic circuit on the body control module can easily distinguish between the two cases (normal load or load fault), because nearly no current is flowing into the LED module during the fault scenario - the drivers consume a current of IS(fault,STu) (Pos. 5.4.5) or IS(dis,ST) (Pos. 5.4.3). As soon as one LED chain fails, the ST-pin of this device is switched to VST(OL/SC). The other devices used for the same light function can be connected together via the ST pins. This leads to a switch off of all devices connected together. Data Sheet 17 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL ST Pin V ST IOU T tON (ST) tOFF( ST) t 100% 80% 20% t Figure 14 Data Sheet Switching times via ST Pin 18 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Load Diagnosis 8 Load Diagnosis 8.1 Open Load An open load diagnosis feature is integrated in the TLD2311EL driver IC. If there is an open load on one of the outputs, the respective output is turned off. The potential on the IN_SET pin rises up to VIN_SET(OL/SC), if the ST is connected to GND. This high voltage can be used as input signal for an µC as shown in Figure 9. If the ST pin is open or connected to GND via a high ohmic resistor, the ST pin rises to a high potential as described in Chapter 7. More details are shown in Figure 18. The open load status is not latched, as soon as the open load condition is no longer present, the output stage will be turned on again. An open load condition is detected, if the voltage drop over the output stage VPS is below the threshold according Pos. 8.4.10 and a filter time of tOL is passed. V IN_ SET VIN _SET( OL /SC) VIN_ SET( ref ) tOL tIN _SET (re se t) VOU T t VS V S – VPS(OL ) VF open load occurs open load disappears t Figure 15 Data Sheet IN_SET behavior during open load condition with ST pin connected to GND 19 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Load Diagnosis VIN _SET VIN _SET( ref ) t VST V ST( OL /SC) tOL tIN_ SET(re se t) VOU T t VS VS – VPS( OL) VF open load occurs open load disappears t Figure 16 IN_SET and ST behavior during open load condition (ST unconnected) 8.2 Short Circuit to GND detection The TLD2311EL has an integrated SC to GND detection. If the output stage is turned on and the voltage at the output falls below VOUT(SC) the potential on the IN_SET pin is increased up to VIN_SET(OL/SC) after tSC, if the ST pin is connected to GND. If the ST is open or connected to GND via a high ohmic resistor the fault is indicated on the ST pin according to Chapter 7 after tSC. More details are shown in Figure 18. This condition is not latched. For detecting a normal condition after a short circuit detection an output current according to IOUT(SC) is driven by the channel. Data Sheet 20 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Load Diagnosis VIN _SET VIN _SET( OL /SC) VIN _SET (ref ) VOU T tSC t tIN_ SET( re se t) VF VOUT (SC) t short circuit occurs Figure 17 short circuit disappears IN_SET behavior during short circuit to GND condition with ST connected to GND and VDEN > VDEN(act) V IN_ SET V IN_ SET(ref ) t V ST VST (OL /SC) V OU T tSC tIN _SET (re se t) t VF V OUT (SC) t short circuit occurs short circuit disappears Figure 18 IN_SET and ST behavior during short circuit to GND condition (ST unconnected) Data Sheet 21 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Load Diagnosis 8.3 Double Fault Conditions The TLD2311EL allows the diagnosis of each channel separately, as long as the ST-pin is shorted to GND. The diagnosis filter times tOL and tSC (Pos. 8.4.9 and Pos. 8.4.12) are valid only for the channel, which diagnoses first the fault condition. For the other channel or channels with a subsequential fault the diagnosis is reported immediately without the diagnosis filter time, if the filter time tOL has been elapsed for the channel with the first fault. During activation via IN_SET of a non-faulty output, where one channel has already a fault detected, a short spike to VIN_SET(OL/SC) could occur on the channel, which should be activated. Therefore, in general a diagnosis should be done earliest after the diagnosis filter times tOL and tSC to avoid any incorrect diagnosis readout. In the scenario mentioned above the turn on time tON(IN_SET) could be extended. The following figure shows the example behavior, if OUT1 has a fault and OUT2 is operated in PWM-mode. OUT3 is disabled. Data Sheet 22 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Load Diagnosis IIN_ SET1 V IN_SET (OL /SC) / RSET 1 V IN_SET (ref ) / RSET 1 t VIN _SET 1 VIN _SET (OL /SC) VIN _SET( ref ) tOL t VOU T1 VS VS – VPS(OL ) VF open load occurs t IIN_ SET2 VIN _SET( OL /SC) / RSET2 VIN _SET( ref ) / RSET2 t VIN _ SET2 turn on command VIN _SET (OL /SC) VIN _SET( ref ) t VOU T2 VF VOUT ( SC) t Figure 19 Data Sheet Example single channel fault on OUT1 and PWM-operation on OUT2 with ST pin connected to GND 23 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Load Diagnosis 8.4 Electrical Characteristics IN_SET Pin and Load Diagnosis Electrical Characteristics IN_SET pin and Load Diagnosis Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSETx = 12 kΩ, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Unit Conditions 1) Min. Typ. Max. 1.19 1.23 1.27 V VOUTx = 3.6 V Tj = 25...115 °C 1) 8.4.1 IN_SET reference voltage 8.4.2 IN_SET open load/short VIN_SET(OL/SC) 4 circuit voltage – 5.5 V VS > 8 V Tj = 25...150 °C VS = VOUTx (OL) or VOUTx = 0 V (SC) 8.4.3 IN_SET open load/short IIN_SET(OL/SC) circuit current 0.5 – 2.5 mA 1) VS > 8 V Tj = 25...150 °C VIN_SET = 4 V VS = VOUTx (OL) or VOUTx = 0 V (SC) 8.4.4 VST(L) ST device turn on threshold (active low) in case of voltage applied from external (ST-pin acting as input) 0.8 – – V – 8.4.5 ST device turn off VST(H) threshold (active low) in case of voltage applied from external (ST-pin acting as input) – – 2.5 V – 8.4.6 ST pull down current IST(PD) – – 15 µA VEN = 5.5 V VST = 0.8 V 8.4.7 ST open load/short circuit voltage (ST-pin acting as diagnosis output) VST(OL/SC) 4 – 5.5 V 1) VS > 8 V Tj = 25...150 °C RST = 470 kΩ VS = VOUTx (OL) or VOUTx = 0 V (SC) 8.4.8 ST open load/short circuit current (ST-pin acting as diagnosis output) IST(OL/SC) 100 – 220 µA 1) VS > 8 V Tj = 25...150 °C VST = 2.5 V VS = VOUTx (OL) or VOUTx = 0 V (SC) 8.4.9 OL detection filter time tOL 10 22 35 µs 1) 8.4.10 OL detection voltage VPS(OL) = VS - VOUTx VPS(OL) 0.2 – 0.4 V VS > 8 V 8.4.11 Short circuit to GND detection threshold VOUT(SC) 0.8 – 1.4 V VS > 8 V Data Sheet VIN_SET(ref) Limit Values 24 VS > 8 V Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Load Diagnosis Electrical Characteristics IN_SET pin and Load Diagnosis (cont’d) Unless otherwise specified: VS = 5.5 V to 40 V, Tj = -40°C to +150°C, RSETx = 12 kΩ, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. 8.4.12 Parameter SC detection filter time Symbol tSC Limit Values Min. Typ. Max. 10 22 35 Conditions µs 1) VS > 8 V VS > 8 V – 5 20 µs 1) SC detection current in IOUT(SC,STu) case of unconnected STpin 100 200 300 µA VS > 8 V VOUTx = 0 V SC detection current in case of ST-pin shorted to GND 0.1 2 4.75 mA VS > 8 V VOUTx = 0 V VST = 0 V – 15 µA See Figure 11 8.4.13 IN_SET diagnosis reset time 8.4.14 8.4.15 tIN_SET(reset) IOUT(SC,STG) 8.4.16 IN_SET activation IIN_SET(act) 2 current without turn on of output stages 1) Not subject to production test, specified by design Data Sheet Unit 25 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Power Stage 9 Power Stage The output stages are realized as high side current sources with a current of 120 mA. During off state the leakage current at the output stage is minimized in order to prevent a slightly glowing LED. To increase the overall output current for high brightness LED applications it is possible to connect two or all three output stages in parallel. The maximum current of each channel is limited by the power dissipation and used PCB cooling areas (which results in the applications RthJA). For an operating current control loop the supply and output voltages according to the following parameters have to be considered: • • • Required supply voltage for current control VS(CC), Pos. 5.4.10 Voltage drop over output stage during current control VPS(CC), Pos. 9.2.6 Required output voltage for current control VOUTx(CC), Pos. 9.2.7 9.1 Protection The device provides embedded protective functions, which are designed to prevent IC destruction under fault conditions described in this data sheet. Fault conditions are considered as “outside” normal operating range. Protective functions are neither designed for continuous nor for repetitive operation. 9.1.1 Over Load Behavior An over load detection circuit is integrated in the LITIX™ Basic IC. It is realized by a temperature monitoring of the output stages (OUTx). As soon as the junction temperature exceeds the current reduction temperature threshold Tj(CRT) the output current will be reduced by the device by reducing the IN_SET reference voltage VIN_SET(ref). This feature avoids LED’s flickering during static output overload conditions. Furthermore, it protects LEDs against over temperature, which are mounted thermally close to the device. If the device temperature still increases, the three output currents decrease close to 0 A. As soon as the device cools down the output currents rise again. IOU T V IN_ SET Tj (C R T) Figure 20 Tj Output current reduction at high temperature Note: This high temperature output current reduction is realized by reducing the IN_SET reference voltage voltage (Pos. 8.4.1). In case of very high power loss applied to the device and very high junction temperature the output current may drop down to IOUTx = 0 mA, after a slight cooling down the current increases again. Data Sheet 26 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Power Stage 9.1.2 Reverse Battery Protection The TLD2311EL has an integrated reverse battery protection feature. This feature protects the driver IC itself, but also connected LEDs. The output reverse current is limited to IOUTx(rev) by the reverse battery protection. Note: Due to the reverse battery protection a reverse protection diode for the light module may be obsolete. In case of high ISO-pulse requirements and only minor protecting components like capacitors a reverse protection diode may be reasonable. The external protection circuit needs to be verified in the application. 9.2 Electrical Characteristics Power Stage Electrical Characteristics Power Stage Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40°C to +150°C, VOUTx = 3.6 V, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. 9.2.1 Output leakage current Typ. Unit Conditions µA VEN = 5.5 V IIN_SET = 0 µA VOUTx = 2.5 V Tj = 150 °C 1) Tj = 85 °C 1) Max. IOUTx(leak) – – – – 7 3 9.2.2 Output leakage current in boost over battery setup – IOUTx(leak,B2B) – 50 µA VEN = 5.5 V IIN_SET = 0 µA VOUTx = VS = 40 V 9.2.3 Reverse output current -IOUTx(rev) – 1 µA 1) 9.2.4 Output current accuracy kLT limited temperature range – 1) 697 645 9.2.5 Output current accuracy over temperature VS = -16 V Output load: LED with break down voltage < - 0.6 V 750 750 Tj = 25...115 °C VS = 8...18 V VPS = 2 V RSETx = 6...12 kΩ RSETx = 30 kΩ 803 855 1) Tj = -40...115 °C VS = 8...18 V VPS = 2 V RSETx = 6...12 kΩ RSETx = 30 kΩ kALL 697 645 750 750 803 855 9.2.6 Voltage drop over power stage during current control VPS(CC) = VS - VOUTx VPS(CC) 0.75 – – V 1) 9.2.7 Required output voltage for current control VOUTx(CC) 2.3 – – V 1) Data Sheet 27 VS = 13.5 V RSETx = 12 kΩ IOUTx ≥ 90% of (kLT(typ)/RSETx) VS = 13.5 V RSETx = 12 kΩ IOUTx ≥ 90% of (kLT(typ)/RSETx) Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Power Stage Electrical Characteristics Power Stage (cont’d) Unless otherwise specified: VS = 5.5 V to 18 V, Tj = -40°C to +150°C, VOUTx = 3.6 V, all voltages with respect to ground, positive current flowing into pin for input pins (I), positive currents flowing out of the I/O and output pins (O) (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Typ. Max. Unit Conditions 9.2.8 Maximum output current IOUT(max) 120 – – mA RSETx = 4.7 kΩ The maximum output current is limited by the thermal conditions. Please refer to Pos. 4.3.1 - Pos. 4.3.3 9.2.9 ST turn on time tON(ST) – – 15 µs 2) VS = 13.5 V RSETx = 12 kΩ ST → L IOUTx = 80% of (kLT(typ)/RSETx) 9.2.10 ST turn off time tOFF(ST) – – 10 µs 2) VS = 13.5 V RSETx = 12 kΩ ST →H IOUTx = 20% of (kLT(typ)/RSETx) 9.2.11 IN_SET turn on time tON(IN_SET) – – 15 µs VS = 13.5 V IIN_SET = 0 → 100 µA IOUTx = 80% of (kLT(typ)/RSETx) No OL or SC at other channels 9.2.12 IN_SET turn off time tOFF(IN_SET) – – 10 µs VS = 13.5 V IIN_SET = 100 → 0 µA IOUTx = 20% of (kLT(typ)/RSETx) 9.2.13 VS turn on time tON(VS) – – 20 µs 1) 3) VEN = 5.5 V RSETx = 12 kΩ VS = 0 → 13.5 V IOUTx = 80% of (kLT(typ)/RSETx) 9.2.14 Current reduction temperature threshold Tj(CRT) – 140 – °C 1) IOUTx = 95% of (kLT(typ)/RSETx) – A 1) 9.2.15 Output current during IOUT(CRT) 85% of – current reduction at high (kLT(typ) temperature /RSETx) 1) Not subject to production test, specified by design 2) see also Figure 14 3) see also Figure 6 Data Sheet 28 RSETx = 12 kΩ Tj = 150 °C Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Application Information 10 Application Information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. VBATT Cmo d =2.2µF CVS =4.7nF VS Microcontroller (e.g. XC866) ISO-Pulse protection circuit depending on requirements EN Internal supply Thermal protection Output control 4.7nF** 4.7nF** 4.7nF** OUT3 OUT2 RSET/2 OUT3* RSET/2 OUT1 IN_SET3 IN_SET2 Current adjust IN_SET1 IN3 OUT2* LITIX Basic LEDBasic Driver TM IN2 Status ST GND OUT1* IN1 * Open Drain Figure 21 ** For EMI improvement, if required. Application Diagram with Diagnosis for each channel Note: This is a very simplified example of an application circuit. In case of high ISO-pulse requirements a reverse protection diode may be used for LED protection. The function must be verified in the real application. 10.1 • Further Application Information For further information you may contact http://www.infineon.com/ Data Sheet 29 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Package Outlines 11 Package Outlines 0.19 +0.06 0.08 C 0.15 M C A-B D 14x 0.64 ±0.25 1 8 1 7 0.2 M D 8x Bottom View 3 ±0.2 A 14 6 ±0.2 D Exposed Diepad B 0.1 C A-B 2x 14 7 8 2.65 ±0.2 0.25 ±0.05 2) 0.1 C D 8˚ MAX. C 0.65 3.9 ±0.11) 1.7 MAX. Stand Off (1.45) 0 ... 0.1 0.35 x 45˚ 4.9 ±0.11) Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion Dimensions in mm PG-SSOP-14-1,-2,-3-PO V02 Figure 22 PG-SSOP-14 Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data Sheet 30 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Revision History 12 Revision History Revision Date Changes 1.0 2013-08-08 Inital revision of data sheet 1.1 2015-03-19 Updated parameters KLT and KALL in the chapter Power Stage 1.2 2018-04-26 Updated to latest template 1.2 2018-04-26 Updated application drawing 1.2 2018-04-26 Updated package marking 1.2 2018-04-26 Updated package figure Data Sheet 31 Rev. 1.2 2018-04-26 LITIX™ Basic TLD2311EL Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 3.1 3.2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 4.1 4.2 4.3 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5.1 5.2 5.3 5.3.1 5.3.2 5.4 EN Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 EN Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Internal Supply Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 EN Unused . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 EN - Pull Up to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 EN - Direct Connection to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Electrical Characteristics Internal Supply / EN Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 6.1 6.2 IN_SETx Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Output Current Adjustment via RSET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Smart Input Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 7 7.1 7.2 7.3 ST Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diagnosis Selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Diagnosis Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Disable Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 17 17 17 8 8.1 8.2 8.3 8.4 Load Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Open Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit to GND detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Double Fault Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics IN_SET Pin and Load Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 19 20 22 24 9 9.1 9.1.1 9.1.2 9.2 Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Over Load Behavior . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Reverse Battery Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Electrical Characteristics Power Stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 26 26 27 27 10 10.1 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 11 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 12 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6 6 7 7 Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Data Sheet 32 Rev. 1.2 2018-04-26 Trademarks All referenced product or service names and trademarks are the property of their respective owners. Edition 2018-04-26 Published by Infineon Technologies AG 81726 Munich, Germany © 2018 Infineon Technologies AG. All Rights Reserved. Do you have a question about any aspect of this document? Email: erratum@infineon.com Document reference TLD2311EL IMPORTANT NOTICE The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics ("Beschaffenheitsgarantie"). With respect to any examples, hints or any typical values stated herein and/or any information regarding the application of the product, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation warranties of non-infringement of intellectual property rights of any third party. In addition, any information given in this document is subject to customer's compliance with its obligations stated in this document and any applicable legal requirements, norms and standards concerning customer's products and any use of the product of Infineon Technologies in customer's applications. The data contained in this document is exclusively intended for technically trained staff. It is the responsibility of customer's technical departments to evaluate the suitability of the product for the intended application and the completeness of the product information given in this document with respect to such application. For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). WARNINGS Due to technical requirements products may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies office. Except as otherwise explicitly approved by Infineon Technologies in a written document signed by authorized representatives of Infineon Technologies, Infineon Technologies’ products may not be used in any applications where a failure of the product or any consequences of the use thereof can reasonably be expected to result in personal injury.