FDS6670A_03

FDS6670A June 2003 FDS6670A Single N-Channel, Logic Level, PowerTrench® MOSFET General Description This N-Channel Logic Level MOSFET is produced using Fairchild Semiconductor’s advanced PowerTrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. Features • 13 A, 30 V. RDS(ON) = 8 mΩ @ VGS = 10 V RDS(ON) = 10 mΩ @ VGS = 4.5 V • Fast switching speed • Low gate charge • High performance trench technology for extremely low RDS(ON) • High power and current handling capability D D D D SO-8 DD D D 5 6 7 4 3 2 1 Pin 1 SO-8 G SG S S SS S TA=25oC unless otherwise noted 8 Absolute Maximum Ratings Symbol VDSS VGSS ID PD TJ, TSTG Drain-Source Voltage Gate-Source Voltage Drain Current – Continuous – Pulsed Parameter Ratings 30 ±20 (Note 1a) Units V V A W °C 13 50 2.5 1.0 –55 to +150 Power Dissipation for Single Operation (Note 1a) (Note 1b) Operating and Storage Junction Temperature Range Thermal Characteristics RθJA RθJA RθJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1b) (Note 1) 50 125 25 °C/W Package Marking and Ordering Information Device Marking FDS6670A Device FDS6670A Reel Size 13’’ Tape width 12mm Quantity 2500 units ©2003 Fairchild Semiconductor Corporation FDS6670A Rev F (W) FDS6670A Electrical Characteristics Symbol BVDSS ∆BVDSS ∆TJ IDSS IGSS TA = 25°C unless otherwise noted Parameter Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate–Body Leakage (Note 2) Test Conditions VGS = 0 V, ID = 250 µA Min Typ 30 26 Max Units V mV/°C Off Characteristics ID = 250 µA, Referenced to 25°C VDS = 24 V, VGS = ±20 V, VGS = 0 V VDS = 0 V ID = 250 µA VDS = 24 V, VGS = 0 V, TJ=55°C 1 10 ±100 µA µA nA On Characteristics VGS(th) ∆VGS(th) ∆TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance On–State Drain Current Forward Transconductance VDS = VGS, 1 1.8 –5.3 6 7.2 8.5 3 V mV/°C ID = 250 µA, Referenced to 25°C VGS = 10 V, ID = 13 A VGS = 4.5 V, ID = 10.5 A VGS= 10 V, ID = 13 A, TJ=125°C VGS = 10 V, VDS = 15 V, VDS = 5 V ID = 13 A 50 8 10 14 mΩ ID(on) gFS A 55 S Dynamic Characteristics Ciss Coss Crss RG Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance (Note 2) VDS = 15 V, f = 1.0 MHz V GS = 0 V, 2220 535 200 1.7 pF pF pF Ω VGS = 15 mV, f = 1.0 MHz Switching Characteristics td(on) tr td(off) tf Qg Qgs Qgd Turn–On Delay Time Turn–On Rise Time Turn–Off Delay Time Turn–Off Fall Time Total Gate Charge Gate–Source Charge Gate–Drain Charge VDD = 10 V, VGS = 10 V, ID = 1 A, RGEN = 6 Ω 11 13 40 13 19 24 64 24 30 ns ns ns ns nC nC nC VDS = 15 V, VGS = 5 V ID = 13 A, 21 6 7 Drain–Source Diode Characteristics and Maximum Ratings IS VSD trr Qrr Maximum Continuous Drain–Source Diode Forward Current Drain–Source Diode Forward VGS = 0 V, IS = 2.1 A (Note 2) Voltage Diode Reverse Recovery Time IF = 13 A, diF/dt = 100 A/µs Diode Reverse Recovery Charge 2.1 0.7 31 21 1.2 A V nS nC Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) 50°C/W when mounted on a 1in2 pad of 2 oz copper b) 125°C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2 Test: Pulse Width < 300µs, Duty Cycle < 2.0% FDS6670A Rev F (W) FDS6670A Typical Characteristics 50 1.8 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 10V 3.5V 40 ID, DRAIN CURRENT (A) 1.6 VGS = 3.5V 1.4 4.5V 30 4.0V 20 1.2 4.0V 4.5V 5.0V 3.0V 10 1 10V 0 0 0.5 1 VDS, DRAIN-SOURCE VOLTAGE (V) 1.5 0.8 0 10 20 30 ID, DRAIN CURRENT (A) 40 50 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.025 RDS(ON), ON-RESISTANCE (OHM) 1.6 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 13A VGS = 10V 1.4 ID = 6.5A 0.02 1.2 0.015 TA = 125oC 0.01 TA = 25oC 0.005 1 0.8 0.6 -50 -25 0 25 50 75 100 TJ, JUNCTION TEMPERATURE (oC) 125 150 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10 Figure 3. On-Resistance Variation with Temperature. 50 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 IS, REVERSE DRAIN CURRENT (A) VDS = 5V 40 ID, DRAIN CURRENT (A) VGS = 0V 10 TA = 125oC 1 30 TA =125oC 20 25oC -55oC 10 0.1 25oC -55oC 0.01 0.001 0 2 2.25 2.5 2.75 3 3.25 VGS, GATE TO SOURCE VOLTAGE (V) 3.5 0.0001 0 0.2 0.4 0.6 0.8 1 VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS6670A Rev F (W) FDS6670A Typical Characteristics 10 VGS, GATE-SOURCE VOLTAGE (V) ID = 13A 8 15V CAPACITANCE (pF) VDS = 10V 6 20V 4 3000 f = 1MHz VGS = 0 V 2500 Ciss 2000 1500 1000 Coss 500 2 Crss 0 0 10 20 30 Qg, GATE CHARGE (nC) 40 50 0 0 5 10 15 20 25 VDS, DRAIN TO SOURCE VOLTAGE (V) 30 Figure 7. Gate Charge Characteristics. 100 100µs RDS(ON) LIMIT P(pk), PEAK TRANSIENT POWER (W) 80 Figure 8. Capacitance Characteristics. ID, DRAIN CURRENT (A) 10 1m 10ms 100ms 1s 60 SINGLE PULSE RθJA = 125°C/W TA = 25°C 10s 1 DC 40 0.1 VGS = 10V SINGLE PULSE RθJA = 125oC/W TA = 25oC 20 0.01 0.01 0.1 1 10 VDS, DRAIN-SOURCE VOLTAGE (V) 100 0 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. 1 r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0.5 0.2 R θ JA (t) = r(t) * R θJA R θ JA = 1 25 °C/W 0.1 0.1 0.05 0.02 P(pk) t1 t2 SINGLE PULSE 0.01 0.01 T J - T A = P * R θ JA (t) Duty Cycle, D = t 1 / t2 0.001 0.0001 0.001 0.01 0.1 t 1, TIME (sec) 1 10 100 1000 Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS6670A Rev F (W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FACT Quiet Series™ ActiveArray™ FAST Bottomless™ FASTr™ CoolFET™ FRFET™ CROSSVOLT™ GlobalOptoisolator™ DOME™ GTO™ EcoSPARK™ HiSeC™ E2CMOSTM I2C™ TM EnSigna ImpliedDisconnect™ FACT™ ISOPLANAR™ Across the board. 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As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I5