NC7SZ74K8

NC7SZ74 TinyLogic UHS D-Type Flip-Flop with Preset and Clear July 2001 Revised January 2005 NC7SZ74 TinyLogic UHS D-Type Flip-Flop with Preset and Clear General Description The NC7SZ74 is a single D-type CMOS Flip-Flop with preset and clear from Fairchild’s Ultra High Speed Series of TinyLogic in the space saving US8 package. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation over a very broad VCC operating range. The device is specified to operate over the 1.65V to 5.5V VCC range. The inputs and output are high impedance when VCC is 0V. Inputs tolerate voltages up to 7V independent of VCC operating voltage. The signal level applied to the D input is transferred to the Q output during the positive going transition of the CLK pulse. Features s Space saving US8 surface mount package s MicroPak Pb-Free leadless package s Ultra High Speed; tPD 2.6 ns Typ into 50 pF at 5V VCC s High Output Drive; ± 24 mA at 3V VCC s Broad VCC Operating Range; 1.65V to 5.5V s Power down high impedance inputs/output s Overvoltage tolerant inputs facilitate 5V to 3V translation s Patented noise/EMI reduction circuitry implemented Ordering Code: Product Order Number Package Number Code Top Mark SZ74 N9 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide 3k Units on Tape and Reel Pb-Free 8-Lead MicroPak, 1.6 mm Wide 5k Units on Tape and Reel Package Description Supplied As NC7SZ74K8X MAB08A NC7SZ74L8X MAC08A Pb-Free package per JEDEC J-STD-020B. TinyLogic is a registered trademark of Fairchild Semiconductor Corporation. MicroPak is a trademark of Fairchild Semiconductor Corporation. © 2005 Fairchild Semiconductor Corporation DS500499 www.fairchildsemi.com NC7SZ74 Logic Symbol IEEE/IEC Connection Diagrams Pin Descriptions Pin Names D CK CLR Q, Q PR Description Data Input Clock Pulse Input Direct Clear Input Flip-Flop Output Direct Preset Input (Top View) Pin One Orientation Diagram Truth Table Inputs CLR L H L H H H PR H L L H H H D X X X L H X CK X X X Outputs Function Q L H H L H Qn Q H L H H L Qn Clear Preset — — — No Change Pad Assignments for MicroPak AAA represents Product Code Top Mark - see ordering code Note: Orientation of Top Mark determines Pin One location. Read the top product code mark left to right, Pin One is the lower left pin (see diagram). ↑ ↑ ↓ H = HIGH Logic Level L = LOW Logic Level Qn = No change in data Z = High Impedance X = Immaterial ↑ = Rising Edge ↓ = Falling edge (Top Thru View) www.fairchildsemi.com 2 NC7SZ74 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Input Voltage (VIN) DC Output Voltage (VOUT) DC Input Diode Current (IIK) VIN < 0V DC Output Diode Current (IOK) VOUT < 0V DC Output (IOUT) Source/Sink Current DC VCC/GND Current (ICC/IGND) Storage Temperature Range (TSTG) Junction Temperature under Bias (TJ) Junction Lead Temperature (TL) (Soldering, 10 seconds) Power Dissipation (PD) @ +85°C 260°C 250 mW −0.5V to +7.0V −0.5V to +7.0V −0.5V to +7.0V −50 mA −50 mA ± 50 mA ± 50 mA −65°C to +150°C 150°C Recommended Operating Conditions (Note 2) Power Supply Operating (VCC ) Data Retention Input Voltage (VIN) Output Voltage (VOUT) Active State 3-STATE Input Rise and Fall Time (tr, tf) VCC = 1.8V, 2.5V ± 0.2V VCC = 3.3V ± 0.3V VCC = 5.5V ± 0.5V Operating Temperature (TA) Thermal Resistance (θJA) 0 to 20 ns/V 0 to 10 ns/V 0 to 5 ns/V 0V to VCC 0V to 5.5V 1.65V to 5.5V 1.5V to 5.5V 0V to 5.5V −40°C to +85°C 250° C/W Note 1: Absolute Maximum Ratings: are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 2: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIH VIL VOH Parameter HIGH Level Control Input Voltage LOW Level Control Input Voltage HIGH Level Control Output Voltage VCC (V) 2.3 to 5.5 1.65 to 1.95 2.3 to 5.5 1.65 2.3 3.0 4.5 1.65 2.3 3.0 3.0 4.5 VOL LOW Level Control Output Voltage 1.65 2.3 3.0 4.5 1.65 2.3 3.0 3.0 4.5 IIN IOFF ICC Input Leakage Current Power Off Leakage Current Quiescent Supply Current 0 to 5.5 0.0 1.65 to 5.5 0.08 0.10 0.15 0.22 0.22 1.55 2.2 2.9 4.4 1.29 1.9 2.4 2.3 3.8 1.65 2.3 3.0 4.5 1.52 2.15 2.8 2.68 4.2 0.1 0.1 0.1 0.1 0.24 0.3 0.4 0.55 0.55 ±0.1 1.0 1.0 Min 0.75 VCC 0.25 VCC 0.3 VCC 1.55 2.2 2.9 4.4 1.29 1.9 2.4 2.3 3.8 0.1 0.1 0.1 0.1 0.24 0.3 0.4 0.55 0.55 ±1.0 10 10.0 µA µA µA 0 ≤ VIN ≤ 5.5V VIN or VOUT = 5.5V VIN = 5.5V, GND V VIN = VIH IOL = 4 mA IOL = 8 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA IOL = 100 µA V VIN = VIH IOH = −4 mA IOH = −8 mA IOH = −16 mA IOH = −24 mA IOH = −32 mA IOH = −100 µA 1.65 to 1.95 0.75 VCC TA = +25°C Typ Max TA = −40°C to +85°C Min 0.75 VCC 0.7 VCC 0.25 VCC 0.3 VCC Max Units V V Conditions 3 www.fairchildsemi.com NC7SZ74 AC Electrical Characteristics Symbol fMAX Parameter Maximum Clock Frequency VCC (V) 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 tPLH tPHL Propagation Delay CK to Q, Q 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 tPLH tPHL Propagation Delay CLR, PR, to Q, Q 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 tS Setup Time, CK to D 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 tH Hold Time, CK to D 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 tW Pulse Width, CK, PR, CLR 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 tREC Recover Time CLR, PR to CK 1.8 ± 0.15 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 3.3 ± 0.3 5.0 ± 0.5 TA = +25°C Min 75 150 200 250 175 200 2.5 1.5 1.0 0.8 1.0 1.0 2.5 1.5 1.0 0.8 1.0 1.0 6.5 3.5 2.0 1.5 2.0 1.5 0.5 0.5 0.5 0.5 0.5 0.5 6.0 4.0 3.0 2.0 3.0 2.0 8.0 4.5 3.0 3.0 3.0 3.0 6.5 3.8 2.8 2.2 3.4 2.6 6.5 3.8 2.8 2.2 3.4 2.6 12.5 7.5 6.5 4.5 7.0 5.0 14.0 9.0 6.5 5.0 7.0 5.0 Typ Max TA = −40°C to +85°C Min 75 150 200 250 175 200 2.5 1.5 1.0 0.8 1.0 1.0 2.5 1.5 1.0 0.8 1.0 1.0 6.5 3.5 2.0 1.5 2.0 1.5 0.5 0.5 0.5 0.5 0.5 0.5 6.0 4.0 3.0 2.0 3.0 2.0 8.0 4.5 3.0 3.0 3.0 3.0 ns CL = 15 pF RD = 1 MΩ S1 = Open CL = 50 pF RD = 500 Ω, S1 = Open Figures 1, 4 ns CL = 15 pF RD = 1 MΩ S1 = Open CL = 50 pF RD = 500 Ω, S1 = Open Figures 1, 5 ns CL = 15 pF RD = 1 MΩ S1 = Open CL = 50 pF RD = 500 Ω, S1 = Open Figures 1, 4 ns CL = 15 pF RD = 1 MΩ S1 = Open CL = 50 pF RD = 500 Ω, S1 = Open Figures 1, 4 13.0 8.0 7.0 5.0 7.5 5.5 14.5 9.5 7.0 5.5 7.5 5.5 ns CL = 15 pF RD = 1 MΩ S1 = Open CL = 50 pF RD = 500 Ω, S1 = Open Figures 1, 3 ns CL = 15 pF RD = 1 MΩ S1 = Open CL = 50 pF RD = 500 Ω, S1 = Open Figures 1, 3 MHz CL = 15 pF RD = 1 MΩ S1 = Open CL = 50 pF RD = 500Ω, S1 = Open Figures 1, 5 Max Units Conditions Figure Number Capacitance (Note 3) Symbol CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance (Note 4) Parameter Typ 3 4 10 12 Note 3: TA = +25C, f = 1MHz. Note 4: C PD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD ) at no output loading and operating at 50% duty cycle. (See Figure 2) CPD is related to ICCD dynamic operating current by the expression: ICCD = (CPD) (VCC) (fIN) + (ICCstatic). Max Units pF pF pF VCC = 0V VCC = 0V VCC = 3.3V VCC = 5.0V Conditions www.fairchildsemi.com 4 NC7SZ74 AC Loading and Waveforms CL includes load and stray capacitance Input PRR = 1.0 MHz; tw = 500 ns CP Input = AC Waveform; tr = tf = 2.5 ns; CP Input PRR = 10 MHz; Duty Cycle = 50% D Input PRR = 5MHz; Duty Cycle = 50% FIGURE 1. AC Test Circuit FIGURE 2. ICCD Test Circuit FIGURE 3. AC Waveforms FIGURE 4. AC Waveforms FIGURE 5. AC Waveforms 5 www.fairchildsemi.com NC7SZ74 Tape and Reel Specification TAPE FORMAT for US8 Package Designator K8X Carrier Trailer (Hub End) TAPE DIMENSIONS inches (millimeters) Tape Section Leader (Start End) Number Cavities 125 (typ) 3000 75 (typ) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed TAPE FORMAT for MicroPak Package Designator L8X Carrier Tape Section Number Cavities 125 (typ) 3000 75 (typ) Cavity Status Empty Filled Empty Cover Tape Status Sealed Sealed Sealed Leader (Start End) Trailer (Hub End) TAPE DIMENSIONS inches (millimeters) www.fairchildsemi.com 6 NC7SZ74 Tape and Reel Specification REEL DIMENSIONS inches (millimeters) (Continued) Tape Size 8 mm A 7.0 (177.8) B 0.059 (1.50) C 0.512 (13.00) D 0.795 (20.20) N 2.165 (55.00) W1 0.331 + 0.059/−0.000 (8.40 + 1.50/−0.00) W2 0.567 (14.40) W3 W1 + 0.078/−0.039 (W1 + 2.00/−1.00) 7 www.fairchildsemi.com NC7SZ74 Physical Dimensions inches (millimeters) unless otherwise noted 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Package Number MAB08A www.fairchildsemi.com 8 NC7SZ74 TinyLogic UHS D-Type Flip-Flop with Preset and Clear Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 8-Lead MicroPak, 1.6 mm Wide Package Number MAC08A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 9 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com www.fairchildsemi.com