ESDL1531MX4T5G

ESDL1531 3.3V ESD Protection Diodes Ultra Low Capacitance ESD Protection Diode for High Speed Data Line The ESDL1531 ESD protection diodes are designed to protect high speed data lines from ESD. Ultra−low capacitance and low ESD clamping voltage make this device an ideal solution for protecting voltage sensitive high speed data lines. www.onsemi.com MARKING DIAGRAM Features • Low Capacitance (0.15 pF Typ, I/O to GND) • Protection for the Following IEC Standards: ESDL1531 X4DFN2 (01005) CASE 718AA IEC 61000−4−2 (Level 4) • Low ESD Clamping Voltage • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS J M Compliant Typical Applications • • • • JM = Device Code = Date Code PIN CONFIGURATION AND SCHEMATIC USB 2.0/3.x Thunderbolt MHL 2.0 eSATA 1 2 MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Value Unit Operating Junction Temperature Range TJ −55 to +150 °C Storage Temperature Range Tstg −55 to +150 °C Lead Solder Temperature − Maximum (10 Seconds) TL 260 °C ESD ±30 ±30 kV kV IEC 61000−4−2 Contact IEC 61000−4−2 Air = ORDERING INFORMATION See detailed ordering and shipping information on page 5 of this data sheet. Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. See Application Note AND8308/D for further description of survivability specs. © Semiconductor Components Industries, LLC, 2016 May, 2019 − Rev. 0 1 Publication Order Number: ESDL1531/D ESDL1531 ELECTRICAL CHARACTERISTICS I (TA = 25°C unless otherwise noted) Symbol VRWM IR VBR IPP Parameter RDYN Working Peak Voltage IHOLD Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT VBR VCVRWMVHOLD IT IR V Test Current IR IT VHOLD Holding Reverse Voltage IHOLD IHOLD Holding Reverse Current RDYN Dynamic Resistance IT VHOLDVRWMVC VBR RDYN IPP Maximum Peak Pulse Current VC Clamping Voltage @ IPP VC = VHOLD + (IPP * RDYN) −IPP VC = VHOLD + (IPP * RDYN) ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) Parameter Reverse Working Voltage Breakdown Voltage Symbol VRWM VBR Conditions Min Typ I/O Pin to GND IT = 1 mA, I/O Pin to GND 5.5 Unit 3.3 V 8.6 V 1.0 mA Reverse Leakage Current IR Reverse Holding Voltage VHOLD I/O Pin to GND 2.1 V Holding Reverse Current IHOLD I/O Pin to GND 17 mA V Clamping Voltage TLP (Note 1) VC VRWM = 3.3 V, I/O Pin to GND Max IPP = 8 A IEC 61000−4−2 Level 2 equivalent (±4 kV Contact, ±4 kV Air) 6.5 IPP = 16 A IEC 61000−4−2 Level 2 equivalent (±8 kV Contact, ±15 kV Air) 10.2 Reverse Peak Pulse Current IPP IEC61000−4−5 (8/20 ms) Clamping Voltage (8/20 ms) VC IPP = 5.7 A 5.6 I/O Pin to GND 0.46 VR = 0 V, f = 1 MHz 0.15 Dynamic Resistance RDYN Junction Capacitance CJ 5.7 7.5 A 6.5 V W 0.3 pF Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 1. ANSI/ESD STM5.5.1 − Electrostatic Discharge Sensitivity Testing using Transmission Line Pulse (TLP) Model. TLP conditions: Z0 = 50 W, tp = 100 ns, tr = 1 ns, averaging window; t1 = 70 ns to t2 = 90 ns. www.onsemi.com 2 ESDL1531 TYPICAL CHARACTERISTICS 110 100 10 0 −10 −20 90 70 60 VOLTAGE (V) VOLTAGE (V) 80 50 40 30 20 10 0 −10 −20 0 20 40 60 80 100 120 −30 −40 −50 −60 −70 −80 −90 −100 −110 −20 140 0 20 40 60 80 100 120 140 TIME (ns) TIME (ns) Figure 1. ESD Clamping Voltage − Pin 1 to Pin 2 8 kV Contact per IEC61000−4−2 Figure 2. ESD Clamping Voltage − Pin 2 to Pin 1 8 kV Contact per IEC61000−4−2 www.onsemi.com 3 ESDL1531 20 20 18 18 16 16 14 14 12 12 ITLP (A) ITLP (A) TYPICAL CHARACTERISTICS 10 8 10 8 6 6 4 4 2 2 0 0 2 4 6 8 12 10 14 0 16 0 2 6 4 VCTLP (V) 9 8 8 7 7 VC @ IPK (V) 10 9 6 5 4 4 3 2 1 1 1 2 3 4 IPK (A) 5 7 6 0 8 0 Figure 5. Clamping Voltage vs. Peak Pulse Current − Pin 1 to Pin 2 (tp = 8/20 ms) 1 2 3 1E−04 1E−05 1E−06 1E−07 1E−08 1E−09 1E−10 1E−11 −6 −4 −2 4 IPK (A) 5 6 7 Figure 6. Clamping Voltage vs. Peak Pulse Current − Pin 2 to Pin 1 (tp = 8/20 ms) 1E−03 1E−12 1E−13 −8 16 5 2 0 14 6 3 0 12 Figure 4. 100 ns TLP I−V Curve − Pin 2 to Pin 1 10 IR (A) VC @ IPK (V) Figure 3. 100 ns TLP I−V Curve − Pin 1 to Pin 2 8 10 VCTLP (V) 0 VR (V) 2 4 6 Figure 7. Reverse Leakage Current www.onsemi.com 4 8 8 ESDL1531 TYPICAL CHARACTERISTICS 0.40 0.35 −0.6 0.30 −1.0 0.25 C (pF) S(2,1) MAGNITUDE (dB) 0 −0.2 −1.4 0.20 −1.8 0.15 −2.2 0.10 −2.6 0.05 −3.0 1E+09 1E+08 0 1E+10 1E+08 1E+09 1E+10 FREQUENCY (Hz) FREQUENCY (Hz) Figure 8. Insertion Loss Figure 9. Capacitance Over Frequency ORDERING INFORMATION Device ESDL1531MX4T5G Package Shipping† X4DFN2 (Pb−Free) 10,000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 ESDL1531 IEC61000−4−2 Waveform IEC 61000−4−2 Spec. Ipeak Level Test Voltage (kV) First Peak Current (A) Current at 30 ns (A) Current at 60 ns (A) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 100% 90% I @ 30 ns I @ 60 ns 10% tP = 0.7 ns to 1 ns Figure 10. IEC61000−4−2 Spec Transmission Line Pulse (TLP) Measurement L Transmission Line Pulse (TLP) provides current versus voltage (I−V) curves in which each data point is obtained from a 100 ns long rectangular pulse from a charged transmission line. A simplified schematic of a typical TLP system is shown in Figure 11. TLP I−V curves of ESD protection devices accurately demonstrate the product’s ESD capability because the 10s of amps current levels and under 100 ns time scale match those of an ESD event. This is illustrated in Figure 12 where an 8 kV IEC 61000−4−2 current waveform is compared with TLP current pulses at 8 A and 16 A. A TLP I−V curve shows the voltage at which the device turns on as well as how well the device clamps voltage over a range of current levels. 50 W Coax Cable S Attenuator ÷ 50 W Coax Cable 10 MW IM VM DUT VC Oscilloscope Figure 11. Simplified Schematic of a Typical TLP System Figure 12. Comparison Between 8 kV IEC 61000−4−2 and 8 A and 16 A TLP Waveforms www.onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS X4DFN2, 0.445x0.24, 0.27P CASE 718AA ISSUE A DATE 21 MAR 2017 SCALE 10:1 A B D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. EXPOSED COPPER ALLOWED AS SHOWN. Ç PIN 1 REFERENCE DIM A A1 b D E e L E TOP VIEW A 0.03 C 0.03 C A1 SIDE VIEW C GENERIC MARKING DIAGRAMS* SEATING PLANE X e e/2 2 2X 0.10 C A B L X b PIN 1 2X MILLIMETERS MIN NOM MAX 0.15 0.18 0.21 −−− −−− 0.03 0.170 0.185 0.200 0.415 0.445 0.475 0.210 0.240 0.270 0.270 BSC 0.105 0.120 0.135 0.05 C NOTE 3 BOTTOM VIEW X = Specific Device Code *This information is generic. Please refer to device data sheet for actual part marking. Some products may not follow the Generic Marking. RECOMMENDED MOUNTING FOOTPRINT* 0.27 PITCH 2X 0.21 1 2X 0.13 DIMENSIONS: MILLIMETERS See Application Note AND8398/D for more mounting details *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON29067G X4DFN2, 0.445X0.24, 0.27P Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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