ESDL031-1BF4

ESDL031-1BF4 Datasheet 3.3 V ultra-low clamping single line bidirectional ESD protection Features ST0201 package • Ultra-low clamping voltage: 6.3 V TLP at 16 A Ipp • • • Bidirectional protection diode Very low dynamic resistance: 85 mΩ Low leakage current: 100 nA max at 3.3 V VRM • • • ST0201 package ECOPACK2 compliant component Exceeds IEC 61000-4-2 level 4: – ±25 kV (contact discharge) – ±30 kV (air discharge) Application Where transient over voltage protection in ESD sensitive equipment is required, such as: • Smartphones, mobile phones and accessories • Tablets and notebooks • Portable multimedia devices and accessories • Wearable, home automation, healthcare • Highly integrated systems Product status link ESDL031-1BF4 Description The ESDL031-1BF4 is a bidirectional single line TVS diode designed to protect the power line against EOS and ESD transients. The device is ideal for applications where board space saving is required. DS13106 - Rev 1 - September 2019 For further information contact your local STMicroelectronics sales office. www.st.com ESDL031-1BF4 Characteristics 1 Characteristics Table 1. Absolute maximum ratings (Tamb = 25 °C) Symbol Parameter Value IEC 61000-4-2 contact discharge ±25 IEC 61000-4-2 air discharge ±30 Unit Vpp Peak pulse voltage Ppp Peak pulse power (8/20 μs) 45 W Ipp Peak pulse current (8/20 μs) 7 A Tj Operating junction temperature range -55 to 150 Storage junction temperature range -65 to 150 Tstg TL Maximum lead temperature for soldering during 10 s kV °C 260 Figure 1. Electrical characteristics (definitions) Ipp DS13106 - Rev 1 Symbol VBR = Parameter Breakdown voltage IR = Breakdown current VCL IRM VRM IPP = = = = Clamping voltage Leakage current at V RM Stand-off voltage Peak pulse current RD = Dynamic resistance I V page 2/11 ESDL031-1BF4 Characteristics Table 2. Electrical characteristics (values) (Tamb = 25° C) Symbol Test condition Min. Typ. Max. Unit VRM Reverse working voltage VBR Breakdown voltage IR = 1 mA IRM Leakage current VRM = 3.3 V VCL Reverse clamping voltage Ipp = 7 A - 8/20µs VCL Reverse clamping voltage 8 kV contact discharge after 30 ns, IEC 61000-4-2 VCL Reverse clamping voltage TLP measurement (pulse duration 100 ns) RD Dynamic resistance, TLP pulse duration 100 ns (from 4 A to 16 A Ipp) 85 VLINE = 0 V, F = 1 MHz, VOSC = 30 mV 10 CLINE DS13106 - Rev 1 Parameter Line capacitance 5.0 3.3 V 5.5 6.6 V 30 100 nA 7 V 6.6 IPP = 4 A 5.2 IPP = 16 A 6.3 V V mΩ 12 pF page 3/11 ESDL031-1BF4 Characteristics (curves) 1.1 Characteristics (curves) Figure 2. Leakage current versus junction temperature (typical values) Figure 3. Junction capacitance versus applied voltage (typical values) Ir(nA) 300 VRM = 3.3 V VR = VRM 250 200 150 100 50 Tj(°C) 0 0 25 50 75 100 125 150 Figure 4. ESD response to IEC 61000-4-2 (+8 kV contact discharge) 5 V/div Figure 5. ESD response to IEC 61000-4-2 (-8 kV contact discharge) 5 V/div Peak clamping voltage Clamping voltage at 30 ns Clamping voltage at 60 ns Clamping voltage at 100 ns 1 2 3 4 20.6 V 1 2 -5.8 V 6.6 V 5.8 V 2 3 -5.3 V 4 -4.7 V 5.2 V 3 4 1 -21.3 V 1 2 3 4 Peak clamping voltage Clamping voltage at 30 ns Clamping voltage at 60 ns Clamping voltage at 100 ns 20 ns/div Figure 6. TLP characteristic 20 ns/div Figure 7. S21 attenuation measurement result TLP current (A) S21(dB) 25 20 15 10 5 0 -8 -7 -6 -5 -4 -3 -2 -1 0 -5 -10 1 2 3 4 5 6 7 8 TLP current (V) F(Hz) -15 -20 -25 DS13106 - Rev 1 page 4/11 ESDL031-1BF4 Package information 2 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 2.1 ST0201 package information Figure 8. ST0201 package outline Note: The marking codes can be rotated by 90° or 180° to differentiate assembly location. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. Table 3. 0201 package mechanical data Dimensions Millimeters Ref. Min. Typ. Max. A 0.130 0.150 0.170 b 0.1675 0.1875 0.2075 D 0.560 0.580 0.600 D1 DS13106 - Rev 1 0.3375 E 0.260 0.280 0.300 E1 0.205 0.225 0.245 fD 0.0175 0.0275 0.0375 fE 0.0175 0.0275 0.0375 page 5/11 ESDL031-1BF4 ST0201 package information Pin 1 Note: H Figure 9. Marking Pin 2 The marking codes can be rotated by 90° or 180° to differentiate assembly location. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. Figure 10. Tape and reel specification (in mm) Ø 1.5 ±0.10 4.0 ±0.10 1.75 ±0.10 2.0 ±0.05 0.20 ±0.03 3.50 ±0.05 0.64 ±0.03 8.0 +0.30 / -0.10 0.2 ±0.02 0.34 ±0.03 2.0 ±0.05 Ø 0.17 ±0.05 0.3 raised cross-bar All dimensions are typical values in mm User direction of unreeling DS13106 - Rev 1 page 6/11 ESDL031-1BF4 Recommendation on PCB assembly 3 Recommendation on PCB assembly 3.1 Footprint 1. SMD footprint design is recommended Figure 11. Footprint in mm 0.150 0.225 0.187 Solder mask opening 3.2 Stencil opening design 1. Recommended design reference a. Stencil opening dimensions: 75 µm / 3 mils b. Stencil aperture ratio : 100% Figure 12. Stencil opening recommendations 0.167 0.210 0.170 Stencil apertures DS13106 - Rev 1 page 7/11 ESDL031-1BF4 Solder paste 3.3 Solder paste 1. 2. 3. 4. 3.4 Placement 1. 2. 3. 4. 5. 6. 3.5 Manual positioning is not recommended. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering Standard tolerance of ±0.05 mm is recommended. 1.0 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. PCB design preference 1. 2. 3.6 Halide-free flux qualification ROL0 according to ANSI/J-STD-004. “No clean” solder paste is recommended. Offers a high tack force to resist component movement during high speed. Use solder paste with fine particles: powder particle size 20-38 µm. To control the solder paste amount, the closed via is recommended instead of open vias. The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away. Reflow profile Figure 13. ST ECOPACK® recommended soldering reflow profile for PCB mounting 250 240-245 °C Temperature (°C) -2 °C/s 2 - 3 °C/s 60 sec (90 max) 200 -3 °C/s 150 -6 °C/s 100 0.9 °C/s 50 Time (s) 0 Note: DS13106 - Rev 1 30 60 90 120 150 180 210 240 270 300 Minimize air convection currents in the reflow oven to avoid component movement. Maximum soldering profile corresponds to the latest IPC/JEDEC J-STD-020. page 8/11 ESDL031-1BF4 Ordering information 4 Ordering information Figure 14. Ordering information scheme ESD L 03 1 - 1 B F4 ESD protection Low capacitance VRM 03 = 3.3 Vmax. Version Number of lines B = Birectional Package F4 = ST0201 Table 4. Ordering information DS13106 - Rev 1 Order code Marking Package Weight Base qty. Delivery mode ESDL031-1BF4 H ST0201 0.116 mg 15000 Tape and reel page 9/11 ESDL031-1BF4 Revision history Table 5. Document revision history DS13106 - Rev 1 Date Revision 24-Sep-2019 1 Changes First issue. page 10/11 ESDL031-1BF4 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2019 STMicroelectronics – All rights reserved DS13106 - Rev 1 page 11/11