FQD2N60CTM

TM FQD2N60C / FQU2N60C 600V N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficiency switched mode power supplies, active power factor correction, electronic lamp ballasts based on half bridge topology. • • • • • • 1.9A, 600V, RDS(on) = 4.7Ω @VGS = 10 V Low gate charge ( typical 8.5 nC) Low Crss ( typical 4.3 pF) Fast switching 100% avalanche tested Improved dv/dt capability D D ! ● ◀ G S FQD Series G! I-PAK D-PAK G D S ▲ ● ● FQU Series ! S Absolute Maximum Ratings Symbol VDSS ID TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current FQD2N60C / FQU2N60C 600 - Continuous (TC = 100°C) IDM Drain Current VGSS Gate-Source Voltage - Pulsed (Note 1) Units V 1.9 A 1.14 A 7.6 A ± 30 V mJ EAS Single Pulsed Avalanche Energy (Note 2) 120 IAR Avalanche Current (Note 1) 1.9 A EAR (Note 1) dv/dt Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C)* 4.4 4.5 2.5 mJ V/ns W PD Power Dissipation (TC = 25°C) 44 0.35 -55 to +150 W W/°C °C 300 °C TJ, TSTG TL (Note 3) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case Typ -- Max 2.87 Units °C/W RθJA Thermal Resistance, Junction-to-Ambient* -- 50 °C/W RθJA Thermal Resistance, Junction-to-Ambient -- 110 °C/W * When mounted on the minimum pad size recommended (PCB Mount) ©2003 Fairchild Semiconductor Corporation Rev. A, October 2003 FQD2N60C / FQU2N60C QFET Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units 600 -- -- V -- 0.6 -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C IDSS IGSSF IGSSR VDS = 600 V, VGS = 0 V -- -- 1 µA VDS = 480 V, TC = 125°C -- -- 10 µA Gate-Body Leakage Current, Forward VGS = 30 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -30 V, VDS = 0 V -- -- -100 nA Zero Gate Voltage Drain Current On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2.0 -- 4.0 V RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 0.95 A -- 3.6 4.7 Ω gFS Forward Transconductance VDS = 40 V, ID = 0.95 A -- 5.0 -- S -- 180 235 pF -- 20 25 pF -- 4.3 3 pF -- 9 28 ns -- 25 60 ns -- 24 58 ns -- 28 66 ns -- 8.5 12 nC (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 300 V, ID = 2 A, RG = 25 Ω (Note 4, 5) VDS = 480 V, ID = 2 A, VGS = 10 V (Note 4, 5) -- 1.3 -- nC -- 4.1 -- nC A Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 1.9 ISM -- -- 7.6 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 1.9 A Drain-Source Diode Forward Voltage -- -- 1.4 V trr Reverse Recovery Time -- 230 -- ns Qrr Reverse Recovery Charge -- 1.0 -- µC VGS = 0 V, IS = 2 A, dIF / dt = 100 A/µs (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 56mH, IAS = 2A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 2A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2003 Fairchild Semiconductor Corporation Rev. A, October 2003 FQD2N60C / FQU2N60C Electrical Characteristics FQD2N60C / FQU2N60C Typical Characteristics 1 10 VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V 5.0 V Bottom : 4.5 V 0 ID, Drain Current [A] 10 ID, Drain Current [A] Top : -1 10 o 150 C o -55 C 0 10 o 25 C ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ ※ Notes : 1. VDS = 40V 2. 250μ s Pulse Test -2 10 -1 -1 0 10 10 1 10 2 10 4 6 8 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 12 IDR, Reverse Drain Current [A] RDS(ON) [Ω ], Drain-Source On-Resistance 10 VGS = 10V 8 6 4 VGS = 20V 2 0 10 150℃ ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test 25℃ ※ Note : TJ = 25℃ -1 10 0 0 1 2 3 4 5 0.2 0.4 Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage 500 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 450 Coss 200 ※ Notes ; 1. VGS = 0 V 2. f = 1 MHz 150 Crss 100 1.0 1.2 1.4 12 VGS, Gate-Source Voltage [V] Capacitance [pF] Ciss 300 250 0.8 Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature VDS = 120V 10 400 350 0.6 VSD, Source-Drain voltage [V] ID, Drain Current [A] VDS = 300V 8 VDS = 480V 6 4 2 50 ※ Note : ID = 2A 0 -1 10 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2003 Fairchild Semiconductor Corporation 0 0 2 4 6 8 10 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. A, October 2003 FQD2N60C / FQU2N60C Typical Characteristics (Continued) 3.0 1.2 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μ A 0.9 0.8 -100 -50 0 50 100 2.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 0.95 A 0.5 150 0.0 -100 200 -50 o 0 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs Temperature Figure 8. On-Resistance Variation vs Temperature 2.0 Operation in This Area is Limited by R DS(on) 1 10 1.6 ID, Drain Current [A] ID, Drain Current [A] 100 µs 1 ms 0 10 1.2 10 ms 100 ms DC 0.8 -1 10 ※ Notes : 0.4 o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse -2 10 0 10 1 2 10 0.0 25 3 10 10 50 100 125 150 Figure 10. Maximum Drain Current vs Case Temperature D = 0 .5 ※ N o te s : 1 . Z θ J C (t) = 2 .8 7 ℃ /W M a x . 2 . D u ty F a c to r, D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C (t) 0 0 .2 0 .1 0 .0 5 10 PDM 0 .0 2 0 .0 1 -1 Z θ JC (t), T h e r m a l R e s p o n s e Figure 9. Maximum Safe Operating Area 10 75 TC, Case Temperature [℃] VDS, Drain-Source Voltage [V] t1 t2 s in g le p u ls e 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ] Figure 11. Transient Thermal Response Curve ©2003 Fairchild Semiconductor Corporation Rev. A, October 2003 FQD2N60C / FQU2N60C Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50KΩ Qg 200nF 12V 10V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL VDS 90% VDD VGS RG VGS DUT 10V 10% td(on) tr td(off) t on tf t off Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG VDD DUT 10V tp ©2003 Fairchild Semiconductor Corporation ID (t) VDS (t) VDD tp Time Rev. A, October 2003 FQD2N60C / FQU2N60C Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2003 Fairchild Semiconductor Corporation Rev. A, October 2003 D-PAK MIN0.55 0.91 ±0.10 9.50 ±0.30 0.50 ±0.10 0.76 ±0.10 0.50 ±0.10 1.02 ±0.20 2.30TYP [2.30±0.20] (1.00) (3.05) (2XR0.25) (0.10) 2.70 ±0.20 6.10 ±0.20 9.50 ±0.30 6.60 ±0.20 (5.34) (5.04) (1.50) (0.90) 2.30 ±0.20 (0.70) 2.30TYP [2.30±0.20] (0.50) 2.30 ±0.10 0.89 ±0.10 MAX0.96 (4.34) 2.70 ±0.20 0.80 ±0.20 0.60 ±0.20 (0.50) 6.10 ±0.20 5.34 ±0.30 0.70 ±0.20 6.60 ±0.20 0.76 ±0.10 Dimensions in Millimeters ©2003 Fairchild Semiconductor Corporation Rev. A, October 2003 FQD2N60C / FQU2N60C Package Dimensions (Continued) I-PAK 2.30 ±0.20 6.60 ±0.20 5.34 ±0.20 0.76 ±0.10 2.30TYP [2.30±0.20] 0.50 ±0.10 16.10 ±0.30 6.10 ±0.20 0.70 ±0.20 (0.50) 9.30 ±0.30 MAX0.96 (4.34) 1.80 ±0.20 0.80 ±0.10 0.60 ±0.20 (0.50) 2.30TYP [2.30±0.20] 0.50 ±0.10 Dimensions in Millimeters ©2003 Fairchild Semiconductor Corporation Rev. A, October 2003 FQD2N60C / FQU2N60C Package Dimensions TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ FACT Quiet Series™ ActiveArray™ FAST® FASTr™ Bottomless™ FRFET™ CoolFET™ CROSSVOLT™ GlobalOptoisolator™ GTO™ DOME™ HiSeC™ EcoSPARK™ I2C™ E2CMOS™ EnSigna™ ImpliedDisconnect™ FACT™ ISOPLANAR™ Across the board. Around the world.™ The Power Franchise™ Programmable Active Droop™ LittleFET™ MICROCOUPLER™ MicroFET™ MicroPak™ MICROWIRE™ MSX™ MSXPro™ OCX™ OCXPro™ OPTOLOGIC® OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench® QFET® QS™ QT Optoelectronics™ Quiet Series™ RapidConfigure™ RapidConnect™ SILENT SWITCHER® SMART START™ SPM™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic® TINYOPTO™ TruTranslation™ UHC™ UltraFET® VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems 2. A critical component is any component of a life support which, (a) are intended for surgical implant into the body, device or system whose failure to perform can be or (b) support or sustain life, or (c) whose failure to perform reasonably expected to cause the failure of the life support when properly used in accordance with instructions for use device or system, or to affect its safety or effectiveness. provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2003 Fairchild Semiconductor Corporation Rev. I5