UPA2751GR

DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA2751GR SWITCHING N-CHANNEL POWER MOS FET DESCRIPTION The µPA2751GR is asymmetrical dual N-Channel MOS Field Effect Transistor designed for DC/DC converters of notebook computers and so on. PACKAGE DRAWING (Unit: mm) 8 5 CH2 CH2 CH1 CH1 1 ; Source 1 2 ; Gate 1 7, 8 ; Drain 1 3 ; Source 2 4 ; Gate 2 5, 6 ; Drain 2 FEATURES • Asymmetric dual chip type • Low on-state resistance, Low Ciss CH1: RDS(on)2: 21.0 mΩ MAX. (VGS = 4.5 V, ID = 4.5 A) Ciss = 1040 pF TYP. (VDS = 10 V, VGS = 0 V) CH2: RDS(on)2: 35.0 mΩ MAX. (VGS = 4.5 V, ID = 4.0 A) Ciss = 480 pF TYP. (VDS = 10 V, VGS = 0 V) • Built-in G-S protection diode • Small and surface mount package (Power SOP8) 1 4 5.37 Max. +0.10 –0.05 6.0 ±0.3 4.4 0.8 1.8 Max. 1.44 0.15 0.05 Min. 0.5 ±0.2 0.10 1.27 0.40 0.78 Max. 0.12 M ORDERING INFORMATION PART NUMBER PACKAGE Power SOP8 +0.10 –0.05 µPA2751GR ABSOLUTE MAXIMUM RATINGS (TA = 25°C, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) Gate to Source Voltage (VDS = 0 V) Drain Current (DC) Drain Current (pulse) Note1 Total Power Dissipation (1 unit) Note2 Total Power Dissipation (2 unit) Channel Temperature Storage Temperature Note3 Single Avalanche Current Note3 Single Avalanche Energy Note3 Single Avalanche Current Note3 Single Avalanche Energy Note2 CH1/CH2 CH1/CH2 CH1 CH2 CH1 CH2 CH1/CH2 CH1/CH2 CH1/CH2 CH1/CH2 CH1 CH1 CH2 CH2 VDSS VGSS ID(DC) ID(DC) ID(pulse) ID(pulse) PT PT Tch Tstg IAS EAS IAS EAS 30 ±20 ±9.0 ±8.0 ±36 ±32 1.7 2.0 150 –55 to + 150 9.0 8.1 8.0 6.4 V V A A A A W W °C °C A mJ A mJ EQUIVALENT CIRCUIT (1/2 circuit) Drain Gate Body Diode Gate Protection Diode Source Notes 1. PW ≤ 10 µs, Duty cycle ≤ 1% 2 2. TA = 25°C, Mounted on ceramic substrate of 2000 mm x 1.6 mm 3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, VGS = 20 → 0 V Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is externally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. G15781EJ1V0DS00 (1st edition) Date Published March 2002 NS CP(K) Printed in Japan © 2001 µPA2751GR ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.) CH1 CHARACTERISTICS Zero Gate Voltage Drain Current Gate Leakage Current Gate Cut-off Voltage Forward Transfer Admittance Drain to Source On-state Resistance SYMBOL IDSS IGSS VGS(off) | yfs | RDS(on)1 RDS(on)2 RDS(on)3 Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Qrr VDD = 24 V VGS = 10 V ID = 9.0 A IF = 9.0 A, VGS = 0 V IF = 9.0 A, VGS = 0 V di/dt = 100 A/ µs TEST CONDITIONS VDS = 30 V, VGS = 0 V VGS = ±20 V, VDS = 0 V VDS = 10 V, ID = 1 mA VDS = 10 V, ID = 4.5 A VGS = 10 V, ID = 4.5 A VGS = 4.5 V, ID = 4.5 A VGS = 4.0 V, ID = 4.5 A VDS = 10 V VGS = 0 V f = 1 MHz VDD = 15 V, ID = 4.5 A VGS = 10 V RG = 10 Ω 1.5 5 2.0 11 12.5 16.0 17.9 1040 390 130 13 10 43 9 21 3.3 5.1 0.84 34 34 15.5 21.0 23.9 MIN. TYP. MAX. 10 ±10 2.5 UNIT µA µA V S mΩ mΩ mΩ pF pF pF ns ns ns ns nC nC nC V ns nC TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V 50 Ω TEST CIRCUIT 2 SWITCHING TIME D.U.T. L VDD PG. RG VGS RL VDD VDS 90% 90% 10% 10% VGS Wave Form 0 10% VGS 90% BVDSS IAS ID VDD VDS VGS 0 τ τ = 1 µs Duty Cycle ≤ 1% VDS VDS Wave Form 0 td(on) ton tr td(off) toff tf Starting Tch TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA PG. 50 Ω RL VDD 2 Data Sheet G15781EJ1V0DS µPA2751GR ELECTRICAL CHARACTERISTICS (TA = 25°C, All terminals are connected.) CH2 CHARACTERISTICS Zero Gate Voltage Drain Current Gate Leakage Current Gate Cut-off Voltage Forward Transfer Admittance Drain to Source On-state Resistance SYMBOL IDSS IGSS VGS(off) | yfs | RDS(on)1 RDS(on)2 RDS(on)3 Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Total Gate Charge Gate to Source Charge Gate to Drain Charge Body Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Ciss Coss Crss td(on) tr td(off) tf QG QGS QGD VF(S-D) trr Qrr VDD = 24 V VGS = 10 V ID = 8.0 A IF = 8.0 A, VGS = 0 V IF = 8.0 A, VGS = 0 V di/dt = 100 A/ µs TEST CONDITIONS VDS = 30 V, VGS = 0 V VGS = ±18 V, VDS = 0 V VDS = 10 V, ID = 1 mA VDS = 10 V, ID = 4.0 A VGS = 10 V, ID = 4.0 A VGS = 4.5 V, ID = 4.0 A VGS = 4.0 V, ID = 4.0 A VDS = 10 V VGS = 0 V f = 1 MHz VDD = 15 V, ID = 4.0 A VGS = 10 V RG = 10 Ω 1.5 3.5 2.0 7 18.0 25.0 28.5 480 190 70 9.9 6.2 25 5.8 10 1.9 2.6 0.81 28 23 23.0 35.0 41.0 MIN. TYP. MAX. 10 ±10 2.5 UNIT µA µA V S mΩ mΩ mΩ pF pF pF ns ns ns ns nC nC nC V ns nC TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = 20 → 0 V 50 Ω TEST CIRCUIT 2 SWITCHING TIME D.U.T. L VDD PG. RG VGS RL VDD VDS 90% 90% 10% 10% VGS Wave Form 0 10% VGS 90% BVDSS IAS ID VDD VDS VGS 0 τ τ = 1 µs Duty Cycle ≤ 1% VDS VDS Wave Form 0 td(on) ton tr td(off) toff tf Starting Tch TEST CIRCUIT 3 GATE CHARGE D.U.T. IG = 2 mA PG. 50 Ω RL VDD Data Sheet G15781EJ1V0DS 3 µPA2751GR TYPICAL CHARACTERISTICS (TA = 25°C) A) CH1 FORWARD TRANSFER CHARACTERISTICS 100 Pulsed VDS = 10 V 40 4.5 V 35 30 25 20 15 10 5 0.01 0 1 2 3 4 5 0 0 Pulsed 0.2 0.4 0.6 0.8 VDS - Drain to Source Voltage - V 1.0 VGS = 10 V 4V DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE ID - Drain Current - A 1 0.1 TA = −25˚C 25˚C 75˚C 150˚C VGS - Gate to Source Voltage - V ID - Drain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ 10 FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT | yfs | - Forward Transfer Admittance - S 100 VDS = 10 V Pulsed DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 50 Pulsed 40 ID = 9.0 A 30 4.5 A 10 TA = 150˚C 75˚C 25˚C −25˚C 20 1 10 0.1 0.01 0.1 0 1 10 100 0 5 10 15 20 ID - Drain Current - A VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 80 Pulsed 3.0 GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE VDS = 10 V ID = 1 mA VGS(off) - Gate Cut-off Voltage - V 2.5 2.0 1.5 1.0 0.5 0 −75 −50 −25 60 40 20 VGS = 4 V 10 V 4.5 V 0 0.1 1 10 100 0 25 50 75 100 125 150 175 ID - Drain Current - A Tch - Channel Temperature - ˚C 4 Data Sheet G15781EJ1V0DS µPA2751GR A) CH1 RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 40 Pulsed ID = 4.5 A 100 VGS = 10 V SOURCE TO DRAIN DIODE FORWARD VOLTAGE ISD - Diode Forward Current - A 4V 10 0V 30 VGS = 4 V 20 4.5 V 1 10 10 V 0.1 0 −50 −25 0 25 50 75 100 125 150 175 0.01 0 0.5 1.0 Pulsed 1.5 VSD - Source to Drain Voltage - V Tch - Channel Temperature - ˚C CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 1000 SWITCHING CHARACTERISTICS td(on), tr, td(off), tf - Switching Time - ns Ciss, Coss, Crss - Capacitance - pF 100 tr td(off) td(on) 1000 Ciss Coss 10 tf 1 VDD = 15 V VGS = 10 V RG = 10 Ω 1 10 100 ID - Drain Current - A 100 Crss VGS = 0 V f = 1 MHz 1 10 100 10 0.1 0.1 0.1 VDS - Drain to Source Voltage - V REVERSE RECOVERY TIME vs. DRAIN CURRENT 1000 DYNAMIC INPUT/OUTPUT CHARACTERISTICS 35 VDS - Drain to Source Voltage - V trr - Reverse Recovery Time - ns 30 25 20 15 10 5 0 0 2 4 6 8 QG - Gate Charge - nC VDS ID = 9 A VDD = 24 V 15 V 6V VGS 12 10 8 6 4 2 0 100 10 1 0.1 1 10 100 10 12 14 16 18 20 22 IF - Drain Current - A VGS - Gate to Source Voltage - V di/dt = 100 A/ µ s VGS = 0 V 14 Data Sheet G15781EJ1V0DS 5 µPA2751GR A) CH1 DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE PT - Total Power Dissipation - W/package 120 2.8 2.4 2.0 1.6 1.2 0.8 0.4 0 0 20 40 60 80 100 120 140 160 TA - Ambient Temperature - ˚C 2 unit 1 unit Mounted on ceramic substrate of 2000 mm2 × 2.2 mm dT - Percentage of Rated Power - % 100 80 60 40 20 0 0 20 40 60 80 100 120 140 160 TA - Ambient Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA 100 on S( RD GS ) d ite Lim V) 10 = ID(pulse) PW =1 s 00 ID - Drain Current - A 10 (V ID(DC) 10 Po we r 1m µs ms 10 Di ss ipa tio 0m 1 s nL im ite d 0.1 Mounted on2ceramic substrate of 2000 mm x 2.2 mm Single Pulse, 1 unit TA = 25˚C Single Pulse 0.01 0.1 1 10 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - ˚C/W 1000 Mounted on ceramic substrate 2 of 2000 mm x 2.2 mm Single Pulse, 1 unit TA = 25˚C 100 Rth(ch-A) = 73.5˚C/W 10 1 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 PW - Pulse Width - s 6 Data Sheet G15781EJ1V0DS µPA2751GR A) CH1 SINGLE AVALANCHE CURRENT vs. INDUCTIVE LOAD 100 RG = 25 Ω VDD = 15 V 0V VGS = 20 Starting Tch = 25˚C 120 SINGLE AVALANCHE ENERGY DERATING FACTOR RG = 25 9 VDD = 15 V 0V VGS = 20 IAS 9 A IAS - Single Avalanche Current - A Energy Derating Factor - % 100 80 60 40 20 0 25 50 75 10 IAS = 9 A EAS = 8.1 mJ 1 10 µ 100 µ 1m 10 m 100 125 150 L - Inductive Load - H Starting Tch - Starting Channel Temperature - ˚C Data Sheet G15781EJ1V0DS 7 µPA2751GR TYPICAL CHARACTERISTICS (TA = 25°C) B) CH2 FORWARD TRANSFER CHARACTERISTICS 100 Pulsed VDS = 10 V 40 35 DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE ID - Drain Current - A ID - Drain Current - A 10 30 VGS = 10 V 25 20 15 10 5 4.0 V 4.5 V 1 0.1 TA = −25˚C 25˚C 75˚C 150˚C 0.01 0 1 2 3 4 5 0 0 Pulsed 0.2 0.4 0.6 0.8 1.0 1.2 VDS - Drain to Source Voltage - V 1.4 VGS - Gate to Source Voltage - V | yfs | - Forward Transfer Admittance - S 100 VDS = 10 V Pulsed RDS(on) - Drain to Source On-state Resistance - mΩ FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 80 Pulsed 60 ID = 8.0 A 10 40 4.0 A 20 1 TA = 150˚C 75˚C 25˚C −25˚C 0.1 0.01 0.1 1 10 100 0 0 5 10 15 20 ID - Drain Current - A VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT 100 Pulsed 3.0 GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE VDS = 10 V ID = 1 mA VGS(off) - Gate Cut-off Voltage - V 100 80 2.5 2.0 1.5 1.0 0.5 0 −75 −50 −25 60 VGS = 4.0 V 40 4.5 V 20 10 V 0 0.1 1 10 0 25 50 75 100 125 150 175 ID - Drain Current - A Tch - Channel Temperature - ˚C 8 Data Sheet G15781EJ1V0DS µPA2751GR B) CH2 RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE 50 Pulsed ID = 4.0 A 40 VGS = 4 V 30 10 V 20 4.5 V 100 Pulsed SOURCE TO DRAIN DIODE FORWARD VOLTAGE VGS = 10 V ISD - Diode Forward Current - A 10 4V 0V 1 10 0.1 0 −50 −25 0.01 0 25 50 75 100 125 150 175 0 0.5 1.0 1.5 Tch - Channel Temperature - ˚C VSD - Source to Drain Voltage - V CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 10000 1000 SWITCHING CHARACTERISTICS td(on), tr, td(off), tf - Switching Time - ns Ciss, Coss, Crss - Capacitance - pF 100 tf td(off) 1000 Ciss 10 tr 1 VDD = 15 V VGS = 10 V RG = 10 Ω 1 10 td(on) 100 Coss Crss 10 0.1 VGS = 0 V f = 1 MHz 1 10 100 0.1 0.1 100 VDS - Drain to Source Voltage - V ID - Drain Current - A REVERSE RECOVERY TIME vs. DRAIN CURRENT 1000 DYNAMIC INPUT/OUTPUT CHARACTERISTICS 35 VDS - Drain to Source Voltage - V trr - Reverse Recovery Time - ns 30 25 20 15 10 5 0 0 2 4 6 8 QG - Gate Charge - nC VDS ID = 8.0 A 10 VDD = 24 V 15 V 6V VGS 12 10 8 6 4 2 0 12 100 10 1 0.1 1 10 100 IF - Drain Current - A VGS - Gate to Source Voltage - V di/dt = 100 A/ µ s VGS = 0 V 14 Data Sheet G15781EJ1V0DS 9 µPA2751GR B) CH2 DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TOTAL POWER DISSIPATION vs. AMBIENT TEMPERATURE PT - Total Power Dissipation - W/package 120 2.8 2.4 2.0 1.6 1.2 0.8 0.4 0 0 20 40 60 80 100 120 140 160 TA - Ambient Temperature - ˚C 2 unit 1 unit Mounted on ceramic substrate of 2000 mm2 × 2.2 mm dT - Percentage of Rated Power - % 100 80 60 40 20 0 0 20 40 60 80 100 120 140 160 TA - Ambient Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA 100 on S( RD GS ) d ite Lim V) 10 = ID(pulse) PW 1m =1 ID - Drain Current - A 10 (V ID(DC) Po we r 10 s 00 µs 10 Dis sip ati 0m ms s 1 on Lim ite d 0.1 Mounted on2ceramic substrate of 2000 mm x 2.2 mm Single Pulse, 1 unit TA = 25˚C Single Pulse 0.01 0.1 1 10 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH rth(t) - Transient Thermal Resistance - ˚C/W 1000 Mounted on ceramic substrate 2 of 2000 mm x 2.2 mm Single Pulse, 1 unit TA = 25˚C 100 Rth(ch-A) = 73.5˚C/W 10 1 0.1 0.0001 0.001 0.01 0.1 1 10 100 1000 PW - Pulse Width - s 10 Data Sheet G15781EJ1V0DS µPA2751GR B) CH2 SINGLE AVALANCHE ENERGY vs. INDUCTIVE LOAD 100 RG = 25 Ω VDD = 15 V 0V VGS = 20 Starting Tch = 25˚C 120 SINGLE AVALANCHE ENERGY DERATING FACTOR RG = 25 9 VDD = 15 V 0V VGS = 20 IAS 8 A IAS - Single Avalanche Energy - A Energy Derating Factor - % 100 80 60 40 20 0 25 50 75 10 IAS = 8 A EAS = 6.4 mJ 1 10 µ 100 µ 1m 10 m 100 125 150 L - Inductive Load - H Starting Tch - Starting Channel Temperature - ˚C Data Sheet G15781EJ1V0DS 11 µPA2751GR • The information in this document is current as of March, 2002. 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