74LV244N,112

74LV244 Octal buffer/line driver; 3-state Rev. 03 — 28 September 2007 Product data sheet 1. General description The 74LV244 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC244 and 74HCT244. The 74LV244 has octal non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. The 74LV244 is identical to the 74LV240 but has non-inverting outputs. 2. Features ■ ■ ■ ■ ■ Wide operating voltage: 1.0 V to 5.5 V Optimized for low voltage applications: 1.0 V to 3.6 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C ■ ESD protection: ◆ HBM JESD22-A114E exceeds 2000 V ◆ MM JESD22-A115-A exceeds 200 V ■ Multiple package options ■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LV244N −40 °C to +125 °C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1 74LV244D −40 °C to +125 °C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 74LV244DB −40 °C to +125 °C SSOP20 plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1 74LV244PW −40 °C to +125 °C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 74LV244BQ −40 °C to +125 °C DHVQFN20 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 × 4.5 × 0.85 mm SOT764-1 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state 4. Functional diagram 2 4 6 8 1 17 15 13 11 19 1A0 1Y0 1A1 1Y1 1A2 1Y2 1A3 1Y3 18 16 14 12 1OE 2A0 2Y0 2A1 2Y1 2A2 2Y2 2A3 2Y3 3 5 7 9 2OE mna170 Fig 1. Functional diagram 1 1A0 1A1 1A2 2 18 4 16 6 14 8 12 1Y0 1Y1 1Y2 2A0 2A1 2A2 17 3 15 5 13 7 11 9 2Y0 2Y1 2 18 4 16 6 14 8 12 2Y2 19 1A3 1OE 1 1Y3 2A3 2OE EN EN 2Y3 19 mna874 11 9 13 7 15 5 17 3 mna873 Fig 2. Logic symbol Fig 3. IEC logic symbol 74LV244_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 2 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state 5. Pinning information 1 terminal 1 index area 1A0 2 19 2OE 2Y0 3 18 1Y0 4 17 2A0 1 20 VCC 1A0 2 19 2OE 2Y1 5 2Y0 3 18 1Y0 1A2 6 1A1 4 17 2A0 2Y1 5 16 1Y1 2Y2 7 1A2 6 2Y2 7 14 1Y2 1A3 8 13 2A2 2Y3 9 12 1Y3 GND 10 11 2A3 1A3 8 2Y3 9 16 1Y1 15 2A1 14 1Y2 VCC(1) 13 2A2 12 1Y3 GND 10 15 2A1 244 2A3 11 1OE 1A1 244 20 VCC 1OE 5.1 Pinning Transparent top view (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 4. Pin configuration DIP20, SO20, (T)SSOP20 Fig 5. Pin configuration DHVQFN20 5.2 Pin description Table 2: Pin description Symbol Pin Description 1OE 1 output enable input (active LOW) 1A[0:3] 2, 4, 6, 8 data input 2A[0:3] 17, 15, 13, 11 data input 1Y[0:3] 18, 16, 14, 12 data output 2Y[0:3] 3, 5, 7, 9 data output GND 10 ground (0 V) 2OE 19 output enable input (active LOW) VCC 20 supply voltage 74LV244_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 3 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state 6. Functional description Table 3: Function table[1] Control Input Output nOE nAn nYn L L L L H H H X Z [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage Conditions Min Max Unit −0.5 +7.0 V - ±20 mA - ±50 mA - ±35 mA mA IIK input clamping current VI < −0.5 V or VI > VCC + 0.5 V [1] IOK output clamping current VO < −0.5 V or VO > VCC + 0.5 V [1] IO output current VO = −0.5 V to (VCC + 0.5 V) ICC supply current - 70 IGND ground current −70 - mA Tstg storage temperature −65 +150 °C Ptot total power dissipation [1] Tamb = −40 °C to +125 °C DIP20 package [2] - 750 mW SO20 package [3] - 500 mW (T)SSOP20 package [4] - 500 mW DHVQFN20 package [5] - 500 mW The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] Ptot derates linearly with 12 mW/K above 70 °C. [3] Ptot derates linearly with 8 mW/K above 70 °C. [4] Ptot derates linearly with 5.5 mW/K above 60 °C. [5] Ptot derates linearly with 4.5 mW/K above 60 °C. 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions voltage[1] Min Typ Max Unit VCC supply 1.0 3.3 5.5 V VI input voltage 0 - VCC V VO output voltage 0 - VCC V 74LV244_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 4 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state Table 5. Recommended operating conditions …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter Tamb ambient temperature ∆t/∆V input transition rise and fall rate [1] Conditions Min Typ Max Unit −40 +25 +125 °C VCC = 1.0 V to 2.0 V - - 500 ns/V VCC = 2.0 V to 2.7 V - - 200 ns/V VCC = 2.7 V to 3.6 V - - 100 ns/V VCC = 3.6 V to 5.5 V - - 50 ns/V The static characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V, but LV devices are guaranteed to function down to VCC = 1.0 V (with input levels GND or VCC). 9. Static characteristics Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH VIL VOH VOL II HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage input leakage current Conditions −40 °C to +85 °C Min Max Min Max VCC = 1.2 V 0.9 - - 0.9 - V VCC = 2.0 V 1.4 - - 1.4 - V VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V VCC = 4.5 V to 5.5 V 0.7VCC - - 0.7VCC - V VCC = 1.2 V - - 0.3 - 0.3 V VCC = 2.0 V - - 0.6 - 0.6 V VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V VCC = 4.5 V to 5.5 V - - 0.3VCC - 0.3VCC V VI = VIH or VIL lO = −100 µA; VCC = 1.2 V - 1.2 - - - V lO = −100 µA; VCC = 2.0 V 1.8 2.0 - 1.8 - V lO = −100 µA; VCC = 2.7 V 2.5 2.7 - 2.5 - V lO = −100 µA; VCC = 3.0 V 2.8 3.0 - 2.8 - V lO = −100 µA; VCC = 4.5 V 4.3 4.5 - 4.3 - V lO = −8 mA; VCC = 3.0 V 2.4 2.82 - 2.2 - V lO = −16 mA; VCC = 4.5 V 3.6 4.2 - 3.5 - V VI = VIH or VIL IO = 100 µA; VCC = 1.2 V - 0 - - - V IO = 100 µA; VCC = 2.0 V - 0 0.2 - 0.2 V IO = 100 µA; VCC = 2.7 V - 0 0.2 - 0.2 V IO = 100 µA; VCC = 3.0 V - 0 0.2 - 0.2 V IO = 100 µA; VCC = 4.5 V - 0 0.2 - 0.2 V IO = 8 mA; VCC = 3.0 V - 0.25 0.40 - 0.50 V IO = 16 mA; VCC = 4.5 V - 0.35 0.55 - 0.65 V - - 1.0 - 1.0 µA VI = VCC or GND; VCC = 5.5 V 74LV244_3 Product data sheet −40 °C to +125 °C Unit Typ[1] © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 5 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state Table 6. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter −40 °C to +85 °C Conditions −40 °C to +125 °C Unit Min Typ[1] Max Min Max IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V - - 5 - 10 µA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 20 - 160 µA ∆ICC additional supply current per input; VI = VCC − 0.6 V; VCC = 2.7 V to 3.6 V - - 500 - 850 µA CI input capacitance - 3.5 - - - pF [1] Typical values are measured at Tamb = 25 °C. 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; For test circuit see Figure 8. Symbol Parameter tpd propagation delay −40 °C to +85 °C Conditions Min Typ[1] VCC = 1.2 V - VCC = 2.0 V - nAn to nYn; see Figure 6 50 - - - ns 17 24 - 31 ns 17 - 23 ns VCC = 3.0 V to 3.6 V; CL = 15 pF - 8 - - - ns VCC = 3.0 V to 3.6 V [3] - 9 14 - 18 ns - - 12 - 15 ns VCC = 1.2 V - 65 - - - ns VCC = 2.0 V - 22 39 - 49 ns VCC = 2.7 V - 16 29 - 36 ns - 12 23 - 29 ns - - 19 - 24 ns VCC = 1.2 V - 60 - - - ns VCC = 2.0 V - 22 34 - 43 ns - 17 24 - 32 ns - 13 21 - 26 ns - - 16 - 19 ns nOE to nYn; see Figure 7 [2] [3] nOE to nYn; see Figure 7 [2] VCC = 2.7 V VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V [3] 74LV244_3 Product data sheet Max 13 VCC = 4.5 V to 5.5 V disable time Min - VCC = 3.0 V to 3.6 V tdis Max [3] VCC = 4.5 V to 5.5 V enable time Unit [2] VCC = 2.7 V ten −40 °C to +125 °C © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 6 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state Table 7. Dynamic characteristics …continued GND = 0 V; For test circuit see Figure 8. Symbol Parameter CPD power dissipation capacitance −40 °C to +85 °C Conditions [4] CL = 50 pF; fi = 1 MHz; VI = GND to VCC [1] All typical values are measured at Tamb = 25 °C. [2] tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [3] Typical values are measured at nominal supply voltage (VCC = 3.3 V). [4] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi × N + Σ(CL × VCC2 × fo) where: fi = input frequency in MHz, fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in Volts N = number of inputs switching Σ(CL × VCC2 × fo) = sum of the outputs. −40 °C to +125 °C Min Typ[1] Max Min Max - 35 - - - Unit pF 11. Waveforms VI nAn input VM VM GND tPLH tPHL VOH VM nYn output VOL VM mna171 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. The input (nAn) to output (nYn) propagation delays 74LV244_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 7 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state VI nOE input VM GND tPLZ tPZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL tPHZ VOH tPZH VY output HIGH-to-OFF OFF-to-HIGH GND VM outputs enabled outputs enabled outputs disabled mna362 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 7. enable and disable times Table 8: Measurement points Supply voltage Input Output VCC VM VM VX VY < 2.7 V 0.5VCC 0.5VCC VOL + 0.1VCC VOH − 0.1VCC 2.7 V to 3.6 V 1.5 V 1.5 V VOL + 0.3 V VOH − 0.3 V ≥ 4.5 V 0.5VCC 0.5VCC VOL + 0.1VCC VOH − 0.1VCC 74LV244_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 8 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state VEXT VCC VI RL VO G DUT RT CL RL mna616 Test data is given in Table 9. Definitions test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 8. Load circuit for switching times Table 9: Test data Supply voltage Input Load VEXT VCC VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ < 2.7 V VCC ≤ 2.5 ns 50 pF 1 kΩ open GND 2VCC 2.7 V to 3.6 V 2.7 V ≤ 2.5 ns 15 pF, 50 pF 1 kΩ open GND 2VCC ≥ 4.5 V VCC ≤ 2.5 ns 50 pF 1 kΩ open GND 2VCC 74LV244_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 9 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state 12. Package outline DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1 ME seating plane D A2 A A1 L c e Z b1 w M (e 1) b MH 11 20 pin 1 index E 1 10 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 c mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 0.36 0.23 26.92 26.54 inches 0.17 0.02 0.13 0.068 0.051 0.021 0.015 0.014 0.009 1.060 1.045 D e e1 L ME MH w Z (1) max. 6.40 6.22 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 2 0.25 0.24 0.1 0.3 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.078 (1) E (1) Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION SOT146-1 REFERENCES IEC JEDEC JEITA MS-001 SC-603 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-13 Fig 9. Package outline SOT146-1 (DIP20) 74LV244_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 10 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index θ Lp L 10 1 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 inches 0.1 0.012 0.096 0.004 0.089 0.043 0.039 0.01 0.01 Z (1) 0.9 0.4 0.035 0.004 0.016 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 10. Package outline SOT163-1 (SO20) 74LV244_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 11 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm D SOT339-1 E A X c HE y v M A Z 20 11 Q A2 A (A 3) A1 pin 1 index θ Lp L 1 10 w M bp e detail X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 7.4 7.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 0.9 0.5 8 o 0 o Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION SOT339-1 REFERENCES IEC JEDEC JEITA MO-150 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 11. Package outline SOT339-1 (SSOP20) 74LV244_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 12 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 E D A X c HE y v M A Z 11 20 Q A2 (A 3) A1 pin 1 index A θ Lp L 1 10 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC JEITA MO-153 EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 12. Package outline SOT360-1 (TSSOP20) 74LV244_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 13 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT764-1 20 terminals; body 2.5 x 4.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 9 y y1 C v M C A B w M C b L 1 10 Eh e 20 11 19 12 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.18 c D (1) Dh E (1) Eh 0.2 4.6 4.4 3.15 2.85 2.6 2.4 1.15 0.85 e 0.5 e1 L v w y y1 3.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT764-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 13. Package outline SOT764-1 (DHVQFN20) 74LV244_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 14 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state 13. Abbreviations Table 10. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LV244_3 20070928 Product data sheet - 74LV244_2 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • • • Legal texts have been adapted to the new company name when appropiate. Section 3: DHVQFN20 package added. Section 8: derating values added for DHVQFN20 package. Section 12: outline drawing added for DHVQFN20 package. 74LV244_2 19980520 Product specification - 74LV244_1 74LV244_1 19970219 Product specification - - 74LV244_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 15 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state 15. Legal information 15.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 15.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 16. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com 74LV244_3 Product data sheet © NXP B.V. 2007. All rights reserved. Rev. 03 — 28 September 2007 16 of 17 74LV244 NXP Semiconductors Octal buffer/line driver; 3-state 17. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 15.1 15.2 15.3 15.4 16 17 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 5 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information. . . . . . . . . . . . . . . . . . . . . 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 28 September 2007 Document identifier: 74LV244_3