HEF4053BP,652

HEF4053B Triple single-pole double-throw analog switch Rev. 13 — 21 December 2021 Product data sheet 1. General description The HEF4053B is a triple single-pole double-throw analog switch (3x SPDT) suitable for use in analog or digital 2:1 multiplexer/demultiplexer applications. Each switch features a digital select input (Sn), two independent inputs/outputs (Y0 and Y1) and a common input/output (Z). A digital enable input (E) is common to all switches. When E is HIGH, the switches are turned off. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VDD. 2. Features and benefits • • • • • • • • • Wide supply voltage range from 3.0 V to 15.0 V CMOS low power dissipation High noise immunity Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Complies with JEDEC standard JESD 13-B ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-B exceeds 200 V Specified from -40 °C to +125 °C 3. Applications • • • Analog multiplexing and demultiplexing Digital multiplexing and demultiplexing Signal gating 4. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version HEF4053BT -40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 HEF4053BTT -40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 HEF4053B Nexperia Triple single-pole double-throw analog switch 5. Functional diagram E 6 VDD 16 13 1Y1 S1 11 LOGIC LEVEL CONVERSION 12 1Y0 DECODER 14 1Z 1 2Y1 S2 10 ` 11 S1 1Y0 12 10 S2 1Y1 13 9 S3 1Z 14 2Y0 2 2Y1 1 2Z 15 3Y0 5 3Y1 3 3Z 4 6 E LOGIC LEVEL CONVERSION 15 2Z 3 3Y1 S3 9 LOGIC LEVEL CONVERSION 5 3Y0 4 3Z 8 VSS 001aae125 Fig. 1. 2 2Y0 Logic symbol Fig. 2. 7 VEE 001aae124 Functional diagram nZ nY1 Sn LEVEL CONVERTER nY0 E LEVEL CONVERTER to other multiplexers/demultiplexers 001aae645 Fig. 3. Logic diagram (one multiplexer/demultiplexer) HEF4053B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Nexperia B.V. 2021. All rights reserved 2 / 16 HEF4053B Nexperia Triple single-pole double-throw analog switch nYn VDD VEE from decoder and enable logic Fig. 4. VDD nZ 001aae644 Schematic diagram (one switch) 6. Pinning information 6.1. Pinning HEF4053B 2Y1 1 16 VDD 2Y0 2 15 2Z 3Y1 3 14 1Z 3Z 4 13 1Y1 3Y0 5 12 1Y0 E 6 11 S1 VEE 7 10 S2 VSS 8 9 HEF4053B S3 2Y1 1 2Y0 2 16 VDD 15 2Z 3Y1 3 14 1Z 3Z 4 13 1Y1 3Y0 5 12 1Y0 E 6 11 S1 VEE 7 10 S2 VSS 8 9 001aae643 Fig. 5. S3 001aaj899 Pin configuration for SOT109-1 (SO16) Fig. 6. Pin configuration for SOT403-1 (TSSOP16) 6.2. Pin description Table 2. Pin description Symbol Pin Description E 6 enable input (active LOW) VEE 7 supply voltage VSS 8 ground supply voltage S1, S2, S3 11, 10, 9 select input 1Y0, 2Y0, 3Y0 12, 2, 5 independent input or output 1Y1, 2Y1, 3Y1 13, 1, 3 independent input or output 1Z, 2Z, 3Z 14, 15, 4 independent output or input VDD 16 supply voltage HEF4053B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Nexperia B.V. 2021. All rights reserved 3 / 16 HEF4053B Nexperia Triple single-pole double-throw analog switch 7. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care. Inputs Channel on E Sn L L nY0 to nZ L H nY1 to nZ H X switches OFF 8. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground). Symbol Parameter Max Unit VDD supply voltage VEE supply voltage referenced to VDD -0.5 +18 V -18 +0.5 V IIK input clamping current pins Sn and E; VI < -0.5 V or VI > VDD + 0.5 V - ±10 mA VI input voltage II/O input/output current -0.5 VDD + 0.5 - ±10 mA IDD supply current - 50 mA Tstg storage temperature -65 +150 °C Tamb ambient temperature -40 +125 °C Ptot total power dissipation Tamb = -40 °C to +125 °C - 500 mW P power dissipation per output - 100 mW [1] [2] Conditions Min [1] [2] V To avoid drawing VDD current out of terminal Z, when switch current flows into terminals Y, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal Z, no VDD current will flow out of terminals Y, and in this case there is no limit for the voltage drop across the switch, but the voltages at Y and Z may not exceed VDD or VEE. For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C. For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C. 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions VDD supply voltage VI input voltage Tamb ambient temperature Δt/ΔV input transition rise and fall rate HEF4053B Product data sheet Min Typ Max 3 - 15 V 0 - VDD V in free air -40 - +125 °C VDD = 5 V - - 3.75 μs/V VDD = 10 V - - 0.5 μs/V VDD = 15 V - - 0.08 μs/V see Fig. 7 All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Unit Nexperia B.V. 2021. All rights reserved 4 / 16 HEF4053B Nexperia Triple single-pole double-throw analog switch 001aae646 15 VDD - VSS (V) 10 operating area 5 0 Fig. 7. 0 5 10 VDD - VEE (V) 15 Operating area as a function of the supply voltages 10. Static characteristics Table 6. Static characteristics VSS = VEE = 0 V; VI = VSS or VDD unless otherwise specified. Symbol Parameter Conditions VDD Min Max Min Max Min Max Min Max VIH |IO| < 1 μA 5V 3.5 - 3.5 - 3.5 - 3.5 - V 10 V 7.0 - 7.0 - 7.0 - 7.0 - V 15 V 11.0 - 11.0 - 11.0 - 11.0 - V 5V - 1.5 - 1.5 - 1.5 - 1.5 V 10 V - 3.0 - 3.0 - 3.0 - 3.0 V 15 V - 4.0 - 4.0 - 4.0 - 4.0 V 15 V - ±0.1 - ±0.1 - ±1.0 - ±1.0 μA Z port; 15 V all channels OFF; see Fig. 8 - - - 1000 - - - - nA Y port; per channel; see Fig. 9 15 V - - - 200 - - - - nA 5V - 5 - 5 - 150 - 150 μA 10 V - 10 - 10 - 300 - 300 μA 15 V - 20 - 20 - 600 - 600 μA - - - - 7.5 - - - - pF VIL HIGH-level input voltage LOW-level input voltage II input leakage current IS(OFF) OFF-state leakage current IDD CI |IO| < 1 μA supply current IO = 0 A input capacitance HEF4053B Product data sheet Sn, E inputs Tamb = -40 °C Tamb = +25 °C Tamb = +85 °C Tamb = +125 °C Unit All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Nexperia B.V. 2021. All rights reserved 5 / 16 HEF4053B Nexperia Triple single-pole double-throw analog switch 10.1. Test circuits VDD VDD or VSS IS S1 to S3 nY0 1 nZ nY1 2 switch E VSS = VEE VDD VO VI 001aaj900 Fig. 8. Test circuit for measuring OFF-state leakage current Z port VDD VDD or VSS S1 to S3 nY0 1 nZ nY1 2 switch IS E VSS = VEE VSS VI VO 001aaj901 Fig. 9. Test circuit for measuring OFF-state leakage current nYn port 10.2. ON resistance Table 7. ON resistance Tamb = 25 °C; ISW = 200 μA; VSS = VEE = 0 V. Symbol Parameter Conditions VDD − VEE Typ Max Unit RON(peak) ON resistance (peak) VI = 0 V to VDD - VEE; see Fig. 10 and Fig. 11 5V 350 2500 Ω 10 V 80 245 Ω 15 V 60 175 Ω 5V 115 340 Ω 10 V 50 160 Ω 15 V 40 115 Ω 5V 120 365 Ω 10 V 65 200 Ω 15 V 50 155 Ω 5V 25 - Ω 10 V 10 - Ω 15 V 5 - Ω RON(rail) ON resistance (rail) VI = 0 V; see Fig. 10 and Fig. 11 VI = VDD - VEE; see Fig. 10 and Fig. 11 ΔRON ON resistance mismatch between channels HEF4053B Product data sheet VI = 0 V to VDD - VEE; see Fig. 10 All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Nexperia B.V. 2021. All rights reserved 6 / 16 HEF4053B Nexperia Triple single-pole double-throw analog switch 10.2.1. ON resistance waveform and test circuit V VDD VDD or VSS VSW S1 to S3 nY0 1 nZ nY1 2 switch E VSS = VEE VSS ISW VI 001aaj902 RON = VSW / ISW. Fig. 10. Test circuit for measuring RON 001aae648 400 RON (Ω) VDD = 5 V 300 200 10 V 100 0 15 V 0 5 10 VI (V) 15 Fig. 11. Typical RON as a function of input voltage HEF4053B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Nexperia B.V. 2021. All rights reserved 7 / 16 HEF4053B Nexperia Triple single-pole double-throw analog switch 11. Dynamic characteristics Table 8. Dynamic characteristics Tamb = 25 °C; VSS = VEE = 0 V; for test circuit see Fig. 15. Symbol Parameter Conditions tPHL HIGH to LOW propagation delay nYn, nZ to nZ, nYn; see Fig. 12 Sn to nYn, nZ; see Fig. 13 tPLH LOW to HIGH propagation delay nYn, nZ to nZ, nYn; see Fig. 12 Sn to nYn, nZ; see Fig. 13 tPHZ HIGH to OFF-state propagation delay tPZH tPLZ tPZL E to nYn, nZ; see Fig. 14 OFF-state to HIGH propagation delay E to nYn, nZ; see Fig. 14 LOW to OFF-state propagation delay E to nYn, nZ; see Fig. 14 OFF-state to LOW propagation delay E to nYn, nZ; see Fig. 14 VDD Typ Max Unit 5V 10 20 ns 10 V 5 10 ns 15 V 5 10 ns 5V 200 400 ns 10 V 85 170 ns 15 V 65 130 ns 5V 15 30 ns 10 V 5 10 ns 15 V 5 10 ns 5V 275 555 ns 10 V 100 200 ns 15 V 65 130 ns 5V 200 400 ns 10 V 115 230 ns 15 V 110 220 ns 5V 260 525 ns 10 V 95 190 ns 15 V 65 130 ns 5V 200 400 ns 10 V 120 245 ns 15 V 110 215 ns 5V 280 565 ns 10 V 105 205 ns 15 V 70 140 ns 11.1. Waveforms and test circuit VDD nYn or nZ input VM VDD Sn input VEE tPLH tPHL VO nZ or nYn output nYn or nZ output VM VEE Fig. 12. nYn, nZ to nZ, nYn propagation delays Product data sheet VO VEE 001aac290 Measurement points are given in Table 9. HEF4053B VM VSS tPLH tPHL 90 % 10 % switch OFF switch ON switch OFF 001aac291 Measurement points are given in Table 9. Fig. 13. Sn to nYn, nZ propagation delays All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Nexperia B.V. 2021. All rights reserved 8 / 16 HEF4053B Nexperia Triple single-pole double-throw analog switch VDD E input VM VSS tPLZ nYn or nZ output LOW-to-OFF OFF-to-LOW tPZL VO 90 % 10 % VEE tPHZ nYn or nZ output HIGH-to-OFF OFF-to-HIGH tPZH VO 90 % 10 % VEE switch ON switch OFF switch ON 001aac292 Measurement points are given in Table 9. Fig. 14. Enable and disable times Table 9. Measurement points Supply voltage Input Output VDD VM VM 5 V to 15 V 0.5VDD 0.5VDD VI negative pulse 0V tW 90 % VM tf tr tr VI positive pulse 0V VM 10 % tf 90 % 10 % VM VM tW VDD VDD VI PULSE GENERATOR VI DUT RT VO RL S1 open CL VSS VEE 001aaj903 Test data is given in Table 10. Definitions: RT = Termination resistance should be equal to output impedance Zo of the pulse generator; CL = Load capacitance including test jig and probe; RL = Load resistance. Fig. 15. Test circuit for measuring switching times Table 10. Test data Input nYn, nZ Sn and E Load tr, tf VDD or VEE VDD or VSS ≤ 20 ns [1] S1 position VM CL RL tPHL [1] 0.5VDD 50 pF 10 kΩ VDD or VEE VEE tPLH tPZH, tPHZ tPZL, tPLZ other VEE VDD VEE For nYn to nZ or nZ to nYn propagation delays use VEE. For Sn to nYn or nZ propagation delays use VDD. HEF4053B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Nexperia B.V. 2021. All rights reserved 9 / 16 HEF4053B Nexperia Triple single-pole double-throw analog switch 11.2. Additional dynamic parameters Table 11. Additional dynamic characteristics VSS = VEE = 0 V; Tamb = 25 °C. Symbol Parameter Conditions THD total harmonic distortion f(-3dB) -3 dB frequency response VDD Typ Max see Fig. 16; RL = 10 kΩ; CL = 15 pF; channel ON; VI = 0.5VDD (p-p); fi = 1 kHz [1] 5 V 0.25 - % 10 V 0.04 - % 15 V 0.04 - % see Fig. 17; RL = 1 kΩ; CL = 5 pF; channel ON; VI = 0.5VDD (p-p) [1] 5 V αiso isolation (OFF-state) see Fig. 18; fi = 1 MHz; RL = 1 kΩ; CL = 5 pF; channel OFF; VI = 0.5VDD (p-p) Vct crosstalk voltage digital inputs to switch; see Fig. 19; RL = 10 kΩ; CL = 15 pF; E or Sn = VDD (square-wave) Xtalk crosstalk between switches; see Fig. 20; fi = 1 MHz; RL = 1 kΩ;VI = 0.5VDD (p-p) [1] Unit 13 - MHz 10 V 40 - MHz 15 V 70 - MHz [1] 10 V -50 - dB 10 V 50 - mV [1] 10 V -50 - dB fi is biased at 0.5 VDD; VI = 0.5VDD (p-p). Table 12. Dynamic power dissipation PD can be calculated from the formulas shown; VEE = VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C. Symbol PD Parameter dynamic power dissipation VDD Typical formula for PD (μW) where: 5V PD = 2500 × fi + Σ(fo × CL) × VDD 2 10 V PD = 11500 × fi + Σ(fo × CL) × VDD 15 V PD = 29000 × fi + Σ(fo × CL) × VDD fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VDD = supply voltage in V; Σ(CL × fo) = sum of the outputs. 2 2 11.2.1. Test circuits VDD VDD VDD or VSS S1 to S3 nY0 1 nZ nY1 2 switch VDD or VSS E VSS = VEE VSS RL CL S1 to S3 nY0 1 nZ nY1 2 E D VSS = VEE VSS fi switch RL CL dB fi 001aaj904 Fig. 16. Test circuit for measuring total harmonic distortion HEF4053B Product data sheet 001aaj905 Fig. 17. Test circuit for measuring frequency response All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Nexperia B.V. 2021. All rights reserved 10 / 16 HEF4053B Nexperia Triple single-pole double-throw analog switch VDD VDD or VSS S1 to S3 nY0 1 nZ nY1 2 switch E VSS = VEE VSS RL dB CL fi 001aaj906 Fig. 18. Test circuit for measuring isolation (OFF-state) 0.5VDD VDD RL G 0.5VDD S1 to S3 nY0 1 nZ nY1 2 RL switch E VSS = VEE VDD or VSS V CL VO 001aaj907 a. Test circuit logic input (Sn, E) off on off VO Vct 001aaj908 b. Input and output pulse definitions Fig. 19. Test circuit for measuring crosstalk voltage between digital inputs and switch VDD VDD VDD or VSS S1 to S3 nY0 nZ nY1 VDD or VSS S1 to S3 nY0 nZ nY1 E E VSS = VEE VSS RL VO RL VSS = VEE VSS RL VI RL VO 001aaj910 001aaj909 a. Switch closed condition VI b. Switch open condition Fig. 20. Test circuit for measuring crosstalk between switches HEF4053B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Nexperia B.V. 2021. All rights reserved 11 / 16 HEF4053B Nexperia Triple single-pole double-throw analog switch 12. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e w M bp 0 2.5 detail X 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 inches 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.16 0.15 0.05 0.039 0.016 0.028 0.020 0.01 0.01 0.004 0.028 0.012 0.244 0.041 0.228 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig. 21. Package outline SOT109-1 (SO16) HEF4053B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Nexperia B.V. 2021. All rights reserved 12 / 16 HEF4053B Nexperia Triple single-pole double-throw analog switch TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm D SOT403-1 E A X c y HE v M A Z 9 16 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 8 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig. 22. Package outline SOT403-1 (TSSOP16) HEF4053B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Nexperia B.V. 2021. All rights reserved 13 / 16 HEF4053B Nexperia Triple single-pole double-throw analog switch 13. Abbreviations Table 13. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 14. Revision history Table 14. Revision history Document ID Release date Data sheet status Change notice Supersedes HEF4053B v.13 20211221 Product data sheet - HEF4053B v.12 Modifications: • • • • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Section 1 and Section 2 updated. Table 4: Derating values for Ptot total power dissipation updated. Table 13 updated. HEF4053B v.12 20160325 Modifications: • HEF4053B v.11 20140911 Modifications: • HEF4053B v.10 20111117 Modifications: • • HEF4053B v.9 20100325 Product data sheet - HEF4053B v.8 HEF4053B v.8 20100224 Product data sheet - HEF4053B v.7 HEF4053B v.7 20091127 Product data sheet - HEF4053B v.6 HEF4053B v.6 20090924 Product data sheet - HEF4053B v.5 HEF4053B v.5 20090825 Product data sheet - HEF4053B v.4 HEF4053B v.4 20090713 Product data sheet - HEF4053B_CNV v.3 HEF4053B_CNV v.3 19950101 Product specification - HEF4053B_CNV v.2 HEF4053B_CNV v.2 19950101 Product specification - - HEF4053B Product data sheet Product data sheet - HEF4053B v.11 Type number HEF4053BP (SOT38-4) removed. Product data sheet - HEF4053B v.10 - HEF4053B v.9 Fig. 19: Test circuit modified Product data sheet Legal pages updated. Changes in Section 1, Section 2, and Section 3. All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Nexperia B.V. 2021. All rights reserved 14 / 16 HEF4053B Nexperia Triple single-pole double-throw analog switch 15. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. 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Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal HEF4053B Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. 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Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Nexperia B.V. 2021. All rights reserved 15 / 16 HEF4053B Nexperia Triple single-pole double-throw analog switch Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Applications.................................................................. 1 4. Ordering information....................................................1 5. Functional diagram.......................................................2 6. Pinning information......................................................3 6.1. Pinning.........................................................................3 6.2. Pin description............................................................. 3 7. Functional description................................................. 4 8. Limiting values............................................................. 4 9. Recommended operating conditions..........................4 10. Static characteristics..................................................5 10.1. Test circuits................................................................6 10.2. ON resistance............................................................6 10.2.1. ON resistance waveform and test circuit................ 7 11. Dynamic characteristics.............................................8 11.1. Waveforms and test circuit........................................ 8 11.2. Additional dynamic parameters................................10 11.2.1. Test circuits........................................................... 10 12. Package outline........................................................ 12 13. Abbreviations............................................................ 14 14. Revision history........................................................14 15. Legal information......................................................15 © Nexperia B.V. 2021. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 21 December 2021 HEF4053B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 13 — 21 December 2021 © Nexperia B.V. 2021. All rights reserved 16 / 16