74ACT00SCX

Revised February 2005 74AC00 • 74ACT00 Quad 2-Input NAND Gate General Description Features The AC/ACT00 contains four 2-input NAND gates. ■ ICC reduced by 50% ■ Outputs source/sink 24 mA ■ ACT00 has TTL-compatible inputs Ordering Code: Order Number Package Package Description Number 74AC00SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74AC00SCX_NL M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74AC00SJ 74AC00MTC 74AC00PC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 74AC00PC_NL N14A Pb-Free 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 74ACT00SC M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74ACT00SCX_NL M14A Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow M14D Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74ACT00SJ 74ACT00MTC 74ACT00PC MTC14 N14A 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering form. PC not available in Tape and Reel. Pb-Free package per JEDEC J-STD-020B. Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Use this number to order device. Logic Symbol Connection Diagram IEEE/IEC Pin Descriptions Pin Names Description An, Bn Inputs On Outputs FACT¥ is a trademark of Fairchild Semiconductor Corporation. © 2005 Fairchild Semiconductor Corporation DS009911 www.fairchildsemi.com 74AC00 • 74ACT00 Quad 2-Input NAND Gate November 1988 74AC00 • 74ACT00 Absolute Maximum Ratings(Note 2) Recommended Operating Conditions 0.5V to 7.0V Supply Voltage (VCC) DC Input Diode Current (IIK) VI VI 0.5V VCC  0.5V DC Input Voltage (VI) Supply Voltage (VCC) 20 mA 20 mA 0.5V to VCC  0.5V DC Output Diode Current (IOK) VO VO 0.5V VCC  0.5V DC Output Voltage (VO) 20 mA 20 mA 0.5V to VCC  0.5V per Output Pin (ICC or IGND) 0V to VCC Output Voltage (VO) 0V to VCC 40qC to 85qC Operating Temperature (TA) AC Devices VIN from 30% to 70% of VCC r50 mA VCC @ 3.3V, 4.5V, 5.5V 125 mV/ns Minimum Input Edge Rate ('V/'t) r50 mA 65qC to 150qC ACT Devices VIN from 0.8V to 2.0V Junction Temperature (TJ) VCC @ 4.5V, 5.5V 140qC PDIP 4.5V to 5.5V Minimum Input Edge Rate ('V/'t) DC VCC or Ground Current Storage Temperature (TSTG) 2.0V to 6.0V ACT Input Voltage (VI) DC Output Source or Sink Current (IO) AC 125 mV/ns Note 2: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT¥ circuits outside databook specifications. DC Electrical Characteristics for AC Symbol VIH VIL VOH VOL Parameter VCC TA 25qC 40qC to 85qC Typ Guaranteed Limits Minimum HIGH Level 3.0 1.5 2.1 2.1 Input Voltage 4.5 2.25 3.15 3.15 5.5 2.75 3.85 3.85 Maximum LOW Level 3.0 1.5 0.9 0.9 Input Voltage 4.5 2.25 1.35 1.35 5.5 2.75 1.65 1.65 Minimum HIGH Level 3.0 2.99 2.9 2.9 Output Voltage 4.5 4.49 4.4 4.4 5.5 5.49 5.4 5.4 3.0 2.56 2.46 4.5 3.86 3.76 5.5 4.86 4.76 0.002 0.1 0.1 Maximum LOW Level 3.0 Output Voltage 4.5 0.001 0.1 0.1 5.5 0.001 0.1 0.1 0.36 0.44 3.0 IIN TA (V) Maximum Input Units Conditions VOUT V VOUT or VCC  0.1V V IOUT 50 PA V V V VIN VIL or VIH IOH 12 mA IOH 24 mA IOH 24 mA (Note 3) 50 PA IOUT VIN VIL or VIH IOL 12 mA IOL 24 mA 0.36 0.44 5.5 0.36 0.44 5.5 r0.1 r1.0 PA VI IOL 24 mA (Note 3) VCC, GND (Note 4) Leakage Current IOLD Minimum Dynamic 5.5 75 mA VOLD IOHD Output Current (Note 5) 5.5 75 mA VOHD ICC Maximum Quiescent Supply Current 5.5 20.0 PA VIN (Note 4) Note 3: All outputs loaded; thresholds on input associated with output under test. Note 4: IIN and ICC @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V VCC. Note 5: Maximum test duration 2.0 ms, one output loaded at a time. www.fairchildsemi.com 2 0.1V V 4.5 2.0 0.1V or VCC  0.1V 1.65V Max 3.85V Min VCC or GND 74AC00 • 74ACT00 DC Electrical Characteristics for ACT Symbol VIH VIL VOH VOL VCC Parameter TA 25qC 40qC to 85qC TA (V) Typ Guaranteed Limits Minimum HIGH Level 4.5 1.5 2.0 2.0 Input Voltage 5.5 1.5 2.0 2.0 Maximum LOW Level 4.5 1.5 0.8 0.8 Input Voltage 5.5 1.5 0.8 0.8 Minimum HIGH Level 4.5 4.49 4.4 4.4 Output Voltage 5.5 5.49 5.4 5.4 4.5 3.86 3.76 5.5 4.86 4.76 Maximum LOW Level 4.5 0.001 0.1 0.1 Output Voltage 5.5 0.001 0.1 0.1 4.5 0.36 0.44 5.5 0.36 0.44 5.5 r0.1 Units Conditions VOUT V 0.1V or VCC  0.1V VOUT V 0.1V or VCC  0.1V V V V IOUT 50 PA VIN VIL or VIH IOH 24 mA IOH 24 mA (Note 6) 50 PA IOUT VIN VIL or VIH V IOL 24 mA r1.0 PA VI VCC, GND VCC  2.1V IOL 24 mA (Note 6) IIN Maximum Input ICCT Maximum ICC/Input 5.5 1.5 mA VI IOLD Minimum Dynamic 5.5 75 mA VOLD IOHD Output Current (Note 7) 5.5 75 mA VOHD ICC Maximum Quiescent 5.5 20.0 PA VIN Leakage Current 0.6 2.0 Supply Current 1.65V Max 3.85V Min VCC or GND Note 6: All outputs loaded; thresholds on input associated with output under test. Note 7: Maximum test duration 2.0 ms, one output loaded at a time. AC Electrical Characteristics for AC Symbol tPLH Parameter Propagation Delay tPHL Propagation Delay VCC TA 25qC (V) CL 50 pF 40qC to 85qC TA CL 50 pF Units (Note 8) Min Typ Max Min Max 3.3 2.0 7.0 9.5 2.0 10.0 5.0 1.5 6.0 8.0 1.5 8.5 3.3 1.5 5.5 8.0 1.0 8.5 5.0 1.5 4.5 6.5 1.0 7.0 ns ns Note 8: Voltage Range 3.3 is 3.3V r 0.3V Voltage Range 5.0 is 5.0V r 0.5V AC Electrical Characteristics for ACT Symbol Parameter VCC TA 25qC (V) CL 50 pF (Note 9) Min Typ TA 40qC to 85qC CL Max 50 pF Min Max Units tPLH Propagation Delay 5.0 1.5 5.5 9.0 1.0 9.5 ns tPHL Propagation Delay 5.0 1.5 4.0 7.0 1.0 8.0 ns Note 9: Voltage Range 5.0 is 5.0V r0.5V Capacitance Typ Units CIN Symbol Input Capacitance Parameter 4.5 pF VCC Open CPD Power Dissipation Capacitance 30.0 pF VCC 5.0V 3 Conditions www.fairchildsemi.com 74AC00 • 74ACT00 Physical Dimensions inches (millimeters) unless otherwise noted 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M14A www.fairchildsemi.com 4 74AC00 • 74ACT00 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M14D 5 www.fairchildsemi.com 74AC00 • 74ACT00 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC14 www.fairchildsemi.com 6 74AC00 • 74ACT00 Quad 2-Input NAND Gate Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N14A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 7 www.fairchildsemi.com