74ALVC32MX

74ALVC32 Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs Features General Description ■ 1.65V to 3.6V VCC supply operation The ALVC32 contains four 2-input OR gates. This product is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V. ■ 3.6V tolerant inputs and outputs ■ tPD: ■ ■ ■ ■ – 2.8ns max for 3.0V to 3.6V VCC – 3.1ns max for 2.3V to 2.7V VCC – 4.7ns max for 1.65V to 1.95V VCC Power-off high impedance inputs and outputs Uses patented Quiet Series noise/EMI reduction circuitry Latchup conforms to JEDEC JED78 ESD performance: – Human body model > 2000V – Machine model > 250V The ALVC32 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power dissipation. Ordering Information Order Number 74ALVC32M 74ALVC32MTC Package Number M14A MTC14 Package Description 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. Connection Diagram Logic Symbol IEEC/IEC Pin Description Pin Names Description An, Bn Inputs On Outputs ©2001 Fairchild Semiconductor Corporation 74ALVC32 Rev. 1.3.0 www.fairchildsemi.com 74ALVC32 — Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs January 2008 Symbol VCC Parameter Rating −0.5V to +4.6V Supply Voltage VI DC Input Voltage −0.5V to 4.6V VO Output Voltage(1) −0.5V to VCC +0.5V IIK DC Input Diode Current, VI < 0V −50mA IOK DC Output Diode Current, VO < 0V −50mA DC Output Source/Sink Current ±50mA IOH/IOL ±100mA ICC or GND DC VCC or GND Current per Supply Pin TSTG −65°C to +150°C Storage Temperature Range Note: 1. IO Absolute Maximum Rating must be observed, limited to 4.6V. Recommended Operating Conditions(2) The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VCC Parameter Supply Voltage VI Input Voltage VO Output Voltage TA Free Air Operating Temperature ∆V / ∆t Rating 1.65V to 3.6V 0V to VCC 0V to VCC −40°C to +85°C Minimum Input Edge Rate: VIN = 0.8V to 2.0V, VCC = 3.0V 5ns/V Note: 2. Floating or unused control inputs must be held HIGH or LOW. ©2001 Fairchild Semiconductor Corporation 74ALVC32 Rev. 1.3.0 www.fairchildsemi.com 2 74ALVC32 — Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VIH VIL VOH VOL Parameter VCC (V) HIGH Level Input Voltage LOW Level Input Voltage Conditions Min. Max. 1.65–1.95 0.65 x VCC 2.3–2.7 1.7 2.7–3.6 2.0 V 1.65–1.95 0.35 x VCC 2.3–2.7 0.7 2.7–3.6 0.8 HIGH Level Output Voltage 1.65–3.6 LOW Level Output Voltage IOH = −100µA VCC – 0.2 1.65 IOH = −4mA 1.2 2.3 IOH = −6mA 2.0 2.3 IOH = −12mA 1.7 2.7 2.2 3.0 2.4 ICC ∆ICC V V 3.0 IOH = −24mA 1.65–3.6 IOL = 100µA 0.2 1.65 IOL = 4mA 0.45 2.3 IOL = 6mA 0.4 2.3 IOL = 12mA 0.7 2 2.7 II Units V 0.4 3.0 IOL = 24mA 0.55 Input Leakage Current 3.6 0 ≤ VI ≤ 3.6V ±5.0 µA Quiescent Supply Current 3.6 VI = VCC or GND, IO = 0 10 µA VIH = VCC − 0.6V 750 µA Increase in ICC per Input 3–3.6 AC Electrical Characteristics TA = −40°C to +85°C, RL = 500Ω CL = 50pF Symbol tPHL, tPLH Parameter Propagation Delay CL = 30pF VCC = 3.3V ± 0.3V VCC = 2.7V VCC = 2.5V ± 0.2V VCC = 1.8V ± 0.15V Min. Max. Min. Max. Min. Max. Min. Max. Units 1.0 2.8 2.9 1.0 3.1 1.0 4.7 ns Capacitance TA = +25°C Symbol Parameter Conditions VCC Typical Units CIN Input Capacitance VI = 0V or VCC 3.3 4 pF CPD Power Dissipation Capacitance f = 10MHz, CL = 50pF 3.3 26 pF 2.5 24 1.8 23 ©2001 Fairchild Semiconductor Corporation 74ALVC32 Rev. 1.3.0 www.fairchildsemi.com 3 74ALVC32 — Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs DC Electrical Characteristics 74ALVC32 — Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs AC Loading and Waveforms Table 1. Values for Figure 1 Test Switch tPLH, tPHL Open Figure 1. AC Test Circuit Table 2. Variable Matrix (Input Characteristics: f = 1MHz; tr = tf = 2ns; Z0 = 50Ω) VCC Symbol 3.3V ± 0.3V 2.7V 2.5V ± 0.2V 1.8V ± 0.15V Vmi 1.5V 1.5V VCC / 2 VCC / 2 Vmo 1.5V 1.5V VCC / 2 VCC / 2 Figure 2. Waveform for Inverting and Non-inverting Functions ©2001 Fairchild Semiconductor Corporation 74ALVC32 Rev. 1.3.0 www.fairchildsemi.com 4 8.75 8.50 0.65 A 7.62 14 8 B 5.60 4.00 3.80 6.00 PIN ONE INDICATOR 1 1.70 7 0.51 0.35 1.27 0.25 1.27 LAND PATTERN RECOMMENDATION M C B A (0.33) 1.75 MAX 1.50 1.25 SEE DETAIL A 0.25 0.10 C 0.25 0.19 0.10 C NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AB, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD GAGE PLANE FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X145-14M 0.36 E) DRAWING CONFORMS TO ASME Y14.5M-1994 F) DRAWING FILE NAME: M14AREV13 0.50 X 45° 0.25 R0.10 R0.10 8° 0° 0.90 0.50 (1.04) SEATING PLANE DETAIL A SCALE: 20:1 Figure 3. 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©2001 Fairchild Semiconductor Corporation 74ALVC32 Rev. 1.3.0 www.fairchildsemi.com 5 74ALVC32 — Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs Physical Dimensions 0.65 0.43 TYP 1.65 6.10 0.45 12.00° TOP & BOTTOM R0.09 min A. CONFORMS TO JEDEC REGISTRATION MO-153, VARIATION AB, REF NOTE 6 B. DIMENSIONS ARE IN MILLIMETERS C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONING AND TOLERANCES PER ANSI Y14.5M, 1982 E. LANDPATTERN STANDARD: SOP65P640X110-14M F. DRAWING FILE NAME: MTC14REV6 1.00 R0.09min Figure 4. 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ ©2001 Fairchild Semiconductor Corporation 74ALVC32 Rev. 1.3.0 www.fairchildsemi.com 6 74ALVC32 — Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs Physical Dimensions (Continued) ACEx® Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ EcoSPARK® EZSWITCH™ * ™ PDP-SPM™ SyncFET™ ® Power220® ® Power247 The Power Franchise® POWEREDGE® Power-SPM™ PowerTrench® TinyBoost™ Programmable Active Droop™ TinyBuck™ ® QFET TinyLogic® QS™ TINYOPTO™ QT Optoelectronics™ TinyPower™ ® Quiet Series™ TinyPWM™ RapidConfigure™ TinyWire™ Fairchild® SMART START™ Fairchild Semiconductor® µSerDes™ ® SPM FACT Quiet Series™ UHC® STEALTH™ FACT® Ultra FRFET™ SuperFET™ FAST® UniFET™ SuperSOT™-3 FastvCore™ VCX™ ® ®* SuperSOT™-6 FlashWriter SuperSOT™-8 * EZSWITCH™ and FlashWriter® are trademarks of System General Corporation, used under license by Fairchild Semiconductor. FPS™ FRFET® Global Power ResourceSM Green FPS™ Green FPS™ e-Series™ GTO™ i-Lo™ IntelliMAX™ ISOPLANAR™ MegaBuck™ MICROCOUPLER™ MicroFET™ MicroPak™ MillerDrive™ Motion-SPM™ OPTOLOGIC® OPTOPLANAR® DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild Semiconductor. The datasheet is printed for reference information only. Rev. I32 ©2001 Fairchild Semiconductor Corporation 74ALVC32 Rev. 1.3.0 www.fairchildsemi.com 7 74ALVC32 — Low Voltage Quad 2-Input OR Gate with 3.6V Tolerant Inputs and Outputs TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks.