FDBL86062-F085

FDBL86062-F085 N-Channel POWERTRENCH) MOSFET 100 V, 300 A, 2.0 m www.onsemi.com Features • • • • • Typical RDS(on) = 1.5 m at VGS = 10 V, ID = 80 A Typical Qg(tot) = 95 nC at VGS = 10 V, ID = 80 A UIS Capability Qualified to AEC Q101 This Device is Pb−Free and is RoHS Compliant D G Applications • • • • • S Automotive Engine Control PowerTrain Management Solenoid and Motor Drivers Integrated Starter/Alternator Primary Switch for 12 V Systems H−PSOF8L 11.68x9.80 CASE 100CU MARKING DIAGRAM $Y&Z&3&K FDBL86062 $Y &Z&3 &K FDBL86062 = ON Semiconductor Logo = Data Code (Year & Week) = Lot = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2016 March, 2019 − Rev. 3 1 Publication Order Number: FDBL86062−F085/D FDBL86062−F085 MOSFET MAXIMUM RATINGS TJ = 25°C unless otherwise noted Parameter Symbol Rating Units VDSS Drain−to−Source Voltage 100 V VGS Gate−to−Source Voltage ±20 V A ID Drain Current - Continuous (VGS = 10) (Note 1) TC = 25°C 300 Pulsed Drain Current TC = 25°C See Figure 4 EAS Single Pulse Avalanche Energy (Note 2) 352 mJ PD Power Dissipation 429 W Derate Above 25°C 2.9 W/°C −55 to +175 °C 0.35 °C/W 43 °C/W TJ, TSTG Operating and Storage Temperature RJC Thermal Resistance, Junction to Case RJA Maximum Thermal Resistance, Junction to Ambient (Note 3) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Current is limited by silicon. 2. Starting TJ = 25°C, L = 0.1 mH, IAS = 84 A, VDD = 100 V during inductor charging and VDD = 0 V during time in avalanche. 3. RθJA is the sum of the junction−to−case and case−to−ambient thermal resistance, where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design, while RθJA is determined by the board design. The maximum rating presented here is based on mounting on a 1 in2 pad of 2oz copper. PACKAGE MARKING AND ORDERING INFORMATION Device Marking Device Package Reel Size Tape Width Quantity FDBL86062 FDBL86062−F085 MO−299A 13” 24 mm 2000 Units ELECTRICAL CHARACTERISTICS TJ = 25°C, unless otherwise noted Parameter Symbol Test Conditions Min. Typ. Max. Units V OFF CHARACTERISTICS BVDSS IDSS IGSS Drain−to−Source Breakdown Voltage ID = 250 A, VGS = 0 V Drain−to−Source Leakage Current VDS = 100 V, VGS = 0 V Gate−to−Source Leakage Current 100 − − TJ = 25°C − − 5 A TJ = 175°C (Note 4) − − 2 mA − − ±100 nA 2.0 3.1 4.5 V TJ = 25°C − 1.5 2.0 m TJ = 175°C (Note 4) − 3.3 4.3 − 6970 − − 3950 − − 29 − − 0.4 −  − 95 124 nC − 13 − VGS = ±20 V ON CHARACTERISTICS VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 A RDS(on) Drain to Source On Resistance ID = 80 A, VGS = 10 V DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Rg Qg(ToT) Qg(th) VDS = 50 V, VGS = 0 V, f = 1 MHz Gate Resistance f = 1 MHz Total Gate Charge at 10 V VGS = 0 to 10 V Threshold Gate Charge VGS = 0 to 2 V VDD = 80 V ID = 80 A Qgs Gate−to−Source Gate Charge − 31 − Qgd Gate−to−Drain “Miller” Charge − 20 − www.onsemi.com 2 pF FDBL86062−F085 ELECTRICAL CHARACTERISTICS (continued) TJ = 25°C, unless otherwise noted Symbol Parameter Test Conditions Min. Typ. Max. Units − − 73 ns SWITCHING CHARACTERISTICS ton Turn−On Time td(on) Turn−On Delay tr td(off) tf toff VDD = 50 V, ID = 80 A, VGS = 10 V, RGEN = 6  − 31 − Rise Time − 25 − Turn−Off Delay − 36 − Fall Time − 9 − Turn−Off Time − − 59 ISD = 80 A, VGS = 0 V − − 1.25 ISD = 40 A, VGS = 0 V − − 1.2 IF = 80 A, dISD/dt = 100 A/μs, VDD = 80 V − 115 150 ns − 172 224 nC DRAIN−SOURCE DIODE CHARACTERISTICS VSD Source−to−Drain Diode Voltage trr Reverse−Recovery Time Qrr Reverse−Recovery Charge V Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. The maximum value is specified by design at TJ = 175°C. Product is not tested to this condition in production. www.onsemi.com 3 FDBL86062−F085 400 1.2 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER TYPICAL CHARACTERISTICS 1.0 0.8 0.6 0.4 0.2 0.0 VGS = 10V 300 250 200 150 100 50 0 25 50 75 100 125 150 0 175 25 TC, CASE TEMPERATURE (°C) 2 50 75 100 125 150 175 200 TC, CASE TEMPERATURE (°C) Figure 1. Normalized Power Dissipation vs. Case Temperature NORMALIZED THERMAL IMPEDANCE, ZJC CURRENT LIMITED BY PACKAGE 350 Figure 2. Maximum Continuous Drain Current vs. Case Temperature DUTY CYCLE − DESCENDING ORDER 1 D = 0.50 0.20 0.10 0.05 0.02 0.01 0.1 PDM t1 SINGLE PULSE t2 NOTES: DUTY FACTOR: D = t 1/t 2 PEAK T J = PDM x Z JA x R JA + TC 0.01 −5 10 −4 10 −3 −2 10 10 −1 0 10 10 1 10 t, RECTANGULAR PULSE DURATION (s) Figure 3. Normalized Maximum Transient Thermal Impedance 2000 VGS = 10 V TJ = 25°C IDM, PEAK CURRENT (A) FOR TEMPERATURES ABOVE 25°C DERATE PEAK 1000 CURRENT AS FOLLOWS: I = I25 175 − TC 150 100 −5 10 SINGLE PULSE −4 10 −3 10 −2 10 −1 10 t, RECTANGULAR PULSE DURATION (s) Figure 4. Peak Current Capability www.onsemi.com 4 11 0 FDBL86062−F085 TYPICAL CHARACTERISTICS (continued) IAS, AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) 2000 1000 100 10 OPERATION IN THIS AREA MAY BE LIMITED BY r DS(on) 1 100 s 1 ms SINGLE PULSE TJ = MAX RATED 10 ms 100 ms TJ = 25°C 0.1 0.1 1 10 100 1000 If R = 0 t AV = (L)(I AS )/(1.3*RATED BV DSS − VDD ) If R 00 t AV = (L/R)ln[(I AS *R)/(1.3*RATED BVDSS − VDD ) +1] 100 STARTING TJ = 25°C 10 STARTING TJ = 150 °C 1 0.001 500 VDS, DRAIN TO SOURCE VOLTAGE (V) VDD = 5 V 250 TJ = −55°C TJ = 25°C 150 TJ = 175°C 100 50 0 3 4 5 7 1000 Refer to ON Semiconductor Application Notes AN7514 and AN7515 350 VGS = 0 V 100 TJ = 175°C 10 TJ = 25°C 1 0.1 0.0 0.2 0.2 0.6 0.8 1.0 1.2 Figure 7. Transfer Characteristics Figure 8. Forward Diode Characteristics 350 250  s PULSE WIDTH TJ = 25°C VGS 250 15 V Top 10 V 8V 7V 6V 5.5 V 5 V Bottom 200 150 100 50 0 100 VSD, BODY DIODE FORWARD VOLTAGE (V) 300 0 10 VGS, GATE TO SOURCE VOLTAGE (V) 350 ID, DRAIN CURRENT (A) 6 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) PULSE DURATION = 250  s DUTY CYCLE = 0.5% MAX 200 1 Figure 6. Unclamped Inductive Switching Capability IS, REVERSE DRAIN CURRENT (A) Figure 5. Forward Bias Safe Operating Area 300 0.1 tAV, TIME IN AVALANCHE (ms) NOTE: 350 0.01 1 2 3 4 VGS 15 V Top 10 V 8V 7V 6V 5.5 V 5V Bottom 250 200 150 100 50 0 5 250  s PULSE WIDTH TJ = 175°C 300 0 1 2 3 4 VDS, DRAIN TO SOURCE VOLTAGE (V) VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 9. Saturation Characteristics Figure 10. Saturation Characteristics www.onsemi.com 5 5 FDBL86062−F085 rDS(on), DRAIN TO SOURCE ON−RESISTANCE (m) 30 PULSE DURATION = 250  s DUTY CYCLE = 0.5% MAX 25 ID = 80 A 20 15 10 TJ = 175°C 5 0 TJ = 25°C 4 5 6 7 8 9 10 NORMALIZED DRAIN TO SOURCE ON−RESISTANCE TYPICAL CHARACTERISTICS (continued) 2.5 PULSE DURATION = 250  s DUTY CYCLE = 0.5% MAX 2.0 1.5 1.0 ID = 80 A VGS = 10 V 0.5 −80 VGS, GATE TO SOURCE VOLTAGE (V) 0.7 0.5 −40 0 40 80 120 160 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE NORMALIZED GATE THRESHOLD VOLTAGE 0.9 0.3 −80 200 VGS, GATE TO SOURCE VOLTAGE(V) Ciss CAPACITANCE (pF) 160 200 ID = 5 mA 1.05 1.00 0.95 0.90 −80 −40 0 40 80 120 160 200 Figure 14. Normalized Drain to Source Breakdown Voltage vs. Junction Temperature 10000 Coss 1000 100 Crss 1 120 TJ, JUNCTION TEMPERATURE (°C) Figure 13. Normalized Gate Threshold Voltage vs. Temperature 10 0.1 80 1.10 TJ, JUNCTION TEMPERATURE (°C) f = 1 MHz VGS = 0 V 40 Figure 12. Normalized RDSON vs. Junction Temperature VGS = VDS ID = 250 A 1.1 0 TJ, JUNCTION TEMPERATURE(°C) Figure 11. RDSON vs. Gate Voltage 1.3 −40 10 100 10 ID = 80 A VDD = 50 V 8 VDD = 60 V VDD = 40 V 6 4 2 0 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 20 40 60 80 100 Qg, GATE CHARGE (nC) Figure 15. Capacitance vs. Drain to Source Voltage Figure 16. Gate Charge vs. Gate to Source Voltage POWERTRENCH is registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS H−PSOF8L 11.68x9.80 CASE 100CU ISSUE A DATE 06 JAN 2020 GENERIC MARKING DIAGRAM* AYWWZZ XXXXXXXX XXXXXXXX A Y WW ZZ XXXX DOCUMENT NUMBER: DESCRIPTION: = Assembly Location = Year = Work Week = Assembly Lot Code = Specific Device Code 98AON13813G H−PSOF8L 11.68x9.80 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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